IPMB first commit

app/Makefile

@@ -5,9 +5,11 @@ all	:
 	make -C ./driver/FMC
 	make -C ./driver/ADC
 	make -C ./driver/I2C 
-
+	make -C ./driver/SPI
+	
 	# make apps
 	make -C ./bmc
 	make -C ./goahead-5.1.0
+	make -C ./test_app
 clean	: 
 

app/bmc/Api.c

@@ -111,14 +111,6 @@ int PlatformInit(void)
 	g_BMCInfo.BootValidMinutes			=	0;
 	
 	g_BMCInfo.pUserInfo					=	NULL;
-	
-//	memset(g_sensorHistory, 0, sizeof(g_sensorHistory));
-	
-	printf("\tChassisID %#02x, SlotID %#02x\r\n", g_BMCInfo.chassisID, g_BMCInfo.SlotID);
-	printf("\tPrimaryIPMBBus: %d, channel %d, Addr %#02x\r\n", PrimaryIPMBBusNum, 
-		g_BMCInfo.IpmiConfig.PrimaryIPMBCh, g_BMCInfo.PrimaryIPMBAddr);
-	printf("\tSecondaryIPMBBus %d, Channel %d, Addr %#02x\r\n", SecondaryIPMBBusNum,
-		g_BMCInfo.IpmiConfig.SecondaryIPMBCh, g_BMCInfo.SecondaryIPMBAddr);
 		
 	return 0;
 }
@@ -154,16 +146,20 @@ int Init_IPMI_FRU_SDR_SEL(void)
 		printf("BMC first power on!\r\n");
 		/************************** Init IPMI ******************************/
 		memcpy(g_BMCInfo.IpmiConfig.FirstPowerOnStr, FirstPowerOnStr, sizeof(FirstPowerOnStr));
-		g_BMCInfo.IpmiConfig.PrimaryIPMBSupport		=	PRIMARY_IPMB_SUPPORT;
-		g_BMCInfo.IpmiConfig.SecondaryIPMBSupport	=	SECONDARY_IPMB_SUPPORT;
+		
 		g_BMCInfo.IpmiConfig.GrpExtnSupport 		= 	GROUP_EXTERN_SUPPORT;
-		g_BMCInfo.IpmiConfig.ChassisTimerInterval	=	CHASSIS_TIMER_INTERVAL;
-		g_BMCInfo.IpmiConfig.PrimaryIPMBCh			=	PRIMARY_IPMB_CHANNEL;
-		g_BMCInfo.IpmiConfig.SecondaryIPMBCh		=	SECONDARY_IPMB_CHANNEL;		
+		g_BMCInfo.IpmiConfig.ChassisTimerInterval	=	CHASSIS_TIMER_INTERVAL;	
 		g_BMCInfo.IpmiConfig.PowerCycleInterval		=	PWR_CYCLE_INTERVAL;
 		g_BMCInfo.IpmiConfig.FanControlInterval		=	FAN_CONTROL_INTERVAL;		
 		g_BMCInfo.IpmiConfig.RearmSetSensorThreshold	=	REARM_SET_SENSOR_THRESHOLD;
 		g_BMCInfo.IpmiConfig.SELTimeUTCOffset		=	8*60;
+		//IPMB
+		g_BMCInfo.IpmiConfig.PrimaryIPMBSupport		=	PRIMARY_IPMB_SUPPORT;
+		g_BMCInfo.IpmiConfig.SecondaryIPMBSupport	=	SECONDARY_IPMB_SUPPORT;
+		g_BMCInfo.IpmiConfig.PrimaryIPMBBus 		= 	PRIMARY_IPMB_BUS;
+		g_BMCInfo.IpmiConfig.SecondaryIPMBBus 		= 	SECONDARY_IPMB_BUS;
+		g_BMCInfo.IpmiConfig.PrimaryIPMBAddr 		= 	PRIMARY_IPMB_ADDR;
+		g_BMCInfo.IpmiConfig.SecondaryIPMBAddr 		= 	SECONDARY_IPMB_ADDR;
 		
 		// //set default user
 		// memset(g_BMCInfo.IpmiConfig.UserInfoTbl, 0, sizeof(UserInfo_T)*MAX_USER_NUM);

app/bmc/BmcConfig.h

@@ -1,8 +0,0 @@
-#ifndef __BMC_CONFIG_H__
-#define __BMC_CONFIG_H__
-
-
-
-
-
-#endif /* __BMC_CONFIG_H__ */

app/bmc/BmcType.h

@@ -17,17 +17,22 @@ typedef struct
     uint8_t SendMsgTimeout;
     uint8_t SessionTimeOut;
     uint32_t ChassisTimerInterval;
-    uint8_t PrimaryIPMBSupport ;	
+    	
     uint8_t SerialIfcSupport ;
     uint8_t SerialTerminalSupport;
     uint8_t LANIfcSupport ;
     uint8_t SYSIfcSupport;
-    uint8_t SecondaryIPMBSupport ;
     uint8_t GrpExtnSupport ;
 	uint32_t FanControlInterval;
- 	//channel
-	uint8_t 			PrimaryIPMBCh;
-	uint8_t				SecondaryIPMBCh;
+
+ 	//IPMB
+ 	uint8_t 		PrimaryIPMBSupport ;
+    uint8_t 		SecondaryIPMBSupport ;
+	uint32_t 			PrimaryIPMBBus;
+    uint32_t 			SecondaryIPMBBus;
+    uint8_t             PrimaryIPMBAddr;	//8bit
+	uint8_t				SecondaryIPMBAddr;	//8bit
+
 	//chassis config
 	uint8_t                        SysRestartCause;
 	uint8_t                        PowerRestorePolicy;
@@ -60,10 +65,7 @@ typedef struct
 	//chassis
     uint8_t             SlotID;
 	uint8_t				chassisID;
-	uint32_t 			PrimaryIPMBBus;
-    uint32_t 			SecondaryIPMBBus;
-    uint8_t             PrimaryIPMBAddr;
-	uint8_t				SecondaryIPMBAddr;
+
 	uint8_t				PowerGoodFlag;
 	uint8_t				FirstPowerOn;
 	uint8_t				SelfTestByte;

app/bmc/Makefile

@@ -22,6 +22,9 @@ SRC	+= ./uds/UDSIfc.c
 SRC += ./lan/LANIfc.c
 SRC += ./lan/RMCP.c
 SRC += ./lan/RMCP+.c
+
+SRC += ./ipmb/IPMBIfc.c
+
 SRC += ./encryption/MD2.c
 SRC += ./encryption/md2_dgst.c
 SRC += ./encryption/MD5.c

app/bmc/ipmb/IPMBIfc.c

@@ -0,0 +1,402 @@
+/*
+*	Brief:	Implement IPMB send and receive function in this file, include primary IPMB and secondary IPMB.
+*	Author:	Jimbo_Zhang@outlook.com
+*	Date:	2019-9-9
+*/
+
+/* Standard includes. */
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include <errno.h>
+#include <pthread.h>
+#include <fcntl.h>
+#include <sys/socket.h>
+
+#include "com_IPMI_LANIfc.h"
+#include "com_IPMI_RMCP.h"
+#include "RMCP.h"
+#include "LANIfc.h"
+#include "com_IPMIDefs.h"
+#include "RMCP.h"
+#include "MD.h"
+#include <netdb.h>        /* getaddrinfo(3) et al.                       */
+#include <netinet/in.h>   /* sockaddr_in & sockaddr_in6 definition.      */
+#include  <net/if.h>
+#include <sys/prctl.h>
+#include "main.h"
+#include "Session.h"
+#include "com_IPMI_SDR.h"
+#include "com_IPMI_Storage.h"
+#include "SDR.h"
+
+//static int sendIPMBPkt(uint32_t ipmb_bus, uint8_t* i2c_send_buf, uint8_t size);
+static uint8_t ValidateIPMBChkSums ( uint8_t* Data, uint8_t Size);
+static void ProcessIPMBReq ( MsgPkt_T* pReq);
+uint8_t IsResponseMatch (MsgPkt_T* pReq, MsgPkt_T* pRes);
+static void* RecvIPMBPkt (void *pArg);
+
+int gFd_PrimaryIpmbIfcQ, gFd_PrimaryIpmbResQ;
+int gFd_SecondaryIpmbIfcQ, gFd_SecondaryIpmbResQ;
+int gFd_Primary,  gFd_Secondary;
+
+/*!
+    \brief      IPMB Task. Generating primary_IPMB task and secondary_IPMB task in this task.
+    \param:		0: primary ipmb, 1: secondary ipmb
+    \retval     none
+*/
+void *IPMBIfcTask(void *Param)
+{
+//	int i;
+	MsgPkt_T RcvMsgPkt;
+    uint8_t dev_name[10] = {0};
+    uint8_t IPMB_IFC_Q[32] = {0};
+    uint8_t IPMB_RES_Q[32] = {0};
+    uint8_t OwnerAddr;
+    int 	fd_IpmbDev;
+    int 	fd_IpmbIfcQ, fd_IpmbResQ;
+    uint8_t ipmbSelect = *(uint8_t*)Param;
+    
+    //printf("ipmbSelect: %d\n", ipmbSelect);
+    //Primary IPMB
+    if((ipmbSelect == 0) && g_BMCInfo.IpmiConfig.PrimaryIPMBSupport)
+    {
+		printf("Primary IPMBIfcTask start...\n");
+		strcpy(IPMB_IFC_Q, PRIMARY_IPMB_IFC_Q);	
+		strcpy(IPMB_RES_Q, PRIMARY_IPMB_RES_Q);	
+		sprintf(dev_name, "/dev/i2c%d", g_BMCInfo.IpmiConfig.PrimaryIPMBBus);
+		OwnerAddr	=	g_BMCInfo.IpmiConfig.PrimaryIPMBAddr;
+	}
+	//Secondary IPMB
+	else if((ipmbSelect == 1) && g_BMCInfo.IpmiConfig.SecondaryIPMBSupport)
+	{
+		printf("Secondary IPMBIfcTask start...\n");
+		strcpy(IPMB_IFC_Q, SECONDARY_IPMB_IFC_Q);	
+		strcpy(IPMB_RES_Q, SECONDARY_IPMB_RES_Q);
+		sprintf(dev_name, "/dev/i2c%d", g_BMCInfo.IpmiConfig.SecondaryIPMBBus);
+		OwnerAddr	=	g_BMCInfo.IpmiConfig.SecondaryIPMBAddr;
+	}
+	else
+	{
+		printf("Invalid param! %d\n", ipmbSelect);
+		return (void *)-1;
+	}
+
+	//create IPMB_IFC_Q
+    if(-1 != access(IPMB_IFC_Q, F_OK))
+    {
+        remove(IPMB_IFC_Q);
+    }
+    if(0 != mkfifo (IPMB_IFC_Q, 0777))
+    {
+        printf("%s: Create %s fifo failed! %s\n", __FUNCTION__, IPMB_IFC_Q, strerror(errno));
+        return (void*)-1;
+    }
+    fd_IpmbIfcQ = open (IPMB_IFC_Q, O_RDWR);
+    if(-1 == fd_IpmbIfcQ)
+    {
+        printf("%s: Open %s fifo failed! %s\n", __FUNCTION__, IPMB_IFC_Q, strerror(errno));
+        return (void*)-1;
+    }
+
+	//create IPMB_RES_Q
+    if(-1 != access(IPMB_RES_Q, F_OK))
+    {
+        remove(IPMB_RES_Q);
+    }
+    if(0 != mkfifo (IPMB_RES_Q, 0777))
+    {
+        printf("%s: Create %s fifo failed! %s\n", __FUNCTION__, IPMB_RES_Q, strerror(errno));
+        return (void*)-1;
+    }
+    fd_IpmbResQ = open (IPMB_RES_Q, O_RDWR);
+    if(-1 == fd_IpmbResQ)
+    {
+        printf("%s: Open %s fifo failed! %s\n", __FUNCTION__, IPMB_RES_Q, strerror(errno));
+        return (void*)-1;
+    }
+
+    fd_IpmbDev = open (dev_name, O_RDWR);
+    if(-1 == fd_IpmbDev)
+    {
+        printf("%s: Open IPMB failed! %s\n", __FUNCTION__, strerror(errno));
+        return (void*)-1;
+    }
+    //set IPMB address
+    if(0 != stm32_i2c_set_addr(fd_IpmbDev, OwnerAddr))
+    	printf("Set ipmb address fail.\n");
+
+	if(ipmbSelect == 0)
+    {
+    	gFd_PrimaryIpmbIfcQ = fd_IpmbIfcQ;
+    	gFd_PrimaryIpmbResQ = fd_IpmbResQ;
+    	gFd_Primary 	=	fd_IpmbDev;
+    }
+    else if(ipmbSelect == 1)
+    {
+    	gFd_SecondaryIpmbIfcQ = fd_IpmbIfcQ;
+    	gFd_SecondaryIpmbResQ = fd_IpmbResQ;
+    	gFd_Secondary 	=	fd_IpmbDev;
+    }
+
+    /*Create a thread to recv IPMB Pkt */
+	gThreadIndex++;	
+    if(0 != pthread_create(&gThreadIDs[gThreadIndex],NULL,RecvIPMBPkt,Param))
+    {
+        printf("%s: Create RecvIPMBPkt thread failed! %s\n", __FUNCTION__, strerror(errno));
+        return (void *)-1; 
+    }
+
+	while(1)
+	{		
+		while(GetMsg(fd_IpmbIfcQ, &RcvMsgPkt, WAIT_INFINITE) != 0);
+		
+		switch(RcvMsgPkt.Param)
+		{
+			case PARAM_REQUEST:
+				ProcessIPMBReq (&RcvMsgPkt);
+				break;
+			case PARAM_BRIDGE:
+				break;
+			default:
+				printf("Unknow message param %#x\r\n", RcvMsgPkt.Param);
+				break;
+		}
+		
+	}
+}
+
+
+
+/**
+ * @brief Process the request posted by IPMB driver.
+ * @param pReq - Request message pointer.
+**/
+static void
+ProcessIPMBReq ( MsgPkt_T* pReq)
+{
+    MsgPkt_T             	ResPkt;
+    uint8_t              	ReqLen;
+    IPMIMsgHdr_T* 			pIPMIMsgReq = (IPMIMsgHdr_T*) pReq->Data;
+   
+    int RetVal = 0;
+    ReqLen = pReq->Size;
+	
+    /* Validate Checksums */
+    if (TRUE != ValidateIPMBChkSums ((uint8_t*)pIPMIMsgReq, ReqLen))
+    {
+        printf ("IPMBIfc.c : IPMB Checksum validation failed\r\n");
+        return;
+    }
+
+    pReq->Param			= PARAM_IFC;
+    pReq->Cmd			= pIPMIMsgReq->Cmd;
+    pReq->NetFnLUN		= pIPMIMsgReq->NetFnLUN;
+
+    if(pReq->Channel == PRIMARY_IPMB_CHANNEL)
+    	pReq->SrcQ 			= gFd_PrimaryIpmbResQ;
+    else
+    	pReq->SrcQ 			= gFd_SecondaryIpmbResQ;
+	
+    /* Post the message to message handler Task */
+    PostMsg (gFd_MsgHndlrIfc, pReq);
+       
+    if(pReq->ResTimeOut < 1)	pReq->ResTimeOut = 10;
+    do
+    {
+    	if(pReq->Channel == PRIMARY_IPMB_CHANNEL)
+      		RetVal = GetMsg (gFd_PrimaryIpmbResQ, &ResPkt, pReq->ResTimeOut);  
+      	else
+      		RetVal = GetMsg (gFd_SecondaryIpmbResQ, &ResPkt, pReq->ResTimeOut);  
+
+    }while(!RetVal && !IsResponseMatch(pReq, &ResPkt) );
+	
+	if (0 != RetVal)
+    {
+		printf("Warning: Process IPMB request fail, return timeout.\r\n");
+		ResPkt.Param	=	PARAM_NORMAL_RESPONSE;
+		ResPkt.Size		=	sizeof(IPMIMsgHdr_T)+2;
+		
+		SwapIPMIMsgHdr(((IPMIMsgHdr_T*)pReq->Data), ((IPMIMsgHdr_T*)ResPkt.Data));
+		ResPkt.Data[sizeof(IPMIMsgHdr_T)]	=	CC_TIMEOUT;
+		ResPkt.Data[sizeof(IPMIMsgHdr_T)+1]	=	CalculateCheckSum2(ResPkt.Data, sizeof(IPMIMsgHdr_T)+1);
+    }   
+
+    /* If its not normal IPMI Response just return */
+    if (PARAM_NO_RESPONSE == ResPkt.Param)
+    {
+        printf ("IPMBIfc.c : IPMB request packet dropped, not processed\n");
+        return;
+    }
+
+    /* Send the response */
+	if(pReq->Channel == PRIMARY_IPMB_CHANNEL)
+	{
+		RetVal = stm32_i2c_master_write(gFd_Primary, ResPkt.Data[0], &ResPkt.Data[1], ResPkt.Size);
+	}
+	else if(pReq->Channel == SECONDARY_IPMB_CHANNEL)
+	{
+		RetVal = stm32_i2c_master_write(gFd_Secondary, ResPkt.Data[0], &ResPkt.Data[1], ResPkt.Size);
+	}
+	else
+	{
+		printf("IPMBIfc.c: IPMB channel error. %#x\r\n", pReq->Channel);
+	}
+	
+    if (0 != RetVal)
+    {
+        printf ("IPMBIfc.c : Unable to send a IPMI Response\n");
+    }
+    return;
+}
+
+/**
+ * @brief Validate IPMB Checksums.
+ * @param Data - Buffer to be validated.
+ * @param Size - Size of the buffer.
+ * @return TRUE if valid, FALSE if error.
+**/
+static uint8_t ValidateIPMBChkSums ( uint8_t* Data, uint8_t Size)
+{
+    uint8_t i;
+    uint8_t chksum;
+
+    /* Check IPMB message min size */
+    if (Size < MIN_IPMB_MSG_LENGTH)
+    {
+        printf("IPMBIfc.c: Invalid IPMB Message Length\r\n");
+        return FALSE;
+    }
+
+    /* Validate the checksum1 */
+    chksum = 0;
+    for (i = 0; i < 3; i++)
+    {
+        chksum += *(Data + i);
+    }
+
+    if (chksum != 0)
+    {
+       
+		printf ("IPMBIfc.c: Invalid checksum 1, size = %d\n",Size);
+		for(i = 0; i < Size;i++)
+			printf("%x ",Data[i]);
+		printf("\n");
+        return FALSE;
+    }
+    /* Validate the checksum2 */
+    chksum = 0;
+    for (i = 3; i < Size; i++)
+    {
+        chksum += *(Data + i);
+    }
+
+    if (chksum != 0)
+    {
+       
+		printf("IPMBIfc.c: Invalid checksum 2, size = %d\n",Size);
+		for(i = 0; i < Size;i++)
+			printf("%x ",Data[i]);
+		printf("\n");
+        
+        return FALSE;
+    }
+
+    return TRUE;
+}
+
+
+/*-----------------------------------------------------
+ * @fn IsResponseMatch
+ * @brief Checks if the Response Message corresponds to 
+ *        the Request Message
+ * 
+ * @param pReq    : IPMI Request Message Packet
+ * @param pRes    : IPMI Response Message Packet
+ * 
+ * @return  1 if match
+ *          0 if mismatch
+ *----------------------------------------------------*/
+uint8_t IsResponseMatch (MsgPkt_T* pReq, MsgPkt_T* pRes)
+{
+
+    if( ( ((((IPMIMsgHdr_T*)pRes->Data)->RqSeqLUN) >> 2) != ((((IPMIMsgHdr_T*)pReq->Data)->RqSeqLUN) >> 2) ) && 
+        ( (pReq->NetFnLUN & 0x4) && (PARAM_NO_RESPONSE != pRes->Param) ) )
+    {
+        return FALSE;
+    }
+  
+    return TRUE;
+}
+
+
+
+/**
+ * @fn RecvIPMBPkt
+ * @brief This function receives IPMB request packet and post the message to
+ *        IPMB interface queue
+**/
+static void* RecvIPMBPkt (void *Param)
+{
+    MsgPkt_T    IPMBReqPkt;
+    int IPMBSlaveFd;
+    int retval;
+    uint8_t ipmbSelect = *(uint8_t*)Param;
+
+    prctl(PR_SET_NAME, __FUNCTION__, 0, 0, 0);
+    int curThreadIndex = 0;
+
+    memset(&IPMBReqPkt,0,sizeof(MsgPkt_T));
+    if(0 == ipmbSelect)
+    {
+    	printf ("Primary IPMB Receiver Started...\n");
+        IPMBReqPkt.Data [0] = g_BMCInfo.IpmiConfig.PrimaryIPMBAddr;
+        IPMBReqPkt.Channel = PRIMARY_IPMB_CHANNEL;
+        IPMBSlaveFd = gFd_Primary;
+    }
+    else if(1 == ipmbSelect)
+    {
+    	printf ("Secondary IPMB Receiver Started...\n");
+        IPMBReqPkt.Data [0] = g_BMCInfo.IpmiConfig.SecondaryIPMBAddr;
+        IPMBReqPkt.Channel = SECONDARY_IPMB_CHANNEL;
+        IPMBSlaveFd = gFd_Secondary;
+    }
+
+    /* Loop forever */
+    while (1)
+    {
+        retval = stm32_i2c_slave_recv(IPMBSlaveFd, &IPMBReqPkt.Data[1]);
+        if( retval > 5)
+        {
+            IPMBReqPkt.Param    = PARAM_REQUEST;
+            IPMBReqPkt.Size     = retval + 1;       /* +1 to include BMC Slave address */
+
+            /* Post the IPMB Request message to IPMBIfc Queue */
+            if(ipmbSelect == 0)
+            {
+                if (0 != PostMsg (gFd_PrimaryIpmbIfcQ, &IPMBReqPkt))
+                {
+                    printf ("IPMBIfc.c : Error posting message to IPMBIfc_Q\n");
+                }
+            }
+            else
+            {
+                if (0 != PostMsg (gFd_SecondaryIpmbIfcQ, &IPMBReqPkt))
+                {
+                    printf ("IPMBIfc.c : Error posting message to IPMBIfc_Q\n");
+                }
+            }
+        }
+
+        int cnt;
+        if(0 == ipmbSelect)
+        	printf("---> Primary IPMB Recv: ");
+        else
+        	printf("---> Secondary IPMB Recv: ");
+
+    	for(cnt=0;cnt < IPMBReqPkt.Size; cnt++)
+        	printf("%#x ", IPMBReqPkt.Data[cnt]);
+        printf("\n");
+	}
+    return (void*)-1;
+}

app/bmc/ipmb/IPMBIfc.h

@@ -0,0 +1,7 @@
+#ifndef __IPMB_IFC_H__
+#define __IPMB_IFC_H__
+
+
+void *IPMBIfcTask( void *Param);
+
+#endif /* __IPMB_IFC_H__ */

app/bmc/lan/LANIfc.c

@@ -41,7 +41,6 @@
 #include <sys/prctl.h>
 #include "main.h"
 #include "Session.h"
-#include "BmcConfig.h"
 
 #define NO_OF_RETRY                     3
 #define MAX_POSSIBLE_IPMI_DATA_SIZE     1000
@@ -108,7 +107,7 @@ void *LANIfcTask (void *param)
 	int curThreadIndex = 0;
 
 	/* Init LAN SMB */
-	printf("LANIfc Started... \n");
+	printf("LANIfc Task Started... \n");
 
 	//create LAN_IFC_Q
     if(-1 != access(LAN_IFC_Q, F_OK))
@@ -216,7 +215,7 @@ static int InitUDPSocket(void)
         return -1;
     }
 
-    printf("UDP Socket %d\n", gSocket_LAN);
+    //printf("UDP Socket %d\n", gSocket_LAN);
 
     strcpy(UDPIfcName,"eth0");
 	
@@ -238,7 +237,7 @@ static int InitUDPSocket(void)
         return -1;
     }
 
-    printf("Create UDP socket successfully, socket %d, port: %d\n", gSocket_LAN, local.sin_port);
+    //printf("Create UDP socket successfully, socket %d, port: %d\n", gSocket_LAN, local.sin_port);
 
     return 0;
 }

app/bmc/main.c

@@ -40,6 +40,18 @@ void main(void)
 	InitSdrConfig();
 	InitSelConfig();
 
+	printf("\tChassisID %#02x, SlotID %#02x\r\n", g_BMCInfo.chassisID, g_BMCInfo.SlotID);
+	if(g_BMCInfo.IpmiConfig.PrimaryIPMBSupport)
+	{
+		printf("\tPrimaryIPMBBus: %d, channel %d, Addr %#02x\n", g_BMCInfo.IpmiConfig.PrimaryIPMBBus, 
+			PRIMARY_IPMB_CHANNEL, g_BMCInfo.IpmiConfig.PrimaryIPMBAddr);
+	}
+	if(g_BMCInfo.IpmiConfig.SecondaryIPMBSupport)
+	{
+		printf("\tSecondaryIPMBBus %d, Channel %d, Addr %#02x\n", g_BMCInfo.IpmiConfig.SecondaryIPMBBus,
+			SECONDARY_IPMB_CHANNEL, g_BMCInfo.IpmiConfig.SecondaryIPMBAddr);
+	}
+
 	/* Create TimerTask */
 	gThreadIndex = 0;
 	if(0 != pthread_create(&gThreadIDs[gThreadIndex],NULL,TimerTask,NULL))
@@ -82,16 +94,21 @@ void main(void)
         printf("%s: Create LANIfcTask thread failed!\n", __FUNCTION__);
     }
 	/* Create IPMB interface */
-
-	/* Create Update FPGA thread */
-
-	/* Create ChassisTimer */
+	uint8_t primaryIpmbSelect = 0;	//primary
 	gThreadIndex++;
-	if(0 != pthread_create(&gThreadIDs[gThreadIndex],NULL,ChassisTimerTask,NULL))
+	if(0 != pthread_create(&gThreadIDs[gThreadIndex],NULL,IPMBIfcTask,&primaryIpmbSelect))
     {
-        printf("%s: Create ChassisTimerTask thread failed!\n", __FUNCTION__);
+        printf("%s: Create LANIfcTask thread failed!\n", __FUNCTION__);
+    }
+    uint8_t secondaryIpmbSelect = 1;	//secondary
+    gThreadIndex++;
+	if(0 != pthread_create(&gThreadIDs[gThreadIndex],NULL,IPMBIfcTask,&secondaryIpmbSelect))
+    {
+        printf("%s: Create LANIfcTask thread failed!\n", __FUNCTION__);
     }
 
+	/* Create Update FPGA thread */
+
 	/* Create UDS interface */
 
 	/* Create UDS interface */

app/bmc/main.h

@@ -17,16 +17,23 @@
 /* Declare global variable */
 
 
-#define SENSOR_NUMBERS				(4)
+#define SENSOR_NUMBERS				(11)
 #define FW_VERSION_MAJOR			(1)
 #define FW_VERSION_MINOR			(0)
-#define PRIMARY_IPMB_SUPPORT		1
-#define SECONDARY_IPMB_SUPPORT		1
+
 #define GROUP_EXTERN_SUPPORT		1
 #define PWR_CYCLE_INTERVAL			(3) 	//unit: 1s
 #define REARM_SET_SENSOR_THRESHOLD	(0)		//whether rearm sensor event when change sensor threshold
 #define CHASSIS_TIMER_INTERVAL		(1)		//1 second
 #define FAN_CONTROL_INTERVAL		(5)		//5	second 
+//IPMB
+#define PRIMARY_IPMB_SUPPORT		1
+#define SECONDARY_IPMB_SUPPORT		1
+#define PRIMARY_IPMB_BUS			2	// /dev/i2c2
+#define SECONDARY_IPMB_BUS			1	// /dev/i2c1
+#define PRIMARY_IPMB_ADDR			0x40
+#define SECONDARY_IPMB_ADDR			0x40
+
 
 
 
@@ -52,6 +59,8 @@ extern int gFd_LanIfcQ, gFd_LanResQ;
 extern int gFdUdsIfc, gFdUdsRes;
 extern int gFd_MsgHndlrIfc;
 extern int gFd_ChassisPwrHndlrQue;
+int gFd_PrimaryIpmbIfcQ, gFd_PrimaryIpmbResQ;
+int gFd_SecondaryIpmbIfcQ, gFd_SecondaryIpmbResQ;
 
 extern BMCInfo_t 	g_BMCInfo;
 

app/bmc/sensor_driver.c

@@ -8,6 +8,7 @@
 #include <stdio.h>
 #include "sensor_tbl.h"
 #include "hal_interface_api.h"
+#include "linux/fcntl.h"
 
 /* 
  * sensor number: 1
@@ -16,22 +17,22 @@
  */
 int sensor_1_init(void)
 {
-//	log("init sensor 1!\r\n");
 	return 0;	
 }
 
 int sensor_1_write(void)
 {
-//	log("write sensor 1!\r\n");
 	return 0;
 }
 
 int sensor_1_read(uint8_t *reading)
 {
 	uint8_t buf = 5;
-	stm32_i2c_master_write(3, 0xAA, &buf, 1);
-	stm32_i2c_master_read(3, 0xAA, &buf, 1);
-	printf("read sensor 1: %#x!\n", buf);
+	int fd = open("/dev/i2c3", O_RDWR);
+	stm32_i2c_master_write(fd, 0xAA, &buf, 1);
+	stm32_i2c_master_read(fd, 0xAA, &buf, 1);
+	close(fd);
+	//printf("read sensor 1: %#x!\n", buf);
 	*reading = buf;
 	return 0;
 }
@@ -56,9 +57,10 @@ int sensor_2_write(void)
 int sensor_2_read(uint8_t *reading)
 {
 	uint8_t buf = 4;
-	stm32_i2c_master_write(3, 0xAA, &buf, 1);
-	stm32_i2c_master_read(3, 0xAA, &buf, 1);
-	printf("read sensor 2: %#x!\n", buf);
+	int fd = open("/dev/i2c3", O_RDWR);
+	stm32_i2c_master_write(fd, 0xAA, &buf, 1);
+	stm32_i2c_master_read(fd, 0xAA, &buf, 1);
+	close(fd);
 	*reading = buf;
 	return 0;
 }
@@ -83,9 +85,10 @@ int sensor_3_write(void)
 int sensor_3_read(uint8_t *reading)
 {
 	uint8_t buf = 0;
-	stm32_i2c_master_write(3, 0x98, &buf, 1);
-	stm32_i2c_master_read(3, 0x98, &buf, 1);
-	printf("read sensor 3: %#x!\n", buf);
+	int fd = open("/dev/i2c3", O_RDWR);
+	stm32_i2c_master_write(fd, 0x98, &buf, 1);
+	stm32_i2c_master_read(fd, 0x98, &buf, 1);
+	close(fd);
 	*reading = buf;
 	return 0;
 }
@@ -111,13 +114,175 @@ int sensor_4_write(void)
 int sensor_4_read(uint8_t *reading)
 {
 	uint8_t buf = 1;
-	stm32_i2c_master_write(3, 0x98, &buf, 1);
-	stm32_i2c_master_read(3, 0x98, &buf, 1);
-	printf("read sensor 4: %#x!\n", buf);
+	int fd = open("/dev/i2c3", O_RDWR);
+	stm32_i2c_master_write(fd, 0x98, &buf, 1);
+	stm32_i2c_master_read(fd, 0x98, &buf, 1);
+	close(fd);
 	*reading = buf;
 	return 0;
 }
 
+/* 
+ * sensor number: 5
+ * sensor name: +1.5V
+ * brief: adc_ch1
+ */
+int sensor_5_init(void)
+{
+	return 0;	
+}
+
+int sensor_5_write(void)
+{
+	return 0;
+}
+
+int sensor_5_read(uint8_t *reading)
+{
+	uint16_t buf;
+	stm32_adc_get_value(1, &buf);
+	*reading = buf>>4;
+	return 0;
+}
+
+/* 
+ * sensor number: 6
+ * sensor name: +0.75V
+ * brief: adc_ch2
+ */
+int sensor_6_init(void)
+{
+	return 0;	
+}
+
+int sensor_6_write(void)
+{
+	return 0;
+}
+
+int sensor_6_read(uint8_t *reading)
+{
+	uint16_t buf;
+	stm32_adc_get_value(2, &buf);
+	*reading = buf>>4;
+	return 0;
+}
+
+/* 
+ * sensor number: 7
+ * sensor name: +1.8V
+ * brief: adc_ch3
+ */
+int sensor_7_init(void)
+{
+	return 0;	
+}
+
+int sensor_7_write(void)
+{
+	return 0;
+}
+
+int sensor_7_read(uint8_t *reading)
+{
+	uint16_t buf;
+	stm32_adc_get_value(3, &buf);
+	*reading = buf>>4;
+	return 0;
+}
+
+/* 
+ * sensor number: 8
+ * sensor name: +1.2V
+ * brief: adc_ch4
+ */
+int sensor_8_init(void)
+{
+	return 0;	
+}
+
+int sensor_8_write(void)
+{
+	return 0;
+}
+
+int sensor_8_read(uint8_t *reading)
+{
+	uint16_t buf;
+	stm32_adc_get_value(4, &buf);
+	*reading = buf>>4;
+	return 0;
+}
+
+/* 
+ * sensor number: 9
+ * sensor name: +1.0V
+ * brief: adc_ch5
+ */
+int sensor_9_init(void)
+{
+	return 0;	
+}
+
+int sensor_9_write(void)
+{
+	return 0;
+}
+
+int sensor_9_read(uint8_t *reading)
+{
+	uint16_t buf;
+	stm32_adc_get_value(5, &buf);
+	*reading = buf>>4;
+	return 0;
+}
+
+/* 
+ * sensor number: 10
+ * sensor name: +2.5V
+ * brief: adc_ch6
+ */
+int sensor_10_init(void)
+{
+	return 0;	
+}
+
+int sensor_10_write(void)
+{
+	return 0;
+}
+
+int sensor_10_read(uint8_t *reading)
+{
+	uint16_t buf;
+	stm32_adc_get_value(6, &buf);
+	*reading = buf>>4;
+	return 0;
+}
+
+/* 
+ * sensor number: 11
+ * sensor name: +3.3V
+ * brief: adc_ch7
+ */
+int sensor_11_init(void)
+{
+	return 0;	
+}
+
+int sensor_11_write(void)
+{
+	return 0;
+}
+
+int sensor_11_read(uint8_t *reading)
+{
+	uint16_t buf;
+	stm32_adc_get_value(7, &buf);
+	*reading = buf>>4;
+	return 0;
+}
+
 sensor_tbl_t sensor_tbl[]=
 {
 	{
@@ -162,6 +327,83 @@ sensor_tbl_t sensor_tbl[]=
 		sensor_4_read,
 		sensor_4_write,
 		sensor_4_init,
+	},
+	
+	{	
+		5,		//sensor number
+		0,		//power on delay
+		0,		//reset delay
+		3,		//Monitor interval
+		MonitorOnStandby,	//monitor states
+		sensor_5_read,
+		sensor_5_write,
+		sensor_5_init,
+	},
+	
+	{	
+		6,		//sensor number
+		0,		//power on delay
+		0,		//reset delay
+		3,		//Monitor interval
+		MonitorOnStandby,	//monitor states
+		sensor_6_read,
+		sensor_6_write,
+		sensor_6_init,
+	},
+	
+	{	
+		7,		//sensor number
+		0,		//power on delay
+		0,		//reset delay
+		3,		//Monitor interval
+		MonitorOnStandby,	//monitor states
+		sensor_7_read,
+		sensor_7_write,
+		sensor_7_init,
+	},
+	
+	{	
+		8,		//sensor number
+		0,		//power on delay
+		0,		//reset delay
+		3,		//Monitor interval
+		MonitorOnStandby,	//monitor states
+		sensor_8_read,
+		sensor_8_write,
+		sensor_8_init,
+	},
+	
+	{	
+		9,		//sensor number
+		0,		//power on delay
+		0,		//reset delay
+		3,		//Monitor interval
+		MonitorOnStandby,	//monitor states
+		sensor_9_read,
+		sensor_9_write,
+		sensor_9_init,
+	},
+	
+	{	
+		10,		//sensor number
+		0,		//power on delay
+		0,		//reset delay
+		3,		//Monitor interval
+		MonitorOnStandby,	//monitor states
+		sensor_10_read,
+		sensor_10_write,
+		sensor_10_init,
+	},
+	
+	{	
+		11,		//sensor number
+		0,		//power on delay
+		0,		//reset delay
+		3,		//Monitor interval
+		MonitorOnStandby,	//monitor states
+		sensor_11_read,
+		sensor_11_write,
+		sensor_11_init,
 	}
 	
 };

app/bmc/sensor_sdr.c

@@ -117,7 +117,7 @@ const FullSensorRec_T full_sdr_tbl[] = {
 		*/
 		((0x0>>2)&0xC0)+(0x0&0x3F),	//B,Accuracy
 		((0x0>>2)&0xF0)+(0x0&0x0C)+0x0,	//Accuracy,Accuracy exponent
-		(0xfd<<4)+(0x0&0x0F),		//R exponent,B exponent
+		(uint8_t)(0xfd<<4)+(0x0&0x0F),		//R exponent,B exponent
 		0x0,	//Analog Characteristics Flags
 		0x7f,	//Nominal Reading
 		0xff,	//Normal Maximum
@@ -216,7 +216,7 @@ const FullSensorRec_T full_sdr_tbl[] = {
 		*/
 		((0x0>>2)&0xC0)+(0x0&0x3F),	//B,Accuracy
 		((0x0>>2)&0xF0)+(0x0&0x0C)+0x0,	//Accuracy,Accuracy exponent
-		(0xfc<<4)+(0x0&0x0F),		//R exponent,B exponent
+		(uint8_t)(0xfc<<4)+(0x0&0x0F),		//R exponent,B exponent
 		0x0,	//Analog Characteristics Flags
 		0x7f,	//Nominal Reading
 		0xff,	//Normal Maximum
@@ -435,6 +435,694 @@ const FullSensorRec_T full_sdr_tbl[] = {
 		0xC0+MAX_ID_STR_LEN,	//ID String Type / Length Code
 		"Temp_FPGA"
 	},
+/*
+ * sensor number: 5
+ * sensor name:	+1.5V
+ * brief:	adc_ch1
+ */
+	{
+		/* SDR Record Header */
+		{
+			0x06,	//Record ID
+			0x51,	//SDR Version
+			FULL_SDR_REC,	//Record Type
+			43+MAX_ID_STR_LEN,	//Record Length = 43+string length
+		},
+		/* Record Key Bytes */
+		0x20,	//Sensor Owner ID
+		0x0,	//Sensor Owner LUN
+		0x05,	//Sensor Number
+		/* Record Body Bytes */
+		0x7,	//Entity ID
+		0x1,	//Entity Instance	
+		0x7f,	//Entity Initialization
+		0x68,	//Sensor Capabilities
+		0x02,	//Sensor Type: 01-temperature, 02-voltage, 03-current, 04-fan
+		0x01,	//Event / Reading Type
+		0x7a95,	//Lower Threshold Reading Mask
+		0x7a95, //Upper Threshold Reading Mask
+		0x3f3f,	//Settable / Readable Threshold Mask
+
+		/*
+			[7:6] - Analog (numeric) Data Format**
+			00b = unsigned
+			01b = 1's complement(singed)
+			10b = 2's complement(singed)
+			11b = Does not return analog (numeric) reading
+			[5:3] - Rate unit
+			000b = none
+			001b = per µS
+			010b = per ms
+			011b = per s
+			100b = per minute
+			101b = per hour
+			110b = per day
+			111b = reserved
+			[2:1] - Modifier unit
+			00b = none
+			01b = Basic Unit / Modifier Unit
+			10b = Basic Unit * Modifier Unit
+			11b = reserved
+			[0] - Percentage 0b = no, 1b = yes
+		*/
+		(0x0<<6)+(0x0<<3)+(0x0<<1)+0x0,	//Sensor Units 1
+		/*
+			0 unspecified 
+			1 degrees C 
+			2 degrees F 
+			3 degrees K 
+			4 Volts 
+			5 Amps
+		*/
+		0x4,	//Sensor Units 2 - Base Unit
+		0x0,	//Sensor Units 3 - Modifier Unit
+		0x0,	//Linerization
+		0x81,	//M_LSB
+		/*
+			[7:6] - M: MS 2 bits
+			[5:0] - Tolerance: 6 bits, unsigned (Tolerance in +/- ½ raw counts)
+		*/
+		((0x0>>2)&0xC0)+(0x0&0x3F),	//M,Tolerance
+		0x0,	//B_LSB
+		/*
+			[7:6] - B: MS 2 bits
+			Unsigned, 10-bit Basic Sensor Accuracy in 1/100 percent scaled up by unsigned
+			Accuracy exponent:
+			[5:0] - Accuracy: LS 6 bits
+		*/
+		((0x0>>2)&0xC0)+(0x0&0x3F),	//B,Accuracy
+		((0x0>>2)&0xF0)+(0x0&0x0C)+0x0,	//Accuracy,Accuracy exponent
+		(uint8_t)(0xfc<<4)+(0x0&0x0F),		//R exponent,B exponent
+		0x0,	//Analog Characteristics Flags
+		0x7f,	//Nominal Reading
+		0xff,	//Normal Maximum
+		0x00,	//Normal Minimum
+		0xff,	//Sensor Maximum Reading
+		0x00,	//Sensor Minimum Reading
+		0xff,	//Upper Non-Recoverable Threshold
+		0xff,	//Upper Critical Threshold
+		0xff,	//Upper Non-Critical Threshold
+		0x00,	//Lower Non-Recoverable Threshold
+		0x00,	//Lower Critical Threshold
+		0x00,	//Lower Non-Critical threshold
+		0x0,	//Positive - threshold Hysteresis value
+		0x0,	//Negative - threshold Hysteresis value
+		0x0,	//Reserved
+		0x0,	//Reserved
+		0x0,	//OEM
+		0xC0+MAX_ID_STR_LEN,	//ID String Type / Length Code
+		"+1.5V"
+	},
+/*
+ * sensor number: 6
+ * sensor name:	+0.75V
+ * brief:	adc_ch2
+ */
+	{
+		/* SDR Record Header */
+		{
+			0x07,	//Record ID
+			0x51,	//SDR Version
+			FULL_SDR_REC,	//Record Type
+			43+MAX_ID_STR_LEN,	//Record Length = 43+string length
+		},
+		/* Record Key Bytes */
+		0x20,	//Sensor Owner ID
+		0x0,	//Sensor Owner LUN
+		0x06,	//Sensor Number
+		/* Record Body Bytes */
+		0x7,	//Entity ID
+		0x1,	//Entity Instance	
+		0x7f,	//Entity Initialization
+		0x68,	//Sensor Capabilities
+		0x02,	//Sensor Type: 01-temperature, 02-voltage, 03-current, 04-fan
+		0x01,	//Event / Reading Type
+		0x7a95,	//Lower Threshold Reading Mask
+		0x7a95, //Upper Threshold Reading Mask
+		0x3f3f,	//Settable / Readable Threshold Mask
+
+		/*
+			[7:6] - Analog (numeric) Data Format**
+			00b = unsigned
+			01b = 1's complement(singed)
+			10b = 2's complement(singed)
+			11b = Does not return analog (numeric) reading
+			[5:3] - Rate unit
+			000b = none
+			001b = per µS
+			010b = per ms
+			011b = per s
+			100b = per minute
+			101b = per hour
+			110b = per day
+			111b = reserved
+			[2:1] - Modifier unit
+			00b = none
+			01b = Basic Unit / Modifier Unit
+			10b = Basic Unit * Modifier Unit
+			11b = reserved
+			[0] - Percentage 0b = no, 1b = yes
+		*/
+		(0x0<<6)+(0x0<<3)+(0x0<<1)+0x0,	//Sensor Units 1
+		/*
+			0 unspecified 
+			1 degrees C 
+			2 degrees F 
+			3 degrees K 
+			4 Volts 
+			5 Amps
+		*/
+		0x4,	//Sensor Units 2 - Base Unit
+		0x0,	//Sensor Units 3 - Modifier Unit
+		0x0,	//Linerization
+		0x81,	//M_LSB
+		/*
+			[7:6] - M: MS 2 bits
+			[5:0] - Tolerance: 6 bits, unsigned (Tolerance in +/- ½ raw counts)
+		*/
+		((0x0>>2)&0xC0)+(0x0&0x3F),	//M,Tolerance
+		0x0,	//B_LSB
+		/*
+			[7:6] - B: MS 2 bits
+			Unsigned, 10-bit Basic Sensor Accuracy in 1/100 percent scaled up by unsigned
+			Accuracy exponent:
+			[5:0] - Accuracy: LS 6 bits
+		*/
+		((0x0>>2)&0xC0)+(0x0&0x3F),	//B,Accuracy
+		((0x0>>2)&0xF0)+(0x0&0x0C)+0x0,	//Accuracy,Accuracy exponent
+		(uint8_t)(0xfc<<4)+(0x0&0x0F),		//R exponent,B exponent
+		0x0,	//Analog Characteristics Flags
+		0x7f,	//Nominal Reading
+		0xff,	//Normal Maximum
+		0x00,	//Normal Minimum
+		0xff,	//Sensor Maximum Reading
+		0x00,	//Sensor Minimum Reading
+		0xff,	//Upper Non-Recoverable Threshold
+		0xff,	//Upper Critical Threshold
+		0xff,	//Upper Non-Critical Threshold
+		0x00,	//Lower Non-Recoverable Threshold
+		0x00,	//Lower Critical Threshold
+		0x00,	//Lower Non-Critical threshold
+		0x0,	//Positive - threshold Hysteresis value
+		0x0,	//Negative - threshold Hysteresis value
+		0x0,	//Reserved
+		0x0,	//Reserved
+		0x0,	//OEM
+		0xC0+MAX_ID_STR_LEN,	//ID String Type / Length Code
+		"+0.75V"
+	},
+/*
+ * sensor number: 7
+ * sensor name:	+1.8V
+ * brief:	adc_ch3
+ */
+	{
+		/* SDR Record Header */
+		{
+			0x08,	//Record ID
+			0x51,	//SDR Version
+			FULL_SDR_REC,	//Record Type
+			43+MAX_ID_STR_LEN,	//Record Length = 43+string length
+		},
+		/* Record Key Bytes */
+		0x20,	//Sensor Owner ID
+		0x0,	//Sensor Owner LUN
+		0x07,	//Sensor Number
+		/* Record Body Bytes */
+		0x7,	//Entity ID
+		0x1,	//Entity Instance	
+		0x7f,	//Entity Initialization
+		0x68,	//Sensor Capabilities
+		0x02,	//Sensor Type: 01-temperature, 02-voltage, 03-current, 04-fan
+		0x01,	//Event / Reading Type
+		0x7a95,	//Lower Threshold Reading Mask
+		0x7a95, //Upper Threshold Reading Mask
+		0x3f3f,	//Settable / Readable Threshold Mask
+
+		/*
+			[7:6] - Analog (numeric) Data Format**
+			00b = unsigned
+			01b = 1's complement(singed)
+			10b = 2's complement(singed)
+			11b = Does not return analog (numeric) reading
+			[5:3] - Rate unit
+			000b = none
+			001b = per µS
+			010b = per ms
+			011b = per s
+			100b = per minute
+			101b = per hour
+			110b = per day
+			111b = reserved
+			[2:1] - Modifier unit
+			00b = none
+			01b = Basic Unit / Modifier Unit
+			10b = Basic Unit * Modifier Unit
+			11b = reserved
+			[0] - Percentage 0b = no, 1b = yes
+		*/
+		(0x0<<6)+(0x0<<3)+(0x0<<1)+0x0,	//Sensor Units 1
+		/*
+			0 unspecified 
+			1 degrees C 
+			2 degrees F 
+			3 degrees K 
+			4 Volts 
+			5 Amps
+		*/
+		0x4,	//Sensor Units 2 - Base Unit
+		0x0,	//Sensor Units 3 - Modifier Unit
+		0x0,	//Linerization
+		0x81,	//M_LSB
+		/*
+			[7:6] - M: MS 2 bits
+			[5:0] - Tolerance: 6 bits, unsigned (Tolerance in +/- ½ raw counts)
+		*/
+		((0x0>>2)&0xC0)+(0x0&0x3F),	//M,Tolerance
+		0x0,	//B_LSB
+		/*
+			[7:6] - B: MS 2 bits
+			Unsigned, 10-bit Basic Sensor Accuracy in 1/100 percent scaled up by unsigned
+			Accuracy exponent:
+			[5:0] - Accuracy: LS 6 bits
+		*/
+		((0x0>>2)&0xC0)+(0x0&0x3F),	//B,Accuracy
+		((0x0>>2)&0xF0)+(0x0&0x0C)+0x0,	//Accuracy,Accuracy exponent
+		(uint8_t)(0xfc<<4)+(0x0&0x0F),		//R exponent,B exponent
+		0x0,	//Analog Characteristics Flags
+		0x7f,	//Nominal Reading
+		0xff,	//Normal Maximum
+		0x00,	//Normal Minimum
+		0xff,	//Sensor Maximum Reading
+		0x00,	//Sensor Minimum Reading
+		0xff,	//Upper Non-Recoverable Threshold
+		0xff,	//Upper Critical Threshold
+		0xff,	//Upper Non-Critical Threshold
+		0x00,	//Lower Non-Recoverable Threshold
+		0x00,	//Lower Critical Threshold
+		0x00,	//Lower Non-Critical threshold
+		0x0,	//Positive - threshold Hysteresis value
+		0x0,	//Negative - threshold Hysteresis value
+		0x0,	//Reserved
+		0x0,	//Reserved
+		0x0,	//OEM
+		0xC0+MAX_ID_STR_LEN,	//ID String Type / Length Code
+		"+1.8V"
+	},
+/*
+ * sensor number: 8
+ * sensor name:	+1.2V
+ * brief:	adc_ch4
+ */
+	{
+		/* SDR Record Header */
+		{
+			0x09,	//Record ID
+			0x51,	//SDR Version
+			FULL_SDR_REC,	//Record Type
+			43+MAX_ID_STR_LEN,	//Record Length = 43+string length
+		},
+		/* Record Key Bytes */
+		0x20,	//Sensor Owner ID
+		0x0,	//Sensor Owner LUN
+		0x08,	//Sensor Number
+		/* Record Body Bytes */
+		0x7,	//Entity ID
+		0x1,	//Entity Instance	
+		0x7f,	//Entity Initialization
+		0x68,	//Sensor Capabilities
+		0x02,	//Sensor Type: 01-temperature, 02-voltage, 03-current, 04-fan
+		0x01,	//Event / Reading Type
+		0x7a95,	//Lower Threshold Reading Mask
+		0x7a95, //Upper Threshold Reading Mask
+		0x3f3f,	//Settable / Readable Threshold Mask
+
+		/*
+			[7:6] - Analog (numeric) Data Format**
+			00b = unsigned
+			01b = 1's complement(singed)
+			10b = 2's complement(singed)
+			11b = Does not return analog (numeric) reading
+			[5:3] - Rate unit
+			000b = none
+			001b = per µS
+			010b = per ms
+			011b = per s
+			100b = per minute
+			101b = per hour
+			110b = per day
+			111b = reserved
+			[2:1] - Modifier unit
+			00b = none
+			01b = Basic Unit / Modifier Unit
+			10b = Basic Unit * Modifier Unit
+			11b = reserved
+			[0] - Percentage 0b = no, 1b = yes
+		*/
+		(0x0<<6)+(0x0<<3)+(0x0<<1)+0x0,	//Sensor Units 1
+		/*
+			0 unspecified 
+			1 degrees C 
+			2 degrees F 
+			3 degrees K 
+			4 Volts 
+			5 Amps
+		*/
+		0x4,	//Sensor Units 2 - Base Unit
+		0x0,	//Sensor Units 3 - Modifier Unit
+		0x0,	//Linerization
+		0x81,	//M_LSB
+		/*
+			[7:6] - M: MS 2 bits
+			[5:0] - Tolerance: 6 bits, unsigned (Tolerance in +/- ½ raw counts)
+		*/
+		((0x0>>2)&0xC0)+(0x0&0x3F),	//M,Tolerance
+		0x0,	//B_LSB
+		/*
+			[7:6] - B: MS 2 bits
+			Unsigned, 10-bit Basic Sensor Accuracy in 1/100 percent scaled up by unsigned
+			Accuracy exponent:
+			[5:0] - Accuracy: LS 6 bits
+		*/
+		((0x0>>2)&0xC0)+(0x0&0x3F),	//B,Accuracy
+		((0x0>>2)&0xF0)+(0x0&0x0C)+0x0,	//Accuracy,Accuracy exponent
+		(uint8_t)(0xfc<<4)+(0x0&0x0F),		//R exponent,B exponent
+		0x0,	//Analog Characteristics Flags
+		0x7f,	//Nominal Reading
+		0xff,	//Normal Maximum
+		0x00,	//Normal Minimum
+		0xff,	//Sensor Maximum Reading
+		0x00,	//Sensor Minimum Reading
+		0xff,	//Upper Non-Recoverable Threshold
+		0xff,	//Upper Critical Threshold
+		0xff,	//Upper Non-Critical Threshold
+		0x00,	//Lower Non-Recoverable Threshold
+		0x00,	//Lower Critical Threshold
+		0x00,	//Lower Non-Critical threshold
+		0x0,	//Positive - threshold Hysteresis value
+		0x0,	//Negative - threshold Hysteresis value
+		0x0,	//Reserved
+		0x0,	//Reserved
+		0x0,	//OEM
+		0xC0+MAX_ID_STR_LEN,	//ID String Type / Length Code
+		"+1.2V"
+	},
+/*
+ * sensor number: 9
+ * sensor name:	+1.0V
+ * brief:	adc_ch5
+ */
+	{
+		/* SDR Record Header */
+		{
+			0x0A,	//Record ID
+			0x51,	//SDR Version
+			FULL_SDR_REC,	//Record Type
+			43+MAX_ID_STR_LEN,	//Record Length = 43+string length
+		},
+		/* Record Key Bytes */
+		0x20,	//Sensor Owner ID
+		0x0,	//Sensor Owner LUN
+		0x09,	//Sensor Number
+		/* Record Body Bytes */
+		0x7,	//Entity ID
+		0x1,	//Entity Instance	
+		0x7f,	//Entity Initialization
+		0x68,	//Sensor Capabilities
+		0x02,	//Sensor Type: 01-temperature, 02-voltage, 03-current, 04-fan
+		0x01,	//Event / Reading Type
+		0x7a95,	//Lower Threshold Reading Mask
+		0x7a95, //Upper Threshold Reading Mask
+		0x3f3f,	//Settable / Readable Threshold Mask
+
+		/*
+			[7:6] - Analog (numeric) Data Format**
+			00b = unsigned
+			01b = 1's complement(singed)
+			10b = 2's complement(singed)
+			11b = Does not return analog (numeric) reading
+			[5:3] - Rate unit
+			000b = none
+			001b = per µS
+			010b = per ms
+			011b = per s
+			100b = per minute
+			101b = per hour
+			110b = per day
+			111b = reserved
+			[2:1] - Modifier unit
+			00b = none
+			01b = Basic Unit / Modifier Unit
+			10b = Basic Unit * Modifier Unit
+			11b = reserved
+			[0] - Percentage 0b = no, 1b = yes
+		*/
+		(0x0<<6)+(0x0<<3)+(0x0<<1)+0x0,	//Sensor Units 1
+		/*
+			0 unspecified 
+			1 degrees C 
+			2 degrees F 
+			3 degrees K 
+			4 Volts 
+			5 Amps
+		*/
+		0x4,	//Sensor Units 2 - Base Unit
+		0x0,	//Sensor Units 3 - Modifier Unit
+		0x0,	//Linerization
+		0x81,	//M_LSB
+		/*
+			[7:6] - M: MS 2 bits
+			[5:0] - Tolerance: 6 bits, unsigned (Tolerance in +/- ½ raw counts)
+		*/
+		((0x0>>2)&0xC0)+(0x0&0x3F),	//M,Tolerance
+		0x0,	//B_LSB
+		/*
+			[7:6] - B: MS 2 bits
+			Unsigned, 10-bit Basic Sensor Accuracy in 1/100 percent scaled up by unsigned
+			Accuracy exponent:
+			[5:0] - Accuracy: LS 6 bits
+		*/
+		((0x0>>2)&0xC0)+(0x0&0x3F),	//B,Accuracy
+		((0x0>>2)&0xF0)+(0x0&0x0C)+0x0,	//Accuracy,Accuracy exponent
+		(uint8_t)(0xfc<<4)+(0x0&0x0F),		//R exponent,B exponent
+		0x0,	//Analog Characteristics Flags
+		0x7f,	//Nominal Reading
+		0xff,	//Normal Maximum
+		0x00,	//Normal Minimum
+		0xff,	//Sensor Maximum Reading
+		0x00,	//Sensor Minimum Reading
+		0xff,	//Upper Non-Recoverable Threshold
+		0xff,	//Upper Critical Threshold
+		0xff,	//Upper Non-Critical Threshold
+		0x00,	//Lower Non-Recoverable Threshold
+		0x00,	//Lower Critical Threshold
+		0x00,	//Lower Non-Critical threshold
+		0x0,	//Positive - threshold Hysteresis value
+		0x0,	//Negative - threshold Hysteresis value
+		0x0,	//Reserved
+		0x0,	//Reserved
+		0x0,	//OEM
+		0xC0+MAX_ID_STR_LEN,	//ID String Type / Length Code
+		"+1.0V"
+	},
+/*
+ * sensor number: 10
+ * sensor name:	+2.5V
+ * brief:	adc_ch6
+ */
+	{
+		/* SDR Record Header */
+		{
+			0x0B,	//Record ID
+			0x51,	//SDR Version
+			FULL_SDR_REC,	//Record Type
+			43+MAX_ID_STR_LEN,	//Record Length = 43+string length
+		},
+		/* Record Key Bytes */
+		0x20,	//Sensor Owner ID
+		0x0,	//Sensor Owner LUN
+		0x0A,	//Sensor Number
+		/* Record Body Bytes */
+		0x7,	//Entity ID
+		0x1,	//Entity Instance	
+		0x7f,	//Entity Initialization
+		0x68,	//Sensor Capabilities
+		0x02,	//Sensor Type: 01-temperature, 02-voltage, 03-current, 04-fan
+		0x01,	//Event / Reading Type
+		0x7a95,	//Lower Threshold Reading Mask
+		0x7a95, //Upper Threshold Reading Mask
+		0x3f3f,	//Settable / Readable Threshold Mask
+
+		/*
+			[7:6] - Analog (numeric) Data Format**
+			00b = unsigned
+			01b = 1's complement(singed)
+			10b = 2's complement(singed)
+			11b = Does not return analog (numeric) reading
+			[5:3] - Rate unit
+			000b = none
+			001b = per µS
+			010b = per ms
+			011b = per s
+			100b = per minute
+			101b = per hour
+			110b = per day
+			111b = reserved
+			[2:1] - Modifier unit
+			00b = none
+			01b = Basic Unit / Modifier Unit
+			10b = Basic Unit * Modifier Unit
+			11b = reserved
+			[0] - Percentage 0b = no, 1b = yes
+		*/
+		(0x0<<6)+(0x0<<3)+(0x0<<1)+0x0,	//Sensor Units 1
+		/*
+			0 unspecified 
+			1 degrees C 
+			2 degrees F 
+			3 degrees K 
+			4 Volts 
+			5 Amps
+		*/
+		0x4,	//Sensor Units 2 - Base Unit
+		0x0,	//Sensor Units 3 - Modifier Unit
+		0x0,	//Linerization
+		0x81,	//M_LSB
+		/*
+			[7:6] - M: MS 2 bits
+			[5:0] - Tolerance: 6 bits, unsigned (Tolerance in +/- ½ raw counts)
+		*/
+		((0x0>>2)&0xC0)+(0x0&0x3F),	//M,Tolerance
+		0x0,	//B_LSB
+		/*
+			[7:6] - B: MS 2 bits
+			Unsigned, 10-bit Basic Sensor Accuracy in 1/100 percent scaled up by unsigned
+			Accuracy exponent:
+			[5:0] - Accuracy: LS 6 bits
+		*/
+		((0x0>>2)&0xC0)+(0x0&0x3F),	//B,Accuracy
+		((0x0>>2)&0xF0)+(0x0&0x0C)+0x0,	//Accuracy,Accuracy exponent
+		(uint8_t)(0xfc<<4)+(0x0&0x0F),		//R exponent,B exponent
+		0x0,	//Analog Characteristics Flags
+		0x7f,	//Nominal Reading
+		0xff,	//Normal Maximum
+		0x00,	//Normal Minimum
+		0xff,	//Sensor Maximum Reading
+		0x00,	//Sensor Minimum Reading
+		0xff,	//Upper Non-Recoverable Threshold
+		0xff,	//Upper Critical Threshold
+		0xff,	//Upper Non-Critical Threshold
+		0x00,	//Lower Non-Recoverable Threshold
+		0x00,	//Lower Critical Threshold
+		0x00,	//Lower Non-Critical threshold
+		0x0,	//Positive - threshold Hysteresis value
+		0x0,	//Negative - threshold Hysteresis value
+		0x0,	//Reserved
+		0x0,	//Reserved
+		0x0,	//OEM
+		0xC0+MAX_ID_STR_LEN,	//ID String Type / Length Code
+		"+2.5V"
+	},
+/*
+ * sensor number: 11
+ * sensor name:	+3.3V
+ * brief:	adc_ch7
+ */
+	{
+		/* SDR Record Header */
+		{
+			0x0C,	//Record ID
+			0x51,	//SDR Version
+			FULL_SDR_REC,	//Record Type
+			43+MAX_ID_STR_LEN,	//Record Length = 43+string length
+		},
+		/* Record Key Bytes */
+		0x20,	//Sensor Owner ID
+		0x0,	//Sensor Owner LUN
+		0x0B,	//Sensor Number
+		/* Record Body Bytes */
+		0x7,	//Entity ID
+		0x1,	//Entity Instance	
+		0x7f,	//Entity Initialization
+		0x68,	//Sensor Capabilities
+		0x02,	//Sensor Type: 01-temperature, 02-voltage, 03-current, 04-fan
+		0x01,	//Event / Reading Type
+		0x7a95,	//Lower Threshold Reading Mask
+		0x7a95, //Upper Threshold Reading Mask
+		0x3f3f,	//Settable / Readable Threshold Mask
+
+		/*
+			[7:6] - Analog (numeric) Data Format**
+			00b = unsigned
+			01b = 1's complement(singed)
+			10b = 2's complement(singed)
+			11b = Does not return analog (numeric) reading
+			[5:3] - Rate unit
+			000b = none
+			001b = per µS
+			010b = per ms
+			011b = per s
+			100b = per minute
+			101b = per hour
+			110b = per day
+			111b = reserved
+			[2:1] - Modifier unit
+			00b = none
+			01b = Basic Unit / Modifier Unit
+			10b = Basic Unit * Modifier Unit
+			11b = reserved
+			[0] - Percentage 0b = no, 1b = yes
+		*/
+		(0x0<<6)+(0x0<<3)+(0x0<<1)+0x0,	//Sensor Units 1
+		/*
+			0 unspecified 
+			1 degrees C 
+			2 degrees F 
+			3 degrees K 
+			4 Volts 
+			5 Amps
+		*/
+		0x4,	//Sensor Units 2 - Base Unit
+		0x0,	//Sensor Units 3 - Modifier Unit
+		0x0,	//Linerization
+		/* M = 0x103 */
+		(0x103 & 0xff),	//M_LSB
+		/*
+			[7:6] - M: MS 2 bits
+			[5:0] - Tolerance: 6 bits, unsigned (Tolerance in +/- ½ raw counts)
+		*/
+		((0x103>>2)&0xC0)+(0x0&0x3F),	//M,Tolerance
+		0x0,	//B_LSB
+		/*
+			[7:6] - B: MS 2 bits
+			Unsigned, 10-bit Basic Sensor Accuracy in 1/100 percent scaled up by unsigned
+			Accuracy exponent:
+			[5:0] - Accuracy: LS 6 bits
+		*/
+		((0x0>>2)&0xC0)+(0x0&0x3F),	//B,Accuracy
+		((0x0>>2)&0xF0)+(0x0&0x0C)+0x0,	//Accuracy,Accuracy exponent
+		(uint8_t)(0xfc<<4)+(0x0&0x0F),		//R exponent,B exponent
+		0x0,	//Analog Characteristics Flags
+		0x7f,	//Nominal Reading
+		0xff,	//Normal Maximum
+		0x00,	//Normal Minimum
+		0xff,	//Sensor Maximum Reading
+		0x00,	//Sensor Minimum Reading
+		0xff,	//Upper Non-Recoverable Threshold
+		0xff,	//Upper Critical Threshold
+		0xff,	//Upper Non-Critical Threshold
+		0x00,	//Lower Non-Recoverable Threshold
+		0x00,	//Lower Critical Threshold
+		0x00,	//Lower Non-Critical threshold
+		0x0,	//Positive - threshold Hysteresis value
+		0x0,	//Negative - threshold Hysteresis value
+		0x0,	//Reserved
+		0x0,	//Reserved
+		0x0,	//OEM
+		0xC0+MAX_ID_STR_LEN,	//ID String Type / Length Code
+		"+3.3V"
+	},
+
 };
 
 const CompactSensorRec_T Compact_sdr_tbl[]	=	{

app/common_include/com_IPMIDefs.h

@@ -93,6 +93,15 @@
 #define LAN_IFC_Q   "/var/LAN_IFC_Q"
 #define LAN_RES_Q   "/var/LAN_RES_Q"
 
+/* ---------------------------------------------
+ * IPMB
+ * ---------------------------------------------*/
+#define PRIMARY_IPMB_IFC_Q   "/var/Primary_IPMB_IFC_Q"
+#define PRIMARY_IPMB_RES_Q   "/var/Primary_IPMB_RES_Q"
+#define SECONDARY_IPMB_IFC_Q   "/var/Secondary_IPMB_IFC_Q"
+#define SECONDARY_IPMB_RES_Q   "/var/Secondary_IPMB_RES_Q"
+#define MIN_IPMB_MSG_LENGTH		7
+
 /* ---------------------------------------------
  * MsgHndlr
  * ---------------------------------------------*/

app/driver/ADC/adc_main.c

@@ -20,8 +20,6 @@
 #include "driver.h"
 #include "stm32_hal_legacy.h"
 
-static int major = MAJOR_ADC;
-static int minor = 0;
 //static dev_t devno;
 //static struct cdev *adc_cdev = NULL;
 //static int count  = 3;
@@ -39,7 +37,7 @@ struct adc_device {
 	IRQn_Type	DMA_IRQn;
 } adc_dev[NUM_OF_DEVICES];
 
-uint32_t gAdc1Value[10][4];
+uint16_t gAdc1Value[10][7];
 
 static int adc_open(struct inode *inode, struct file *filep);
 static int adc_close(struct inode *inode, struct file *filep);
@@ -59,66 +57,12 @@ static struct file_operations adc_ops =
 
 static int adc_open(struct inode *inode, struct file *filep)
 {
-	int imajor,iminor;
-	// ADC_HandleTypeDef hadc;
-	imajor = MAJOR(inode->i_rdev);
-	iminor = MINOR(inode->i_rdev);
-
-	printk("adc open, major %d, minor %d\n", imajor, iminor);
-	// if(imajor != MAJOR_ADC)
-	// {
-	// 	printk("Error: %s %d adc major fail! %d\n",__FILE__,__LINE__,imajor);
-	// 	return -1;
-	// }
-	// switch(iminor)
-	// {
-	// case 0:
-	// 	hadc.Instance = ADC1;
-	// 	__HAL_RCC_ADC1_CLK_ENABLE();
-	// 	break;
-	// case 1:
-	// 	hadc.Instance = ADC2;
-	// 	__HAL_RCC_ADC2_CLK_ENABLE();
-	// 	break;
-	// case 2:
-	// 	hadc.Instance = ADC3;
-	// 	__HAL_RCC_ADC3_CLK_ENABLE();
-	// 	break;
-	// }
-	
-	// __HAL_ADC_ENABLE(&hadc);
 	return 0;
 }
 
 static int adc_close(struct inode *inode, struct file *filep)
 {
-	int imajor,iminor;
-	ADC_HandleTypeDef handle_adc;
-	imajor = MAJOR(inode->i_rdev);
-	iminor = MINOR(inode->i_rdev);
-	if(imajor != MAJOR_ADC)
-	{
-		printk("Error: %s %d adc major fail! %d\n",__FILE__,__LINE__,imajor);
-		return -1;
-	}
-	switch(iminor)
-	{
-	case 0:
-		handle_adc.Instance = ADC1;
-		__HAL_RCC_ADC1_CLK_DISABLE();
-		break;
-	case 1:
-		handle_adc.Instance = ADC2;
-		__HAL_RCC_ADC1_CLK_DISABLE();
-		break;
-	case 2:
-		handle_adc.Instance = ADC3;
-		__HAL_RCC_ADC1_CLK_DISABLE();
-		break;
-	}
-
-	printk("adc close, major %d, minor %d\n", imajor, iminor);
-	__HAL_ADC_DISABLE(&handle_adc);
+	//__HAL_ADC_DISABLE(&handle_adc);
 	return 0;
 }
 
@@ -130,280 +74,89 @@ static ssize_t adc_read(struct file *filep, char __user *buf, size_t size, loff_
 
 static ssize_t adc_write(struct file *filep, const char __user *buf, size_t size, loff_t *offset)
 {
-/*	uint32_t i;
-	uint8_t	tmp_buf[100];
-	printk("fmc_write");
-	for(i=0;i<size;i++)
-		tmp_buf[i] = *(uint8_t*)(offset+i);
-	copy_to_user();*/
 	return 0;
 }
 
 static int adc_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
 {
 	int i;	
-	// if ( copy_from_user(&fmc_arg, (void*)arg, sizeof(fmc_cpld_t)) )
-	// 	return -EFAULT;
+	adc_arg_t adc_arg;
+	if ( copy_from_user((void*)&adc_arg, (void*)arg, 1) )
+	 	return -EFAULT;
+
+	if((adc_arg.channel < 1) || (adc_arg.channel > 7))
+		return -EFAULT;
 
 	switch(cmd)
 	{
-		case ADC_GET_RESULT:	
+		case ADC_GET_RESULT:
 			for(i=0;i<10;i++)
-				printk("%d : %#x, %#x, %#x, %#x\n", i, gAdc1Value[i][0], gAdc1Value[i][1], gAdc1Value[i][2], gAdc1Value[i][3]);
+				adc_arg.value[i] = gAdc1Value[i][adc_arg.channel-1];
+
+			copy_to_user((void*)arg, (void*)&adc_arg, sizeof(adc_arg_t));
 		break;
 		default:
 			printk("Invalid command!\n");
 			break;	
-	}
+	} 
 	
 	return 0;
 }
 
 ADC_HandleTypeDef  hadc;
 DMA_HandleTypeDef  hdma_adc;
-/**
-  * @brief  Handles DMA interrupt request.
-  * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
-  *               the configuration information for the specified DMA Stream.  
-  * @retval None
-  */
-irqreturn_t HAL_DMA_IRQHandler(int irqno, void *dev_id )
-{
-	uint32_t tmpisr;
-	__IO uint32_t count = 0U;
-	uint32_t timeout = 18750;	//SystemCoreClock / 9600U;
-	DMA_HandleTypeDef *hdma = &hdma_adc;
-	/* calculate DMA base and stream number */
-	DMA_Base_Registers *regs = (DMA_Base_Registers *)hdma->StreamBaseAddress;
 
-	tmpisr = regs->ISR;
 
-	/* Transfer Error Interrupt management ***************************************/
-	if ((tmpisr & (DMA_FLAG_TEIF0_4 << hdma->StreamIndex)) != RESET)
-	{
-		if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TE) != RESET)
-		{
-			/* Disable the transfer error interrupt */
-			hdma->Instance->CR  &= ~(DMA_IT_TE);
-
-			/* Clear the transfer error flag */
-			regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex;
-
-			/* Update error code */
-			hdma->ErrorCode |= HAL_DMA_ERROR_TE;
-		}
-	}
+// /**
+//   * @brief  Handles DMA interrupt request.
+//   * @param  hdma pointer to a DMA_HandleTypeDef structure that contains
+//   *               the configuration information for the specified DMA Stream.  
+//   * @retval None
+//   */
+// irqreturn_t HAL_DMA_IRQHandler(int irqno, void *dev_id )
+// {
 
-	/* FIFO Error Interrupt management ******************************************/
-	if ((tmpisr & (DMA_FLAG_FEIF0_4 << hdma->StreamIndex)) != RESET)
-	{
-		if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_FE) != RESET)
-		{
-			/* Clear the FIFO error flag */
-			regs->IFCR = DMA_FLAG_FEIF0_4 << hdma->StreamIndex;
-
-			/* Update error code */
-			hdma->ErrorCode |= HAL_DMA_ERROR_FE;
-		}
-	}
-
-	/* Direct Mode Error Interrupt management ***********************************/
-	if ((tmpisr & (DMA_FLAG_DMEIF0_4 << hdma->StreamIndex)) != RESET)
-	{
-		if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_DME) != RESET)
-		{
-			/* Clear the direct mode error flag */
-			regs->IFCR = DMA_FLAG_DMEIF0_4 << hdma->StreamIndex;
-
-			/* Update error code */
-			hdma->ErrorCode |= HAL_DMA_ERROR_DME;
-		}
-	}
-
-	/* Half Transfer Complete Interrupt management ******************************/
-	if ((tmpisr & (DMA_FLAG_HTIF0_4 << hdma->StreamIndex)) != RESET)
-	{
-		if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_HT) != RESET)
-		{
-			/* Clear the half transfer complete flag */
-			regs->IFCR = DMA_FLAG_HTIF0_4 << hdma->StreamIndex;
-
-			/* Multi_Buffering mode enabled */
-			if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET)
-			{
-				/* Current memory buffer used is Memory 0 */
-				if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
-				{
-					if(hdma->XferHalfCpltCallback != NULL)
-					{
-						/* Half transfer callback */
-						hdma->XferHalfCpltCallback(hdma);
-					}
-				}
-				/* Current memory buffer used is Memory 1 */
-				else
-				{
-					if(hdma->XferM1HalfCpltCallback != NULL)
-					{
-						/* Half transfer callback */
-						hdma->XferM1HalfCpltCallback(hdma);
-					}
-				}
-			}
-			else
-			{
-				/* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
-				if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET)
-				{
-					/* Disable the half transfer interrupt */
-					hdma->Instance->CR  &= ~(DMA_IT_HT);
-				}
-
-				if(hdma->XferHalfCpltCallback != NULL)
-				{
-					/* Half transfer callback */
-					hdma->XferHalfCpltCallback(hdma);
-				}
-			}
-		}
-	}
-
-	/* Transfer Complete Interrupt management ***********************************/
-	if ((tmpisr & (DMA_FLAG_TCIF0_4 << hdma->StreamIndex)) != RESET)
-	{
-		if(__HAL_DMA_GET_IT_SOURCE(hdma, DMA_IT_TC) != RESET)
-		{
-			/* Clear the transfer complete flag */
-			regs->IFCR = DMA_FLAG_TCIF0_4 << hdma->StreamIndex;
-
-			if(HAL_DMA_STATE_ABORT == hdma->State)
-			{
-				/* Disable all the transfer interrupts */
-				hdma->Instance->CR  &= ~(DMA_IT_TC | DMA_IT_TE | DMA_IT_DME);
-				hdma->Instance->FCR &= ~(DMA_IT_FE);
-
-				if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
-				{
-					hdma->Instance->CR  &= ~(DMA_IT_HT);
-				}
-
-				/* Clear all interrupt flags at correct offset within the register */
-				regs->IFCR = 0x3FU << hdma->StreamIndex;
-
-				/* Process Unlocked */
-				__HAL_UNLOCK(hdma);
-
-				/* Change the DMA state */
-				hdma->State = HAL_DMA_STATE_READY;
-
-				if(hdma->XferAbortCallback != NULL)
-				{
-					hdma->XferAbortCallback(hdma);
-				}
-				return IRQ_HANDLED;
-			}
-
-			if(((hdma->Instance->CR) & (uint32_t)(DMA_SxCR_DBM)) != RESET)
-			{
-				/* Current memory buffer used is Memory 0 */
-				if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
-				{
-					if(hdma->XferM1CpltCallback != NULL)
-					{
-						/* Transfer complete Callback for memory1 */
-						hdma->XferM1CpltCallback(hdma);
-					}
-				}
-				/* Current memory buffer used is Memory 1 */
-				else
-				{
-					if(hdma->XferCpltCallback != NULL)
-					{
-						/* Transfer complete Callback for memory0 */
-						hdma->XferCpltCallback(hdma);
-					}
-				}
-			}
-			/* Disable the transfer complete interrupt if the DMA mode is not CIRCULAR */
-			else
-			{
-				if((hdma->Instance->CR & DMA_SxCR_CIRC) == RESET)
-				{
-					/* Disable the transfer complete interrupt */
-					hdma->Instance->CR  &= ~(DMA_IT_TC);
-
-					/* Process Unlocked */
-					__HAL_UNLOCK(hdma);
-
-					/* Change the DMA state */
-					hdma->State = HAL_DMA_STATE_READY;
-				}
-
-				if(hdma->XferCpltCallback != NULL)
-				{
-					/* Transfer complete callback */
-					hdma->XferCpltCallback(hdma);
-				}				
-			}
-		}
-	}
-
-	/* manage error case */
-	if(hdma->ErrorCode != HAL_DMA_ERROR_NONE)
-	{
-		if((hdma->ErrorCode & HAL_DMA_ERROR_TE) != RESET)
-		{
-			hdma->State = HAL_DMA_STATE_ABORT;
-
-			/* Disable the stream */
-			__HAL_DMA_DISABLE(hdma);
-
-			do
-			{
-				if (++count > timeout)
-				{
-				 	break;
-				}
-			}
-			while((hdma->Instance->CR & DMA_SxCR_EN) != RESET);
-
-			/* Process Unlocked */
-			__HAL_UNLOCK(hdma);
-
-			/* Change the DMA state */
-			hdma->State = HAL_DMA_STATE_READY;
-		}
-
-		if(hdma->XferErrorCallback != NULL)
-		{
-			/* Transfer error callback */
-			hdma->XferErrorCallback(hdma);
-		}
-	}
-	return IRQ_HANDLED;
-}
+// 	return IRQ_HANDLED;
+// }
 	
 
 int adc_hw_init(void)
 {
 	ADC_ChannelConfTypeDef sConfig;
 	GPIO_InitTypeDef  GPIO_InitStruct;
+
 	/* ADC1 
+	 * PA0 - ADC1_IN0
 	 * PA3 - ADC1_IN3
 	 * PA4 - ADC1_IN4
 	 * PA5 - ADC1_IN5
 	 * PA6 - ADC1_IN6
+	 * PB0 - ADC1_IN8
+	 * PB1 - ADC1_IN9
 	*/
 	__HAL_RCC_GPIOA_CLK_ENABLE();
+	__HAL_RCC_GPIOB_CLK_ENABLE();
+	__HAL_RCC_GPIOF_CLK_ENABLE();
 
-	GPIO_InitStruct.Pin 	= GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6;
+	GPIO_InitStruct.Pin 	= GPIO_PIN_0 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6;
 	GPIO_InitStruct.Mode	= GPIO_MODE_ANALOG;
 	GPIO_InitStruct.Pull    = GPIO_NOPULL;
 	HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+	GPIO_InitStruct.Pin 	= GPIO_PIN_0 | GPIO_PIN_1;
+	GPIO_InitStruct.Mode	= GPIO_MODE_ANALOG;
+	GPIO_InitStruct.Pull    = GPIO_NOPULL;
+	HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 	
+	GPIO_InitStruct.Pin 	= GPIO_PIN_10;
+	GPIO_InitStruct.Mode	= GPIO_MODE_ANALOG;
+	GPIO_InitStruct.Pull    = GPIO_NOPULL;
+	HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+	__HAL_RCC_ADC1_CLK_ENABLE();
 	hadc.Instance          = ADC1;
   
-	hadc.Init.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV2;
+	hadc.Init.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV8;
 	hadc.Init.Resolution = ADC_RESOLUTION_12B;
 	hadc.Init.ScanConvMode = ENABLE;
 	hadc.Init.ContinuousConvMode = ENABLE;
@@ -412,7 +165,7 @@ int adc_hw_init(void)
 	//hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
 	hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START;
 	hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT;
-	hadc.Init.NbrOfConversion = 4;
+	hadc.Init.NbrOfConversion = 7;
 	hadc.Init.DMAContinuousRequests = ENABLE;
 	hadc.Init.EOCSelection = DISABLE;
       
@@ -421,109 +174,132 @@ int adc_hw_init(void)
 		printk(KERN_ERR"adc hw init error!\n");
 	}
 
-  	sConfig.SamplingTime = ADC_SAMPLETIME_3CYCLES;
+  	sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
   	sConfig.Offset = 0;
   
   	sConfig.Rank = 1;
-  	sConfig.Channel = ADC_CHANNEL_3;
+  	sConfig.Channel = ADC_CHANNEL_0;
   	if(HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
   	{
     	printk(KERN_ERR"adc channel3 init error!\n");
   	}
 
   	sConfig.Rank = 2;
+  	sConfig.Channel = ADC_CHANNEL_3;
+  	if(HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
+  	{
+    	printk(KERN_ERR"adc channel3 init error!\n");
+  	}
+
+  	sConfig.Rank = 3;
   	sConfig.Channel = ADC_CHANNEL_4;
   	if(HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
   	{
     	printk(KERN_ERR"adc channel4 init error!\n");
   	}
 
-  	sConfig.Rank = 3;
+  	sConfig.Rank = 4;
   	sConfig.Channel = ADC_CHANNEL_5;
   	if(HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
   	{
     	printk(KERN_ERR"adc channel5 init error!\n");
   	}
 
-  	sConfig.Rank = 4;
+  	sConfig.Rank = 5;
   	sConfig.Channel = ADC_CHANNEL_6;
   	if(HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
   	{
     	printk(KERN_ERR"adc channel6 init error!\n");
   	}
 
-  	__HAL_RCC_ADC1_CLK_ENABLE();
-  	__HAL_ADC_ENABLE(&hadc);
+  	sConfig.Rank = 6;
+  	sConfig.Channel = ADC_CHANNEL_8;
+  	if(HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
+  	{
+    	printk(KERN_ERR"adc channel3 init error!\n");
+  	}
+
+  	sConfig.Rank = 7;
+  	sConfig.Channel = ADC_CHANNEL_9;
+  	if(HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
+  	{
+    	printk(KERN_ERR"adc channel3 init error!\n");
+  	}
+
+ // 	__HAL_ADC_ENABLE(&hadc);
+
 
   	// config dma
+  	__HAL_RCC_DMA2_CLK_ENABLE();
   	hdma_adc.Instance = DMA2_Stream0;
   
 	hdma_adc.Init.Channel  = DMA_CHANNEL_0;
 	hdma_adc.Init.Direction = DMA_PERIPH_TO_MEMORY;
 	hdma_adc.Init.PeriphInc = DMA_PINC_DISABLE;
 	hdma_adc.Init.MemInc = DMA_MINC_ENABLE;
-	hdma_adc.Init.PeriphDataAlignment = DMA_PDATAALIGN_WORD;
-	hdma_adc.Init.MemDataAlignment = DMA_MDATAALIGN_WORD;
+	hdma_adc.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+	hdma_adc.Init.MemDataAlignment = DMA_PDATAALIGN_HALFWORD;
 	hdma_adc.Init.Mode = DMA_CIRCULAR;
-	hdma_adc.Init.Priority = DMA_PRIORITY_HIGH;
+	hdma_adc.Init.Priority = DMA_PRIORITY_LOW;
 	hdma_adc.Init.FIFOMode = DMA_FIFOMODE_DISABLE;         
 	hdma_adc.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL;
 	hdma_adc.Init.MemBurst = DMA_MBURST_SINGLE;
 	hdma_adc.Init.PeriphBurst = DMA_PBURST_SINGLE; 
 
-  	HAL_DMA_Init(&hdma_adc);
 
+  	HAL_DMA_Init(&hdma_adc);
   	 /* Associate the initialized DMA handle to the the ADC handle */
 	__HAL_LINKDMA(&hadc, DMA_Handle, hdma_adc);
 
-	/*##-4- Configure the NVIC for DMA #########################################*/
-	/* NVIC configuration for DMA transfer complete interrupt */
-	HAL_NVIC_SetPriority(DMA2_Stream0_IRQn, 3, 0);   
-	HAL_NVIC_EnableIRQ(DMA2_Stream0_IRQn);
 
 	return 0;
 }
 
 static int __init adc_init(void)
 {
-	int ret;
-	int i;
-	printk("adc driver init!\n");
+	printk("adc1 module start...\n");
 
-	for (i = 0; i < NUM_OF_DEVICES; i++)
-	{
-	    adc_dev[i].devno = MKDEV(MAJOR_ADC, i);
-		sprintf(adc_dev[i].name, "%s%d", DEVNAME, i+1);
-		register_chrdev_region(adc_dev[i].devno, 1, adc_dev[i].name);
-		     
-		cdev_add(&adc_dev[i].cdev, adc_dev[i].devno, 1);
-		cdev_init(&adc_dev[i].cdev, &adc_ops);
-	}
+
+	//ADC1
+	adc_dev[0].devno = MKDEV(MAJOR_ADC, 0);
+	sprintf(adc_dev[0].name, "%s%d", DEVNAME, 1);
+	register_chrdev_region(adc_dev[0].devno, 1, adc_dev[0].name);
+	cdev_add(&adc_dev[0].cdev, adc_dev[0].devno, 1);
+	cdev_init(&adc_dev[0].cdev, &adc_ops);
+
+	//ADC2
+
+	//ADC3
 
 	if(adc_hw_init() != 0)
 		goto ERR_STEP1;
 
-	adc_dev[0].DMA_IRQn	= DMA2_Stream0_IRQn;
-	adc_dev[1].DMA_IRQn	= DMA2_Stream2_IRQn;
-	adc_dev[2].DMA_IRQn	= DMA2_Stream1_IRQn;
+	// adc_dev[0].DMA_IRQn	= DMA2_Stream0_IRQn;
+	// adc_dev[1].DMA_IRQn	= DMA2_Stream2_IRQn;
+	// adc_dev[2].DMA_IRQn	= DMA2_Stream1_IRQn;
 
-	// register adc1 interrupt
-	ret = request_irq(adc_dev[0].DMA_IRQn, HAL_DMA_IRQHandler, IRQF_SHARED, adc_dev[0].name, &adc_dev[0].devno);
-	if(ret) {
-		printk("request_irq() fialed! %d\n", ret);
-		goto ERR_STEP1;
-	}
+	// // register adc1 interrupt
+	// ret = request_irq(adc_dev[0].DMA_IRQn, HAL_DMA_IRQHandler, IRQF_SHARED, adc_dev[0].name, &adc_dev[0].devno);
+	// if(ret) {
+	// 	printk("request_irq() fialed! %d\n", ret);
+	// 	goto ERR_STEP1;
+	// }
 
+	// HAL_ADC_Start(&hadc);
+	// HAL_DMA_Start(&hdma_adc, (uint32_t)&hadc.Instance->DR, (uint16_t*)&gAdc1Value, 40);
 	
-	if(HAL_ADC_Start_DMA(&hadc, (uint32_t*)&gAdc1Value, 40) != HAL_OK)
+	if(HAL_ADC_Start_DMA(&hadc, (uint32_t*)gAdc1Value, 70) != HAL_OK)
   	{
     	printk("Start DMA error!");
   	}
 
+  	// ADC_Common_TypeDef * adc_commonReg = ADC123_COMMON;
+  	// printk("adc adc driver init over!, CCR = %#x\n", adc_commonReg->CCR);
+  	// printk("adc CR1: %#x, CR2: %#x\n", hadc.Instance->CR1, hadc.Instance->CR2);
 	return 0;
 
 ERR_STEP1:
-	unregister_chrdev_region(adc_dev[0].devno, NUM_OF_DEVICES);
+	unregister_chrdev_region(adc_dev[0].devno, 1);
 //ERR_STEP:
 	cdev_del(&adc_dev[0].cdev);
 
@@ -532,7 +308,7 @@ ERR_STEP1:
 
 static void __exit adc_exit(void)
 {
-	unregister_chrdev_region(MKDEV(major, minor), NUM_OF_DEVICES);
+	unregister_chrdev_region(adc_dev[0].devno, 1);
 	cdev_del(&adc_dev[0].cdev);
 }
 

app/driver/I2C/i2c_main.c

@@ -44,7 +44,6 @@ static volatile int ev_press = 0;
 struct i2c_device {
 	dev_t devno;
 	struct cdev cdev;
-	char data[128];
 	char name[16];
 	IRQn_Type	Event_IRQn;
 	IRQn_Type	Err_IRQn;
@@ -85,11 +84,13 @@ static int i2c_open(struct inode *inode, struct file *filep)
 		HAL_NVIC_EnableIRQ(I2C1_EV_IRQn);
 		HAL_NVIC_EnableIRQ(I2C1_ER_IRQn);
 		hi2c.Instance = I2C1;
+		printk("i2c1 open\n");
 		break;
 	case 1:
 		HAL_NVIC_EnableIRQ(I2C2_EV_IRQn);
 		HAL_NVIC_EnableIRQ(I2C2_ER_IRQn);
 		hi2c.Instance = I2C2;
+		printk("i2c2 open\n");
 		break;
 	case 2:
 		HAL_NVIC_EnableIRQ(I2C3_EV_IRQn);
@@ -101,10 +102,11 @@ static int i2c_open(struct inode *inode, struct file *filep)
 		return -1;
 	}
 
+	
 	__HAL_I2C_DISABLE(&hi2c);	//clear all flags.
 	hi2c.State = HAL_I2C_STATE_READY;
 	__HAL_I2C_ENABLE(&hi2c);
-	HAL_I2C_EnableListen_IT(&hi2c);
+	//HAL_I2C_EnableListen_IT(&hi2c);
 	return 0;
 }
 
@@ -120,17 +122,20 @@ static int i2c_close(struct inode *inode, struct file *filep)
 		return -1;
 	}
 
+	
 	switch(iminor)
 	{
 	case 0:		
 		HAL_NVIC_DisableIRQ(I2C1_EV_IRQn);
 		HAL_NVIC_DisableIRQ(I2C1_ER_IRQn);
 		hi2c.Instance	= I2C1;
+		printk("i2c1 close\n");
 		break;
 	case 1:
 		HAL_NVIC_DisableIRQ(I2C2_EV_IRQn);
 		HAL_NVIC_DisableIRQ(I2C2_ER_IRQn);
 		hi2c.Instance	= I2C2;
+		printk("i2c2 close\n");
 		break;
 	case 2:
 		HAL_NVIC_DisableIRQ(I2C3_EV_IRQn);
@@ -211,20 +216,18 @@ irqreturn_t i2cEvIRQHandler(int irqno, void *dev_id)
 	itsources   = READ_REG(hi2c.Instance->CR2);
 	CurrentMode = hi2c.Mode;
    
+   // printk("SR1: %#x, SR2: %#x, CR2: %#x\n", sr1itflags, sr2itflags, itsources);
 	/* Slave mode selected */
 	/* ADDR set --------------------------------------------------------------*/
 	if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
 	{
-		memset(i2c_rcv_buf, 0, sizeof(i2c_rcv_buf));
 		i2c_rcv_size = 0;
-		i2c_rcv_buf[i2c_rcv_size++] = hi2c.Instance->OAR1 & 0xff;
 		/* Clear ADDR flag */
 		__HAL_I2C_CLEAR_ADDRFLAG(&hi2c);
 	}
 	else if(((sr1itflags & I2C_FLAG_RXNE) != RESET))
 	{
 		i2c_rcv_buf[i2c_rcv_size++] = hi2c.Instance->DR;
-
 	}
 	/* STOPF set --------------------------------------------------------------*/
 	else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
@@ -311,6 +314,7 @@ static int i2c_ioctl(struct inode *inode, struct file *filep, unsigned int cmd,
 
 		__HAL_I2C_ENABLE(&I2CxHandle);
 		HAL_NVIC_EnableIRQ(I2CxEvIRQn);
+		//HAL_I2C_EnableListen_IT(&I2CxHandle);
 		break;
 	
 	case GET_I2C_SPEED:
@@ -333,6 +337,8 @@ static int i2c_ioctl(struct inode *inode, struct file *filep, unsigned int cmd,
 		
 		__HAL_I2C_ENABLE(&I2CxHandle);
 		HAL_NVIC_EnableIRQ(I2CxEvIRQn);
+		//HAL_I2C_EnableListen_IT(&I2CxHandle);
+		printk("OAR1: %#x\n", I2CxHandle.Instance->OAR1);
 		break;
 
 	case GET_I2C_ADDR:	//8bit
@@ -343,7 +349,8 @@ static int i2c_ioctl(struct inode *inode, struct file *filep, unsigned int cmd,
 
 	case I2C_MASTER_TRANSFER:
 		HAL_NVIC_DisableIRQ(I2CxEvIRQn);
-	
+		
+		
 		I2CxHandle.State = HAL_I2C_STATE_READY;
 		I2CxHandle.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
 		retSta = HAL_I2C_Master_Transmit(&I2CxHandle, (uint16_t)i2c_arg.DevAddress, i2c_arg.buf, i2c_arg.Size, 100);	//timeout 1s
@@ -353,6 +360,7 @@ static int i2c_ioctl(struct inode *inode, struct file *filep, unsigned int cmd,
 		}
 
 		HAL_NVIC_EnableIRQ(I2CxEvIRQn);
+		//HAL_I2C_EnableListen_IT(&I2CxHandle);
 		break;
 
 	case I2C_MASTER_RECEIVE:
@@ -369,14 +377,14 @@ static int i2c_ioctl(struct inode *inode, struct file *filep, unsigned int cmd,
 			return -EFAULT;
 		
 		HAL_NVIC_EnableIRQ(I2CxEvIRQn);
+		//HAL_I2C_EnableListen_IT(&I2CxHandle);
 		break;
 	
 	case I2C_SLAVE_RECEIVE_IT:
-		//HAL_NVIC_EnableIRQ(I2CxEvIRQn);
+		I2CxHandle.State = HAL_I2C_STATE_READY;
+		HAL_I2C_EnableListen_IT(&I2CxHandle);
 		wait_event_interruptible(wq, ev_press);
 		ev_press = 0;
-
-		memset(i2c_arg.buf, 0, sizeof(i2c_arg.buf));
 		memcpy(i2c_arg.buf, i2c_rcv_buf, i2c_rcv_size);	
 		i2c_arg.Size	= i2c_rcv_size;
 
@@ -491,6 +499,7 @@ static int __init i2c_init(void)
 
 	for (i = 0; i < NUM_OF_DEVICES; i++)
 	{
+		printk("i2c%d module start...\n", i+1);
 	    i2c_dev[i].devno = MKDEV(MAJOR_I2C, i);
 		sprintf(i2c_dev[i].name, "%s%d", DEVNAME, i+1);
 		register_chrdev_region(i2c_dev[i].devno, 1, i2c_dev[i].name);

app/driver/Platform/platform_main.c

@@ -125,7 +125,7 @@ void platform_hw_init(void)
 
 	SystemCoreClockUpdate();
 		
-	printk("STM32F429 SystemCoreClock: %d\n", SystemCoreClock);
+	//printk("STM32F429 SystemCoreClock: %d\n", SystemCoreClock);
 }
 
 static int __init platform_init(void)
@@ -159,7 +159,7 @@ static int __init platform_init(void)
 //		printk("request_irq() failed! %d\n", ret);
 //		goto ERR_STEP1;
 //	}
-	printk("Platform_STM32F429 module insmod ok.\n");
+	printk("Platform_GD32F450I module start...\n");
 	return 0;
 
 ERR_STEP1:

app/driver/SPI/.spi.ko.cmd

@@ -1 +1 @@
-cmd_/stm32f429/linux-cortexm-1.14.2/projects/ls1046a/app/driver/SPI/spi.ko := arm-uclinuxeabi-ld -EL -r  -T /stm32f429/linux-cortexm-1.14.2/linux/scripts/module-common.lds  -o /stm32f429/linux-cortexm-1.14.2/projects/ls1046a/app/driver/SPI/spi.ko /stm32f429/linux-cortexm-1.14.2/projects/ls1046a/app/driver/SPI/spi.o /stm32f429/linux-cortexm-1.14.2/projects/ls1046a/app/driver/SPI/spi.mod.o
+cmd_/gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/spi.ko := arm-uclinuxeabi-ld -EL -r  -T /gd32f450_prj/linux-cortexm-1.14.2/linux/scripts/module-common.lds  -o /gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/spi.ko /gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/spi.o /gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/spi.mod.o

app/driver/SPI/.tmp_versions/spi.mod

@@ -1,2 +1,2 @@
-/stm32f429/linux-cortexm-1.14.2/projects/ls1046a/app/driver/SPI/spi.ko
-/stm32f429/linux-cortexm-1.14.2/projects/ls1046a/app/driver/SPI/./../../stm32f429.o /stm32f429/linux-cortexm-1.14.2/projects/ls1046a/app/driver/SPI/stm32f429_spi.o /stm32f429/linux-cortexm-1.14.2/projects/ls1046a/app/driver/SPI/stm32f429_rcc.o /stm32f429/linux-cortexm-1.14.2/projects/ls1046a/app/driver/SPI/stm32f429_gpio.o /stm32f429/linux-cortexm-1.14.2/projects/ls1046a/app/driver/SPI/spi_main.o
+/gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/spi.ko
+/gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/../STM32F4xx_HAL_Driver/system_stm32f4xx.o /gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o /gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o /gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o /gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o /gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o /gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o /gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o /gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o /gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/spi_main.o

app/driver/SPI/Makefile

@@ -1,14 +1,26 @@
 
 KERNELDIR	:= $(INSTALL_ROOT)/linux
 
-spi-objs := ./../../stm32f429.o
-spi-objs += stm32f429_spi.o
-spi-objs += stm32f429_rcc.o
-spi-objs += stm32f429_gpio.o
+obj-m	+= spi.o
+spi-objs := ../STM32F4xx_HAL_Driver/system_stm32f4xx.o
+spi-objs += ../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.o
+spi-objs += ../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.o
+spi-objs += ../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.o
+spi-objs += ../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.o
+spi-objs += ../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma2d.o
+spi-objs += ../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.o
+spi-objs += ../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.o
+spi-objs += ../STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.o
 
 spi-objs += spi_main.o
-obj-m   += spi.o
 
+APPDIR := $(INSTALL_ROOT)/projects/gd32450i-eval/app
+
+EXTRA_CFLAGS := -I$(APPDIR)/driver/STM32F4xx_HAL_Driver
+EXTRA_CFLAGS += -I$(APPDIR)/driver/STM32F4xx_HAL_Driver/Inc
+EXTRA_CFLAGS += -I$(APPDIR)/driver/STM32F4xx_HAL_Driver/Inc/Legacy
+EXTRA_CFLAGS += -I$(APPDIR)/common_include
+EXTRA_CFLAGS += -I$(APPDIR)/driver
 
 modules	:
 	make -C $(KERNELDIR) M=`pwd` modules CFLAGS="" LDFLAGS=""

app/driver/SPI/modules.order

@@ -1 +1 @@
-kernel//stm32f429/linux-cortexm-1.14.2/projects/ls1046a/app/driver/SPI/spi.ko
+kernel//gd32f450_prj/linux-cortexm-1.14.2/projects/gd32450i-eval/app/driver/SPI/spi.ko

app/driver/SPI/spi_main.c

@@ -12,21 +12,28 @@
 #include <linux/err.h>
 #include "asm/uaccess.h"
 #include <linux/delay.h>
-#include "spi.h"
-#include "./stm32f429_spi.h"
+
+#include "com_gpio.h"
+#include "stm32f4xx.h"
+#include "stm32_hal_legacy.h"
+#include "stm32f4xx_hal_spi.h"
+#include "stm32f4xx_hal_gpio.h"
+#include "driver.h"
 
 static int major = MAJOR_SPI;
-static int minor = 0;
-static dev_t devno;
-static struct cdev *spi_cdev = NULL;
-static int count = 6;
 static int ret=0;
 #define DEVNAME "spi"
+#define NUM_OF_DEVICES	6
 
-#define SPIT_FLAG_TIMEOUT         ((uint32_t)0x1000)
-#define SPIT_LONG_TIMEOUT         ((uint32_t)(10 * I2CT_FLAG_TIMEOUT))
+struct spi_device {
+	dev_t devno;
+	struct cdev cdev;
+	char name[16];
+	//IRQn_Type	Event_IRQn;
+	//IRQn_Type	Err_IRQn;
+} spi_dev[NUM_OF_DEVICES];
 
-int iic_read_byte(void);
+SPI_HandleTypeDef hspi1, hspi2, hspi3, hspi4, hspi5, hspi6;
 
 static int spi_open(struct inode *inode, struct file *filep);
 static int spi_close(struct inode *inode, struct file *filep);
@@ -44,10 +51,9 @@ static struct file_operations spi_ops =
 	
 };
 
-SPI_DEV_T spi[] = {{.bus = SPI1,},{.bus = SPI2,},{.bus = SPI3,},{.bus = SPI4,},{.bus = SPI5,},{.bus = SPI6,}};
-
 static int spi_open(struct inode *inode, struct file *filep)
 {
+	SPI_HandleTypeDef *pHspi;
 	int imajor,iminor;
 	imajor = MAJOR(inode->i_rdev);
 	iminor = MINOR(inode->i_rdev);
@@ -56,42 +62,39 @@ static int spi_open(struct inode *inode, struct file *filep)
 		printk("Error: %s %d spi major fail! %d\n",__FILE__,__LINE__,imajor);
 		return -1;
 	}
-//	printk("---> open major=%d, minor=%d\n",imajor,iminor);
+	//printk("---> open major=%d, minor=%d\n",imajor,iminor);
 	switch(iminor)
 	{
 	case 0:		
-      		/* Enable SPI peripheral */
-		SPI_Cmd(SPI1,ENABLE);
+      	pHspi = &hspi1;
 		break;
 	case 1:
-      		/* Enable I2C peripheral */
-		SPI_Cmd(SPI2,ENABLE);
+      	pHspi = &hspi2;
 		break;
 	case 2:
-      		/* Enable I2C peripheral */
-	    	SPI_Cmd(SPI3,ENABLE);
+      	pHspi = &hspi3;
 		break;
 	case 3:
-                /* Enable I2C peripheral */
-                SPI_Cmd(SPI4,ENABLE);
-                break;	
+        pHspi = &hspi4;
+        break;	
 	case 4:
-                /* Enable I2C peripheral */
-                SPI_Cmd(SPI5,ENABLE);
-                break;	
+        pHspi = &hspi5;
+        break;	
 	case 5:
-                /* Enable I2C peripheral */
-                SPI_Cmd(SPI6,ENABLE);
-                break;
+        pHspi = &hspi6;
+        break;
 	default:
 		printk("Error:%s %d Invalid minor %d",__FILE__,__LINE__,iminor);
 		return -1;
 	}
+
+	__HAL_SPI_ENABLE(pHspi);
 	return 0;
 }
 
 static int spi_close(struct inode *inode, struct file *filep)
 {
+	SPI_HandleTypeDef *pHspi;
 	int imajor,iminor;
 	imajor = MAJOR(inode->i_rdev);
 	iminor = MINOR(inode->i_rdev);
@@ -101,66 +104,127 @@ static int spi_close(struct inode *inode, struct file *filep)
 		return -1;
 	}
 
+	//printk("---> close major=%d, minor=%d\n",imajor,iminor);
 	switch(iminor)
 	{
 	case 0:		
-      		/* Disable SPI peripheral */
-		SPI_Cmd(SPI1,DISABLE);
-      		break;
+      	pHspi = &hspi1;
+		break;
 	case 1:
-      		/* Disable I2C peripheral */
-      		SPI_Cmd(SPI2,DISABLE);
+      	pHspi = &hspi2;
 		break;
 	case 2:
-                /* Disable SPI peripheral */
-                SPI_Cmd(SPI3,DISABLE);
+      	pHspi = &hspi3;
 		break;
-        case 3:
-                /* Disable SPI peripheral */
-                SPI_Cmd(SPI4,DISABLE);
-                break;
-        case 4:
-                /* Disable SPI peripheral */
-                SPI_Cmd(SPI5,DISABLE);
-                break;
-        case 5:
-                /* Disable SPI peripheral */
-                SPI_Cmd(SPI6,DISABLE);
-                break;
+	case 3:
+        pHspi = &hspi4;
+        break;	
+	case 4:
+        pHspi = &hspi5;
+        break;	
+	case 5:
+        pHspi = &hspi6;
+        break;
 	default:
 		printk("Error:%s %d Invalid minor %d",__FILE__,__LINE__,iminor);
 		return -1;
 	}
 
+	__HAL_SPI_DISABLE(pHspi);	
 	return 0;
 }
 
 
-
 static int spi_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
 {
-	SPI_DEV_T spi_dev;
-	int read_data=0;
-	ret = 0;
-	if ( copy_from_user(&spi_dev, (void*)arg, sizeof(SPI_DEV_T)) != 0)
+	HAL_StatusTypeDef ret = HAL_OK;
+	spi_arg_t spi_args;
+	int imajor,iminor;
+	SPI_HandleTypeDef *pHspi;
+	int i;
+
+	imajor = MAJOR(inode->i_rdev);
+	iminor = MINOR(inode->i_rdev);
+
+	if(imajor != MAJOR_SPI)
+	{
+		printk("Error: %s %d spi major fail! %d\n",__FILE__,__LINE__,imajor);
+		return -EFAULT;
+	}
+
+	switch(iminor)
+	{
+	case 0:		
+      	pHspi = &hspi1;
+		break;
+	case 1:
+      	pHspi = &hspi2;
+		break;
+	case 2:
+      	pHspi = &hspi3;
+		break;
+	case 3:
+        pHspi = &hspi4;
+        break;	
+	case 4:
+        pHspi = &hspi5;
+        break;	
+	case 5:
+        pHspi = &hspi6;
+        break;
+	default:
+		printk("Error:%s %d Invalid minor %d",__FILE__,__LINE__,iminor);
+		return -1;
+	}
+
+
+	if ( copy_from_user(&spi_args, (void*)arg, sizeof(spi_arg_t)) != 0)
 	{
 		printk("---> copy form user space fail!\n");
 		return -1;
 	}
+
 	switch(cmd)
 	{
-//	case SET_I2C_ADDR:
-//		printk("---> set i2c addr.\n");
-//		i2c_dev.bus->OAR1 = i2c_dev.ownAddr;
+	case SPI_MASTER_TRANSFER:
+		// printk("SPI%d_transfer %d: ", iminor+1, spi_args.Size);
+		// for(i=0;i<spi_args.Size;i++)
+		// {
+		// 	printk("%#x ", spi_args.buf[i]);
+		// }
+		// printk("\n");
+
+		ret = HAL_SPI_Transmit( pHspi, spi_args.buf, spi_args.Size, HAL_MAX_DELAY);
+		if(ret != HAL_OK)
+		{
+			printk("SPI master transfer error, %d\n", ret);
+		}
 		break;
-//	case GENERATE_STOP:
-//    		I2C_GenerateSTOP(i2c_dev.bus, ENABLE);
+	case SPI_MASTER_RECEIVE:
+		ret = HAL_SPI_Receive(pHspi, spi_args.buf, spi_args.Size, HAL_MAX_DELAY);
+		if(ret != HAL_OK)
+		{
+			printk("SPI master transfer error, %d\n", ret);
+		}
+		
+		// printk("SPI%d_receive %d: ", iminor+1, spi_args.Size);
+		// for(i=0;i<spi_args.Size;i++)
+		// {
+		// 	printk("%#x ", spi_args.buf[i]);
+		// }
+		// printk("\n");
+		
+		if ( copy_to_user((void*)arg, &spi_args, sizeof(spi_arg_t)) != 0)
+		{
+			printk("---> copy to user space fail!\n");
+			return -1;
+		}
+
 		break;
 	default:
 		printk("---> Invalid action\n");
-		return -1;
+		ret = -1;
 		break;
-
 	}	
 	return ret;
 }
@@ -175,131 +239,139 @@ static ssize_t spi_write(struct file *filep, const char __user *buf, size_t size
 	return 0;
 }
 
-void spi_config_init()
+void spi_hw_init(void)
 {
-
 	GPIO_InitTypeDef spi_gpio;
-	SPI_InitTypeDef spi;
 
-	//gpio init	
-	RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOF,ENABLE);
-	RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI5,ENABLE);
+	//SPI1
+
+	//SPI2
+	__HAL_RCC_GPIOI_CLK_ENABLE();
+	spi_gpio.Pin 	= GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3;
+	spi_gpio.Mode	= GPIO_MODE_AF_PP;
+	spi_gpio.Pull   = GPIO_PULLUP;
+	spi_gpio.Speed 	= GPIO_SPEED_FREQ_HIGH;
+	spi_gpio.Alternate	=	GPIO_AF5_SPI2;
+	HAL_GPIO_Init(GPIOI, &spi_gpio);
+
+	//NSS
+	HAL_GPIO_WritePin(GPIOI, GPIO_PIN_0, GPIO_PIN_SET);
+	spi_gpio.Pin 	= GPIO_PIN_0;
+	spi_gpio.Mode	= GPIO_MODE_OUTPUT_PP;
+	spi_gpio.Pull   = GPIO_PULLUP;
+	spi_gpio.Speed 	= GPIO_SPEED_FREQ_HIGH;
+	HAL_GPIO_Init(GPIOI, &spi_gpio);
+
+	__HAL_RCC_SPI2_CLK_ENABLE();
+	hspi2.Instance 			= SPI2;
+	hspi2.Init.Direction 	= SPI_DIRECTION_2LINES;
+	hspi2.Init.Mode 		= SPI_MODE_MASTER;
+	hspi2.Init.DataSize 	= SPI_DATASIZE_8BIT;
+	hspi2.Init.CLKPolarity 	= SPI_POLARITY_HIGH;
+	hspi2.Init.CLKPhase 	= SPI_PHASE_2EDGE;
+	hspi2.Init.NSS 			= SPI_NSS_SOFT;
+	hspi2.Init.BaudRatePrescaler 	= SPI_BAUDRATEPRESCALER_32;
+	hspi2.Init.FirstBit 	= SPI_FIRSTBIT_MSB;
+	hspi2.Init.TIMode 		= SPI_TIMODE_DISABLE;
+	hspi2.Init.CRCCalculation 	= SPI_CRCCALCULATION_DISABLE;
+	hspi2.Init.CRCPolynomial	= 0;	
+	HAL_SPI_Init(&hspi2);
+
+	//SPI3
+
+	//SPI4
+
+	//SPI5
+	__HAL_RCC_GPIOF_CLK_ENABLE();
+	spi_gpio.Pin 	= GPIO_PIN_7 | GPIO_PIN_8 | GPIO_PIN_9;
+	spi_gpio.Mode	= GPIO_MODE_AF_PP;
+	spi_gpio.Pull   = GPIO_PULLUP;
+	spi_gpio.Speed 	= GPIO_SPEED_FREQ_HIGH;
+	spi_gpio.Alternate	=	GPIO_AF5_SPI5;
+	HAL_GPIO_Init(GPIOF, &spi_gpio);
+
+	//NSS
+	HAL_GPIO_WritePin(GPIOF, GPIO_PIN_6, GPIO_PIN_SET);
+	spi_gpio.Pin 	= GPIO_PIN_6;
+	spi_gpio.Mode	= GPIO_MODE_OUTPUT_PP;
+	spi_gpio.Pull   = GPIO_PULLUP;
+	spi_gpio.Speed 	= GPIO_SPEED_FREQ_HIGH;
+	HAL_GPIO_Init(GPIOF, &spi_gpio);
+
+	__HAL_RCC_SPI5_CLK_ENABLE();
+	hspi5.Instance 			= SPI5;
+	hspi5.Init.Direction 	= SPI_DIRECTION_2LINES;
+	hspi5.Init.Mode 		= SPI_MODE_MASTER;
+	hspi5.Init.DataSize 	= SPI_DATASIZE_8BIT;
+	hspi5.Init.CLKPolarity 	= SPI_POLARITY_HIGH;
+	hspi5.Init.CLKPhase 	= SPI_PHASE_2EDGE;
+	hspi5.Init.NSS 			= SPI_NSS_SOFT;
+	hspi5.Init.BaudRatePrescaler 	= SPI_BAUDRATEPRESCALER_8;
+	hspi5.Init.FirstBit 	= SPI_FIRSTBIT_MSB;
+	hspi5.Init.TIMode 		= SPI_TIMODE_DISABLE;
+	hspi5.Init.CRCCalculation 	= SPI_CRCCALCULATION_DISABLE;
+	hspi5.Init.CRCPolynomial	= 0;	
+	HAL_SPI_Init(&hspi5);
 	
-	spi_gpio.GPIO_OType=GPIO_OType_PP;
-	spi_gpio.GPIO_PuPd=GPIO_PuPd_UP;
-	spi_gpio.GPIO_Speed=GPIO_Speed_50MHz;
-	spi_gpio.GPIO_Mode=GPIO_Mode_AF;	
-	
-	spi_gpio.GPIO_Pin=GPIO_Pin_7;
-	GPIO_Init(GPIOF, &spi_gpio);
-	GPIO_PinAFConfig(GPIOF, GPIO_PinSource7, GPIO_AF_SPI5);
-	
-	spi_gpio.GPIO_Pin=GPIO_Pin_8;
-	GPIO_Init(GPIOF, &spi_gpio);
-	GPIO_PinAFConfig(GPIOF, GPIO_PinSource8, GPIO_AF_SPI5);
-	
-	spi_gpio.GPIO_Pin=GPIO_Pin_9;
-	GPIO_Init(GPIOF, &spi_gpio);
-	GPIO_PinAFConfig(GPIOF, GPIO_PinSource9, GPIO_AF_SPI5);
-
-	spi_gpio.GPIO_Mode=GPIO_Mode_OUT;
-	spi_gpio.GPIO_Pin=GPIO_Pin_6;
-	GPIO_Init(GPIOF, &spi_gpio);
-	GPIO_SetBits(GPIOF,GPIO_Pin_6);	
-
-	//spi config init
-	spi.SPI_Direction=SPI_Direction_2Lines_FullDuplex;
-	spi.SPI_Mode=SPI_Mode_Master;
-	spi.SPI_DataSize=SPI_DataSize_8b;
-	spi.SPI_CPOL=SPI_CPOL_High;
-	spi.SPI_CPHA=SPI_CPHA_2Edge;
-	spi.SPI_NSS=SPI_NSS_Soft;
-	spi.SPI_BaudRatePrescaler=SPI_BaudRatePrescaler_2;
-	spi.SPI_FirstBit=SPI_FirstBit_MSB;
-	spi.SPI_CRCPolynomial=0;
-	
-	SPI_Init(SPI5,&spi);
-	SPI_Cmd(SPI5,ENABLE);
-}
+	//SPI6
 
-unsigned char spi_byte_read(unsigned char addr)
-{
-	while (SPI_I2S_GetFlagStatus(SPI5, SPI_I2S_FLAG_TXE) == RESET);		
-	SPI_I2S_SendData(SPI5,addr);
-	while (SPI_I2S_GetFlagStatus(SPI5, SPI_I2S_FLAG_RXNE) == RESET);
-	
-	return SPI_I2S_ReceiveData(SPI5);
 }
 
 
 static int __init spi_init(void)
 {
 	int ret;
-	int i;
-	int tem=0;
-	unsigned int pclk1;
-	uint8_t frequence;
-	spi_cdev = cdev_alloc();
-	if(spi_cdev == NULL){
-		return -ENOMEM;
-	}
-
-	cdev_init(spi_cdev,&spi_ops);
-	devno = MKDEV(major,minor);
-	ret = register_chrdev_region(devno, count, DEVNAME);
-	if(ret){
-		goto ERR_STEP;
-	}
 	
-	ret = cdev_add(spi_cdev, devno, count);
-	if(ret){
-		goto ERR_STEP1;
-	}
+	//SPI1
 
-	spi_config_init();
-	
-	//Sm mode
-	SystemCoreClockUpdate();
-  	pclk1 = SystemCoreClock >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1)>> RCC_CFGR_PPRE1_Pos];
-	printk("---> SystemCoreClock=%d, pclk1=%d\n",SystemCoreClock, pclk1);
-	frequence = pclk1/1000000;
-	if(frequence > 42)
-	{
-		frequence = 42;
-	}
-	if(frequence < 2)
-	{
-		frequence = 2;
-	}
-	for(i=0;i<6;i++)
-	{
-//		spi[i].bus->CR2 = frequence;	//the max frequence is 42MHZ, min frequence is 2MHZ 
-//		printk("---> spi%d ,bus:%#x, CR2:%d, frequence: %d\n", i,spi[i].bus, spi[i].bus->CR2, frequence);
-//		spi[i].bus->CCR = (frequence<<1) & 0x0FFF;	//100K, standard mode
-//		spi[i].bus->TRISE = frequence + 1;
-//		printk("---> CCR:%#x, TRISE:%#x\n",spi[i].bus->CCR, spi[i].bus->TRISE);
-	}
+
+	//SPI2
+	printk("spi2 module start ...\n");
+	spi_dev[1].devno = MKDEV(MAJOR_SPI, 1);
+	sprintf(spi_dev[1].name, "%s%d", DEVNAME, 2);
+	register_chrdev_region(spi_dev[1].devno, 1, spi_dev[1].name);
+	cdev_add(&spi_dev[1].cdev, spi_dev[1].devno, 1);
+	cdev_init(&spi_dev[1].cdev, &spi_ops);
+
+	//SPI3
 	
+	//SPI4
+
+	//SPI5
+	printk("spi5 module start ...\n");
+	spi_dev[4].devno = MKDEV(MAJOR_SPI, 4);
+	sprintf(spi_dev[4].name, "%s%d", DEVNAME, 5);
+	register_chrdev_region(spi_dev[4].devno, 1, spi_dev[4].name);
+	cdev_add(&spi_dev[4].cdev, spi_dev[4].devno, 1);
+	cdev_init(&spi_dev[4].cdev, &spi_ops);
+
+	//SPI6
+
+	spi_hw_init();
 	return 0;
 
 ERR_STEP1:
-	unregister_chrdev_region(devno,count);
+	unregister_chrdev_region(spi_dev[1].devno, 1);
+	unregister_chrdev_region(spi_dev[4].devno, 1);
 ERR_STEP:
-	cdev_del(spi_cdev);
+	cdev_del(&spi_dev[1].cdev);
+	cdev_del(&spi_dev[4].cdev);
 	return ret;
 }
 
 static void __exit spi_exit(void)
 {
-	unregister_chrdev_region(MKDEV(major,minor),count);
-	cdev_del(spi_cdev);
+	unregister_chrdev_region(spi_dev[1].devno,1);
+	cdev_del(&spi_dev[1].cdev);
+	unregister_chrdev_region(spi_dev[4].devno,1);
+	cdev_del(&spi_dev[4].cdev);
 }
 
 module_init(spi_init);
 module_exit(spi_exit);
 
 MODULE_LICENSE("GPL");
-MODULE_AUTHOR("zhouchao");
+MODULE_AUTHOR("jimbo");
 MODULE_DESCRIPTION("this is spi module");
 
 

app/driver/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c

@@ -296,7 +296,7 @@ HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi)
     hspi->Lock = HAL_UNLOCKED;
 
     /* Init the low level hardware : GPIO, CLOCK, NVIC... */
-    HAL_SPI_MspInit(hspi);
+    //HAL_SPI_MspInit(hspi);
   }
 
   hspi->State = HAL_SPI_STATE_BUSY;

app/driver/driver.h

@@ -38,6 +38,8 @@
 #define BUS_16BIT				GENERATE_CMD(IOCTL_MAGIC, MAJOR_FMC, 7)
 
 /* SPI command */
+#define SPI_MASTER_TRANSFER		GENERATE_CMD(IOCTL_MAGIC, MAJOR_SPI, 0)
+#define SPI_MASTER_RECEIVE		GENERATE_CMD(IOCTL_MAGIC, MAJOR_SPI, 1)
 
 /* GPIO command */
 #define GPIO_INIT				GENERATE_CMD(IOCTL_MAGIC, MAJOR_GPIO, 0)
@@ -46,8 +48,6 @@
 
 /* ADC command */
 #define ADC_GET_RESULT			GENERATE_CMD(IOCTL_MAGIC, MAJOR_ADC, 0)
-//#define ADC_STOP				GENERATE_CMD(IOCTL_MAGIC, MAJOR_ADC, 1)
-//#define ADC_START				GENERATE_CMD(IOCTL_MAGIC, MAJOR_ADC, 2)
 
 
 /* GPIO I2C command */
@@ -86,4 +86,14 @@ typedef struct {
 
 } i2c_arg_t;
 
+typedef struct {
+	uint8_t buf[300];
+	uint32_t Size;
+} spi_arg_t;
+
+typedef struct {
+	uint8_t	 channel;
+	uint16_t value[10];
+} adc_arg_t;
+
 #endif /* __DRIVER_H__ */

app/hal_api/hal_adc_interface.c

@@ -0,0 +1,80 @@
+#include "driver.h"
+#include <linux/types.h>
+#include <stdio.h>
+#include <string.h>
+#include "com_gpio.h"
+#include "hal_interface_api.h"
+#include "linux/fcntl.h"
+#include "time.h"
+#include <unistd.h>
+
+#define DEV_NAME	"/dev/adc1"
+/*
+channel: 1,2,3,4,5,6,7
+*/
+int stm32_adc_get_value(uint8_t channel, uint16_t *value)
+{
+	int fd;
+	int ret;
+	adc_arg_t adc_arg;
+	uint16_t max_val, min_val;
+	uint32_t sum = 0;
+	int i;
+	
+	if((channel < 1) || (channel > 7))
+	{
+		printf("Invalid adc channel %d.\n", channel);
+		return -1;
+	}
+	
+	fd = open(DEV_NAME, O_RDWR);
+	if(fd == -1)
+	{
+		printf("Open %s failed!\n", DEV_NAME);
+	}
+	adc_arg.channel = channel;
+	ret = ioctl(fd, ADC_GET_RESULT, &adc_arg);
+	if(ret == -1)
+	{
+		printf("Adc get result failed!\n");
+	}
+	close(fd);
+
+	//get the max value
+	max_val = adc_arg.value[0];
+	for(i=1;i<10;i++)
+	{
+		if(max_val < adc_arg.value[i])
+		{
+			max_val = adc_arg.value[i];
+		}
+	}
+
+	//get the min value
+	min_val = adc_arg.value[0];
+	for(i=1;i<10;i++)
+	{
+		if(min_val > adc_arg.value[i])
+		{
+			min_val = adc_arg.value[i];
+		}
+	}
+
+	//get sum
+	sum = 0;
+	for(i=0;i<10;i++)
+	{
+		sum += adc_arg.value[i];
+	}
+
+	//remove max_value and min_value
+	sum = sum - max_val - min_val;
+
+	*value = sum/8;
+
+	// printf("value: ");
+	// for(i=0;i<10;i++)
+	// 	printf("%d ", adc_arg.value[i]);
+	// printf("\nmax_value: %d, min_value: %d, sum: %d, average: %d\n", max_val, min_val, sum, *value);
+	return ret;
+}

app/hal_api/hal_i2c_interface.c

@@ -7,32 +7,15 @@
 #include "hal_interface_api.h"
 #include "linux/fcntl.h"
 
-#define DEV_NAME	"/dev/i2c"
-
 /*
 bus: 		1,2,3
 address: 	8bit
 */
-int stm32_i2c_master_write(uint8_t bus, uint8_t address, uint8_t *pBuf, uint16_t size)
+int stm32_i2c_master_write(int fd, uint8_t address, uint8_t *pBuf, uint16_t size)
 {
-	int fd;
-	int ret;
-	uint8_t dev_name[10] = {0};
+	int ret = 0;
 	i2c_arg_t i2c_arg;
-
-	if((bus != 1) && (bus != 2) && (bus != 3))
-	{
-		printf("Invalid bus number %d\n", bus);
-		return -1;
-	}
-
-	sprintf(dev_name, "%s%d", DEV_NAME, bus);
-	fd = open(dev_name, O_RDWR);
-	if(fd == -1)
-	{
-		printf("Open %s failed!\n", DEV_NAME);
-	}
-
+	
 	i2c_arg.DevAddress = address;
 	i2c_arg.Size = size;
 	memcpy(i2c_arg.buf, pBuf, size);
@@ -42,30 +25,14 @@ int stm32_i2c_master_write(uint8_t bus, uint8_t address, uint8_t *pBuf, uint16_t
 		printf("Write i2c failed!\n");
 	}
 
-	close(fd);
-	return 0;
+	return ret;
 }
 
-int stm32_i2c_master_read(uint8_t bus, uint8_t address, uint8_t *pBuf, uint16_t size)
+int stm32_i2c_master_read(int fd, uint8_t address, uint8_t *pBuf, uint16_t size)
 {
-	int fd;
 	int ret;
-	uint8_t dev_name[10] = {0};
 	i2c_arg_t i2c_arg;
 
-	if((bus != 1) && (bus != 2) && (bus != 3))
-	{
-		printf("Invalid bus number %d\n", bus);
-		return -1;
-	}
-
-	sprintf(dev_name, "%s%d", DEV_NAME, bus);
-	fd = open(dev_name, O_RDWR);
-	if(fd == -1)
-	{
-		printf("Open %s failed!\n", DEV_NAME);
-	}
-
 	i2c_arg.DevAddress = address;
 	i2c_arg.Size = size;
 	ret = ioctl(fd, I2C_MASTER_RECEIVE, &i2c_arg);
@@ -75,7 +42,43 @@ int stm32_i2c_master_read(uint8_t bus, uint8_t address, uint8_t *pBuf, uint16_t
 	}
 	memcpy(pBuf, i2c_arg.buf, size);
 
-	close(fd);
+	return 0;
+}
+
+
+int stm32_i2c_set_addr(int fd, uint8_t OwnAddress)
+{
+	int ret;
+	i2c_arg_t i2c_arg;
+
+	i2c_arg.OwnAddress1 = OwnAddress;
+	ret = ioctl(fd, SET_I2C_ADDR, &i2c_arg);
+	if(ret == -1)
+	{
+		printf("Set i2c address failed!\n");
+	}
 
 	return 0;
-}
+}
+
+//return receive size
+int stm32_i2c_slave_recv(int fd, uint8_t *pBuf)
+{
+	int ret = 0;
+	i2c_arg_t i2c_arg;
+	ret = ioctl(fd, I2C_SLAVE_RECEIVE_IT, &i2c_arg);
+	if(ret == -1)
+	{
+		printf("I2c slave receive failed!\n");
+		return -1;
+	}
+	memcpy(pBuf, i2c_arg.buf, i2c_arg.Size);
+
+	int i;
+	printf("i2c recv: ");
+	for(i=0;i<i2c_arg.Size;i++)
+		printf("%#x ", pBuf[i]);
+	printf("\n");
+	return i2c_arg.Size;
+}
+

app/hal_api/hal_interface_api.h

@@ -12,8 +12,10 @@ void stm32_gpio_write(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinS
 GPIO_PinState stm32_gpio_read(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
 
 /* I2C Interface */
-int stm32_i2c_master_write(uint8_t bus, uint8_t address, uint8_t *pBuf, uint16_t size);
-int stm32_i2c_master_read(uint8_t bus, uint8_t address, uint8_t *pBuf, uint16_t size);
+int stm32_i2c_master_write(int fd, uint8_t address, uint8_t *pBuf, uint16_t size);
+int stm32_i2c_master_read(int fd, uint8_t address, uint8_t *pBuf, uint16_t size);
+int stm32_i2c_set_addr(int fd, uint8_t OwnAddress);
+int stm32_i2c_slave_recv(int fd, uint8_t *pBuf);
 
 /* FMC Interface */
 int fmc_write_8bit(uint32_t address, uint8_t *buf, uint32_t len);
@@ -25,6 +27,16 @@ int fmc_read_32bit(uint32_t address, uint32_t *buf, uint32_t len);
 int fmc_set_bus_width(uint8_t bus_is16bit);
 
 /* SPI Interface */
+int stm32_spi_master_read(uint8_t spi, uint8_t *pBuf, uint32_t size);
+int stm32_spi_master_write(uint8_t spi, uint8_t *pBuf, uint32_t size);
+int stm32_spi_master_write_read(uint8_t spi, uint8_t *txBuf, uint32_t txSize, uint8_t *rxBuf, uint32_t rxSize);
+int sf_get_id(uint8_t spi, uint8_t *id);
+int sf_sector_erase(uint8_t spi, uint32_t Address);
+int sf_read(uint8_t spi, uint32_t Address, uint8_t *buf, uint32_t size);
+int sf_write(uint8_t spi, uint32_t Address, uint8_t *buf, uint32_t size);
+
+/* ADC Interface */
+int stm32_adc_get_value(uint8_t channel, uint16_t *value);
 
 /* UART Interface */
 

app/hal_api/hal_spi_interface.c

@@ -0,0 +1,650 @@
+#include "driver.h"
+#include <linux/types.h>
+#include <stdio.h>
+#include <string.h>
+#include "com_gpio.h"
+#include "hal_interface_api.h"
+#include "linux/fcntl.h"
+#include "time.h"
+#include <unistd.h>
+
+#define DEV_NAME	"/dev/spi"
+/*
+bus: 1,2,3,4,5,6
+*/
+int stm32_spi_master_write(uint8_t spi, uint8_t *pBuf, uint32_t size)
+{
+	int fd;
+	int ret;
+	uint8_t dev_name[10] = {0};
+	spi_arg_t spi_arg;
+	// GPIO_TypeDef *NSS_PORT = NULL;
+	// uint16_t	NSS_PIN = 0;
+
+	switch(spi)
+	{
+	case 1:
+		break;
+	case 2:
+		// NSS_PORT = GPIOI;
+		// NSS_PIN = GPIO_PIN_0;
+		break;
+	case 3:
+		break;
+	case 4:
+		break;
+	case 5:
+		// NSS_PORT = GPIOF;
+		// NSS_PIN = GPIO_PIN_6;
+		break;	
+	case 6:
+		break;
+	default:
+		printf("Invalid bus number %d\n", spi);
+		return -1;
+	}
+
+	sprintf(dev_name, "%s%d", DEV_NAME, spi);
+	fd = open(dev_name, O_RDWR);
+	if(fd == -1)
+	{
+		printf("Open %s failed!\n", dev_name);
+	}
+
+	// //NSS low
+	// stm32_gpio_write(GPIOF, GPIO_PIN_6, GPIO_PIN_RESET);
+	// usleep(1000);
+	
+	spi_arg.Size = size;
+	memcpy(spi_arg.buf, pBuf, size);
+	ret = ioctl(fd, SPI_MASTER_TRANSFER, &spi_arg);
+	if(ret == -1)
+	{
+		printf("Write spi failed!\n");
+	}
+
+	// //NSS high
+	// stm32_gpio_write(GPIOF, GPIO_PIN_6, GPIO_PIN_SET);
+
+	close(fd);
+	return 0;
+}
+
+int stm32_spi_master_read(uint8_t spi, uint8_t *pBuf, uint32_t size)
+{
+	int fd;
+	int ret;
+	uint8_t dev_name[10] = {0};
+	spi_arg_t spi_arg;
+	// GPIO_TypeDef *NSS_PORT = NULL;
+	// uint16_t	NSS_PIN = 0;
+
+	switch(spi)
+	{
+	case 1:
+		break;
+	case 2:
+		// NSS_PORT = GPIOI;
+		// NSS_PIN = GPIO_PIN_0;
+		break;
+	case 3:
+		break;
+	case 4:
+		break;
+	case 5:
+		// NSS_PORT = GPIOF;
+		// NSS_PIN = GPIO_PIN_6;
+		break;	
+	case 6:
+		break;
+	default:
+		printf("Invalid bus number %d\n", spi);
+		return -1;
+	}
+
+	sprintf(dev_name, "%s%d", DEV_NAME, spi);
+	fd = open(dev_name, O_RDWR);
+	if(fd == -1)
+	{
+		printf("Open %s failed!\n", DEV_NAME);
+	}
+	
+	spi_arg.Size = size;
+	ret = ioctl(fd, SPI_MASTER_RECEIVE, &spi_arg);
+	if(ret == -1)
+	{
+		printf("Read spi failed!\n");
+	}
+	memcpy(pBuf, spi_arg.buf, size);
+
+	close(fd);
+
+	return 0;
+}
+
+int stm32_spi_master_write_read(uint8_t spi, uint8_t *txBuf, uint32_t txSize, uint8_t *rxBuf, uint32_t rxSize)
+{
+	int fd;
+	int ret;
+	uint8_t dev_name[10] = {0};
+	spi_arg_t spi_arg;
+	// GPIO_TypeDef *NSS_PORT = NULL;
+	// uint16_t	NSS_PIN = 0;
+
+	switch(spi)
+	{
+	case 1:
+		break;
+	case 2:
+		// NSS_PORT = GPIOI;
+		// NSS_PIN = GPIO_PIN_0;
+		break;
+	case 3:
+		break;
+	case 4:
+		break;
+	case 5:
+		// NSS_PORT = GPIOF;
+		// NSS_PIN = GPIO_PIN_6;
+		break;	
+	case 6:
+		break;
+	default:
+		printf("Invalid bus number %d\n", spi);
+		return -1;
+	}
+
+	sprintf(dev_name, "%s%d", DEV_NAME, spi);
+	fd = open(dev_name, O_RDWR);
+	if(fd == -1)
+	{
+		printf("Open %s failed!\n", DEV_NAME);
+	}
+
+	//Tx
+	if(txSize > 0)
+	{
+		spi_arg.Size = txSize;
+		memcpy(spi_arg.buf, txBuf, txSize);
+		ret = ioctl(fd, SPI_MASTER_TRANSFER, &spi_arg);
+		if(ret == -1)
+		{
+			printf("Read spi failed!\n");
+		}
+	}
+
+	//Rx
+	if(rxSize > 0)
+	{
+		spi_arg.Size = rxSize;
+		memset(spi_arg.buf, 0, rxSize);
+		ret = ioctl(fd, SPI_MASTER_RECEIVE, &spi_arg);
+		if(ret == -1)
+		{
+			printf("Read spi failed!\n");
+		}
+		memcpy(rxBuf, spi_arg.buf, rxSize);
+	}
+
+	close(fd);
+
+	return 0;
+}
+
+/*
+timeout: ms
+*/
+static int sf_wait_spi_ready(int fd, uint32_t timeout)
+{ 
+	spi_arg_t spi_arg;
+	int ret = 0;
+	uint32_t timeCnt = 0;
+	
+	spi_arg.Size = 1;
+	spi_arg.buf[0] = 0x05;
+	ret = ioctl(fd, SPI_MASTER_TRANSFER, &spi_arg);
+	if(ret == -1)
+	{
+		printf("SPI Read status1 failed!\n");
+		return -1;
+	}
+	
+	timeCnt = 0;
+	do{
+		timeCnt++;
+		spi_arg.Size = 1;
+		ret = ioctl(fd, SPI_MASTER_RECEIVE, &spi_arg);
+		if(ret == -1)
+		{
+			printf("SPI Read status1 failed!\n");
+		}
+
+		if(spi_arg.buf[0]&0x01)
+			usleep(10);
+		else
+			break;
+	}while(timeCnt < timeout*100);
+
+	//NSS high
+	//stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_SET);
+}
+/*
+	flash: 	fw flash, spi5
+	cmd:	erase 4 KB
+*/
+int sf_sector_erase(uint8_t spi, uint32_t offset)
+{
+	int fd;
+	int ret;
+	uint8_t dev_name[10] = {0};
+	spi_arg_t spi_arg;
+	uint32_t erase_addr = 0;
+	uint8_t		status1_reg;
+	uint32_t	timeout = 0;
+	GPIO_TypeDef *NSS_PORT = NULL;
+	uint16_t	NSS_PIN = 0;
+
+
+	//erase_addr is the start address of one sector.
+	erase_addr = (offset/4096)*4096;
+
+	switch(spi)
+	{
+	case 1:
+		break;
+	case 2:
+		NSS_PORT = GPIOI;
+		NSS_PIN = GPIO_PIN_0;
+		break;
+	case 3:
+		break;
+	case 4:
+		break;
+	case 5:
+		NSS_PORT = GPIOF;
+		NSS_PIN = GPIO_PIN_6;
+		break;	
+	case 6:
+		break;
+	default:
+		printf("Invalid bus number %d\n", spi);
+		return -1;
+	}
+
+	sprintf(dev_name, "%s%d", DEV_NAME, spi);
+	fd = open(dev_name, O_RDWR);
+	if(fd == -1)
+	{
+		printf("Open %s failed!\n", dev_name);
+	}
+
+	//Write Enable
+	spi_arg.Size = 1;
+	spi_arg.buf[0] = 0x06;
+	stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_RESET);	//NSS low
+	ret = ioctl(fd, SPI_MASTER_TRANSFER, &spi_arg);
+	stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_SET);	//NSS high
+	if(ret == -1)
+	{
+		printf("SPI Write Enable failed!\n");
+		return -1;
+	}
+
+	//Sector Erase
+	spi_arg.Size = 4;
+	spi_arg.buf[0] = 0x20;
+	spi_arg.buf[1] = (erase_addr>>16)&0xff;
+	spi_arg.buf[2] = (erase_addr>>8)&0xff;
+	spi_arg.buf[3] = erase_addr&0xff;
+	stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_RESET);	//NSS low
+	ret = ioctl(fd, SPI_MASTER_TRANSFER, &spi_arg);
+	stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_SET);	//NSS high
+	if(ret == -1)
+	{
+		printf("SPI sector erase failed!\n");
+		return -1;
+	}
+	
+
+	usleep(30000);	//30ms
+	stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_RESET);	//NSS low
+	sf_wait_spi_ready(fd, 400);	//400ms
+	stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_SET);	//NSS high
+
+	close(fd);
+
+	return 0;
+}
+
+int sf_get_id(uint8_t spi, uint8_t *id)
+{
+	int fd;
+	spi_arg_t args;
+	uint8_t dev_name[10] = {0};
+	int i;
+	GPIO_TypeDef *NSS_PORT = NULL;
+	uint16_t	NSS_PIN = 0;
+
+	switch(spi)
+	{
+	case 1:
+		break;
+	case 2:
+		NSS_PORT = GPIOI;
+		NSS_PIN = GPIO_PIN_0;
+		break;
+	case 3:
+		break;
+	case 4:
+		break;
+	case 5:
+		NSS_PORT = GPIOF;
+		NSS_PIN = GPIO_PIN_6;
+		break;	
+	case 6:
+		break;
+	default:
+		printf("Invalid bus number %d\n", spi);
+		return -1;
+	}
+
+	sprintf(dev_name, "%s%d", DEV_NAME, spi);
+	fd = open(dev_name, O_RDWR);
+	if(fd < 0)
+		printf("open failed\n");
+	
+
+	memset(args.buf, 0, 100);
+	args.buf[0] = 0x9f;
+	args.Size = 1;
+	stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_RESET);	//NSS low
+	ioctl(fd, SPI_MASTER_TRANSFER, &args);
+	args.Size = 3;
+	ioctl(fd, SPI_MASTER_RECEIVE, &args);
+	stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_SET);		//NSS high
+	memcpy(id, args.buf, args.Size);
+	//printf("get id: %#x %#x %#x\n", id[0], id[1], id[2]);
+	
+			
+	close(fd);
+}
+
+/*
+	spi: 1,2,3,4,5,6
+	PageSize = 256 bytes.
+	Address must be the start of one page.
+*/
+int sf_write(uint8_t spi, uint32_t offset, uint8_t *buf, uint32_t size)
+{
+	int fd;
+	int ret;
+	spi_arg_t spi_arg;
+	uint8_t 	dev_name[10] = {0};
+	uint8_t		status1_reg;
+	uint32_t	timeout = 0;
+	uint32_t	remain = 0, writeLen = 0;
+	uint32_t 	writeAddr = 0;
+	GPIO_TypeDef *NSS_PORT = NULL;
+	uint16_t	NSS_PIN = 0;
+
+
+	//erase_addr is the start address of one sector.
+	if(offset&0xff)
+	{
+		printf("The Address %#x is not a pages start!\n", offset);
+		return -1;
+	}
+
+	switch(spi)
+	{
+	case 1:
+		break;
+	case 2:
+		NSS_PORT = GPIOI;
+		NSS_PIN = GPIO_PIN_0;
+		break;
+	case 3:
+		break;
+	case 4:
+		break;
+	case 5:
+		NSS_PORT = GPIOF;
+		NSS_PIN = GPIO_PIN_6;
+		break;	
+	case 6:
+		break;
+	default:
+		printf("Invalid bus number %d\n", spi);
+		return -1;
+	}
+
+	sprintf(dev_name, "%s%d", DEV_NAME, spi);
+	fd = open(dev_name, O_RDWR);
+	if(fd == -1)
+	{
+		printf("Open %s failed!\n", dev_name);
+	}
+
+	
+	
+	//usleep(1000);
+	
+	remain = size;
+	writeLen = 0;
+	writeAddr = offset;
+	while(remain > 256)
+	{
+		
+		//Write Enable
+		spi_arg.Size = 1;
+		spi_arg.buf[0] = 0x06;
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_RESET);	//NSS low
+		ret = ioctl(fd, SPI_MASTER_TRANSFER, &spi_arg);
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_SET);	//NSS high
+		if(ret == -1)
+		{
+			printf("SPI Write Enable failed!\n");
+			return -1;
+		}
+		//Page Write
+		spi_arg.Size = 260;
+		spi_arg.buf[0] = 0x02;	//page write
+		spi_arg.buf[1] = (writeAddr>>16)&0xff;
+		spi_arg.buf[2] = (writeAddr>>8)&0xff;
+		spi_arg.buf[3] = writeAddr&0xff;
+		memcpy(&spi_arg.buf[4], &buf[writeLen], 256);
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_RESET);	//NSS low
+		ret = ioctl(fd, SPI_MASTER_TRANSFER, &spi_arg);
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_SET);		//NSS high
+		if(ret == -1)
+		{
+			printf("SPI Read status1 failed!\n");
+			return -1;
+		}
+		//wait page write finish
+		usleep(700);	//700us
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_RESET);	//NSS low
+		if(0 != sf_wait_spi_ready(fd, 3))	//3ms
+			printf("Warnning page write timeout!\n");
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_SET);		//NSS high
+
+		remain -= 256;
+		writeLen += 256;
+		writeAddr += 256;
+	}
+
+	if(remain > 0)
+	{
+		//Write Enable
+		spi_arg.Size = 1;
+		spi_arg.buf[0] = 0x06;
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_RESET);	//NSS low
+		ret = ioctl(fd, SPI_MASTER_TRANSFER, &spi_arg);
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_SET);	//NSS high
+		if(ret == -1)
+		{
+			printf("SPI Write Enable failed!\n");
+			return -1;
+		}
+		//page write
+		spi_arg.Size = remain + 4;
+		spi_arg.buf[0] = 0x02;	//page write
+		spi_arg.buf[1] = (writeAddr>>16)&0xff;
+		spi_arg.buf[2] = (writeAddr>>8)&0xff;
+		spi_arg.buf[3] = writeAddr&0xff;
+		memcpy(&spi_arg.buf[4], &buf[writeLen], remain);
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_RESET);	//NSS low
+		ret = ioctl(fd, SPI_MASTER_TRANSFER, &spi_arg);
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_SET);		//NSS high
+		if(ret == -1)
+		{
+			printf("SPI Read status1 failed!\n");
+			return -1;
+		}
+		//wait page write finish
+		usleep(700);	//700us
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_RESET);	//NSS low
+		if(0 != sf_wait_spi_ready(fd, 3))	//3ms
+			printf("Warnning page write timeout!\n");
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_SET);		//NSS high
+
+		
+		writeLen += remain;
+		writeAddr += remain;
+		remain -= remain;
+	}
+	
+	close(fd);
+
+	return 0;
+}
+
+
+/*
+	spi: 1,2,3,4,5
+	PageSize = 256 bytes.
+	Address must be the start of one page.
+*/
+int sf_read(uint8_t spi, uint32_t offset, uint8_t *buf, uint32_t size)
+{
+	int fd;
+	int ret;
+	spi_arg_t spi_arg;
+	uint8_t 	dev_name[10] = {0};
+	uint8_t		status1_reg;
+	uint32_t	timeout = 0;
+	uint32_t	remain = 0, readLen = 0;
+	uint32_t 	readAddr;
+	GPIO_TypeDef *NSS_PORT = NULL;
+	uint16_t	NSS_PIN = 0;
+
+
+	//erase_addr is the start address of one sector.
+	if(offset&0xff)
+	{
+		printf("The Address %#x is not a pages start!\n", offset);
+		return -1;
+	}
+
+	switch(spi)
+	{
+	case 1:
+		break;
+	case 2:
+		NSS_PORT = GPIOI;
+		NSS_PIN = GPIO_PIN_0;
+		break;
+	case 3:
+		break;
+	case 4:
+		break;
+	case 5:
+		NSS_PORT = GPIOF;
+		NSS_PIN = GPIO_PIN_6;
+		break;	
+	case 6:
+		break;
+	default:
+		printf("Invalid bus number %d\n", spi);
+		return -1;
+	}
+
+	sprintf(dev_name, "%s%d", DEV_NAME, spi);
+	fd = open(dev_name, O_RDWR);
+	if(fd == -1)
+	{
+		printf("Open %s failed!\n", dev_name);
+	}
+		
+	remain = size;
+	readLen = 0;
+	readAddr = offset;
+	while(remain > 256)
+	{
+		
+		spi_arg.Size = 5;
+		spi_arg.buf[0] = 0x0B;	//fast read
+		spi_arg.buf[1] = (readAddr>>16)&0xff;
+		spi_arg.buf[2] = (readAddr>>8)&0xff;
+		spi_arg.buf[3] = readAddr&0xff;
+		spi_arg.buf[4] = 0;	//dummy
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_RESET);	//NSS low
+		ret = ioctl(fd, SPI_MASTER_TRANSFER, &spi_arg);
+		if(ret == -1)
+		{
+			printf("SPI Fast Read command failed!\n");
+			return -1;
+		}
+		spi_arg.Size = 256;
+		ret = ioctl(fd, SPI_MASTER_RECEIVE, &spi_arg);
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_SET);		//NSS high
+		if(ret == -1)
+		{
+			printf("SPI fast Read failed!\n");
+			return -1;
+		}
+		
+		memcpy(&buf[readLen], spi_arg.buf, 256);
+
+		remain -= 256;
+		readLen += 256;
+		readAddr += 256;
+	}
+
+	if(remain > 0)
+	{
+		
+		spi_arg.Size = 5;
+		spi_arg.buf[0] = 0x0B;	//fast read
+		spi_arg.buf[1] = (readAddr>>16)&0xff;
+		spi_arg.buf[2] = (readAddr>>8)&0xff;
+		spi_arg.buf[3] = readAddr&0xff;
+		spi_arg.buf[4] = 0;	//dummy
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_RESET);	//NSS low
+		ret = ioctl(fd, SPI_MASTER_TRANSFER, &spi_arg);
+		if(ret == -1)
+		{
+			printf("SPI Fast Read command failed!\n");
+			return -1;
+		}
+		spi_arg.Size = remain;
+		ret = ioctl(fd, SPI_MASTER_RECEIVE, &spi_arg);
+		stm32_gpio_write(NSS_PORT, NSS_PIN, GPIO_PIN_SET);		//NSS high
+		if(ret == -1)
+		{
+			printf("SPI fast Read failed!\n");
+			return -1;
+		}
+		
+
+		memcpy(&buf[readLen], spi_arg.buf, remain);
+
+		readLen += remain;
+		readAddr += remain;
+		remain -= remain;
+	}
+	
+	close(fd);
+
+	return 0;
+}

app/stm32_api/Makefile

@@ -1,23 +0,0 @@
-
-CFLAGS		:= -Os -mcpu=cortex-m3 -mthumb
-LDFLAGS		:= -mcpu=cortex-m3 -mthumb -L$(INSTALL_ROOT)/A2F/root/usr/lib
-
-#incldue
-CFLAGS	+= -I$(INSTALL_ROOT)/A2F/root/usr/include
-CFLAGS	+= -I ./
-#library
-
-SOURCE = $(wildcard ./Src/*.c)
-
-OBJS = $(patsubst %.c,%.o,$(SOURCE))
-
-
-$(EXEC): $(OBJS)
-	$(CC) $(LDFLAGS) $(CFLAGS) -o $@ $^ $(LIBS) 
-
-
-clean:
-	OBJS	= $(SRC:%.o=%.c)
-	rm -rf $(EXEC) $(OBJS)
-
-

app/stm32_api/stm32_api.txt

@@ -1,11 +0,0 @@
-
-	Hardware-related interface functions are defined in this folder
-
-
-
-
-
-
-
-
-

app/test_app/Makefile

@@ -8,9 +8,22 @@ CC	= $(CROSS_COMPILE_APPS)gcc
 #source
 SRC	= test.c
 
+# hal_api
+SRC += $(wildcard ../hal_api/*.c) 
+
+APPDIR := $(INSTALL_ROOT)/projects/gd32450i-eval/app
+
 #incldue
 CFLAGS	+= -I$(INSTALL_ROOT)/A2F/root/usr/include
 CFLAGS	+= -I ./
+CFLAGS	+= -I ../common_include
+CFLAGS	+= -I ../driver
+CFLAGS	+= -I ../hal_api
+CFLAGS	+= -I ../driver/STM32F4xx_HAL_Driver
+CFLAGS	+= -I ../driver/STM32F4xx_HAL_Driver/Inc
+CFLAGS	+= -I ../driver/STM32F4xx_HAL_Driver/Inc/Legacy
+
+
 #library
 
 #sub-directory

app/test_app/test.c

@@ -3,116 +3,50 @@
 /* include path: ..../A2F/root/usr/include */
 
 #include <stdio.h>
+#include <string.h>
 #include <fcntl.h>
 #include <linux/types.h>
 //#include <linux/jiffies.h>
 #include <unistd.h>
+#include <stdint.h>
+#include "driver.h"
+#include "hal_interface_api.h"
 
-typedef unsigned char uint8_t;
-typedef unsigned long uint32_t;
-
-typedef struct {
-	uint32_t address;
-	uint8_t	 data;
-} cpld_t;
-
-typedef struct {
-	uint32_t	clockspeed;
-	uint32_t	ownAddr;
-	uint8_t DevAddr;
-	uint8_t buf[100];
-	uint8_t Size;	
-} i2c_arg_t;
-
-
-#define  GENERATE_CMD(__MAGIC__, __MAJOR__, __CMD__) \
-	((0x3<<30) | (__MAJOR__<<16) | (__MAGIC__<<8) | __CMD__)
-
-#define SET_ADDR GENERATE_CMD('x', 101, 2)
-#define TRANSFER GENERATE_CMD('x', 101, 4)
-#define MASTER_RCV GENERATE_CMD('x', 101, 5)
-#define SLAVE_RCV GENERATE_CMD('x', 101, 6)
 int main()
 {
-/*	//FMC test app
-	cpld_t cpld_arg;
-	printf("This is test app!\n");
+
 	int fd;
-	fd = open("/dev/fmc_cpld", O_RDWR);
-	if(fd == NULL)
-		printf("Open failed\n");
+	uint8_t buf[7] = {0x40, 0xb8, 0x08, 0x20, 0x0, 0x1,0xdf};
 
-	cpld_arg.address = 0x64000000;
-	cpld_arg.data = 0x55;
-	ioctl(fd, 0, &cpld_arg);
-	cpld_arg.data = 0;
-	ioctl(fd, 1, &cpld_arg);
-	printf("Read from cpld: %#x\n", cpld_arg.data);
+	fd = open("/dev/i2c1", O_RDWR);
+	if(fd < 0)
+		printf("error1!\n");
 
-	close(fd);
-*/
-	
-/*	//gpio interrup test app
-	int fd;
-	uint8_t buf;
-	int ret = 0;
-	fd = open("/dev/test_module", O_RDWR);
-	if(fd == NULL)
-		printf("open failed\n");
 	while(1)
 	{
-		ret = read(fd, &buf, 1);
-		printf("test app read %#x\n", buf);
+		stm32_i2c_master_write(fd, buf[0], &buf[1], 6);
+		sleep(5);
 	}
 
-	close(fd);*/
+	close(fd);
 
-	int fd;
-	int i;
-	i2c_arg_t i2c_arg;
-	fd = open("/dev/i2c1", O_RDWR);
-	if(fd == NULL)
-		printf("open failed\n");
 
-	i2c_arg.ownAddr = 0;
-	i2c_arg.DevAddr = 0x92;
-	i2c_arg.buf[0] = 1;
-	i2c_arg.buf[1] = 2;
-	i2c_arg.buf[2] = 3;
-	i2c_arg.Size	= 0;
-	while(1)
-	{
-	//	ioctl(fd, 1, &i2c_arg);	//get speed
-	//	printf("speed: %d\n", i2c_arg.clockspeed);
-	//	sleep(1);
-	//	
-	//	i2c_arg.clockspeed = 400000;
-	//	ioctl(fd, 0, &i2c_arg);	//set speed
-	//	sleep(1);
-	//	
-//		ioctl(fd, 3, &i2c_arg);	//get addr
-//		printf("addr: %#x\n", i2c_arg.ownAddr);
-//		sleep(1);
-		
-//		i2c_arg.ownAddr = 0x42;
-//		ioctl(fd, SET_ADDR, &i2c_arg);	//set addr
-//		sleep(1);
 
-//		ioctl(fd, MASTER_RCV, &i2c_arg);
-//		printf("Read: %#x, %#x\n", i2c_arg.buf[0], i2c_arg.buf[1]);
-		//	sleep(1);
-		
-		ioctl(fd, SLAVE_RCV, &i2c_arg);
-		printf("\ni2c1 rec: ");
-		for(i=0;i<i2c_arg.Size;i++)
-			printf("%#x ", i2c_arg.buf[i]);
-		printf("\n");
 
-	}
-	
-	close(fd);
-	
+	// int i;
+	// uint8_t id[500] = {0};
+	// for(i=0;i<500;i++)
+	// 	id[i] = i;
 	
+	// sf_sector_erase(2, 0x1000);
+	// sf_write(2, 0x1000, id, 500);
+	// sf_read(2, 0x1000, id, 1000);
+
+	// for(i=0;i<500;i++)
+	// 	id[i] = 1;
+	// sf_sector_erase(2, 0x1000);
+	// sf_write(2, 0x1000, id, 500);
+	// sf_read(2, 0x1000, id, 1000);
 	
 	return 0;
 }

gd32450i-eval.initramfs

@@ -107,6 +107,8 @@ file /usr/bin/i2c.ko ${INSTALL_ROOT}/projects/${SAMPLE}/app/driver/I2C/i2c.ko 75
 file /usr/bin/fmc.ko ${INSTALL_ROOT}/projects/${SAMPLE}/app/driver/FMC/fmc.ko 755 0 0
 file /usr/bin/test_module.ko ${INSTALL_ROOT}/projects/${SAMPLE}/app/driver/test/test_module.ko 755 0 0
 file /usr/bin/platform_STM32F429.ko ${INSTALL_ROOT}/projects/${SAMPLE}/app/driver/Platform/platform_STM32F429.ko 755 0 0
+file /usr/bin/adc.ko ${INSTALL_ROOT}/projects/${SAMPLE}/app/driver/ADC/adc.ko 755 0 0
+file /usr/bin/spi.ko ${INSTALL_ROOT}/projects/${SAMPLE}/app/driver/SPI/spi.ko 755 0 0
 
 
 

local/rc

@@ -26,7 +26,8 @@ insmod /usr/bin/gpio.ko
 insmod /usr/bin/i2c.ko
 #insmod /usr/bin/fmc.ko
 insmod /usr/bin/platform_STM32F429.ko
-#insmod /usr/bin/adc.ko
+insmod /usr/bin/adc.ko
+insmod /usr/bin/spi.ko
 
 #create node
 #mknod /dev/test_module c 99 0
@@ -37,13 +38,14 @@ mknod /dev/i2c3 c 101 2
 mknod /dev/fmc_cpld c 102 0
 mknod /dev/gpio c 103 0 
 mknod /dev/adc1 c 105 0
-mknod /dev/adc2 c 105 1
-mknod /dev/adc3 c 105 2
-
+#mknod /dev/adc2 c 105 1
+#mknod /dev/adc3 c 105 2
+mknod /dev/spi2 c 104 1
+mknod /dev/spi5 c 104 4
 
 
 /bin/telnetd
 #run bmc function 
 #/usr/bin/bmc_app & 
-#/usr/bin/test_app &
+#/usr/bin/test_app 
 #/usr/bin/goahead -v --home /etc/goahead /var/www/goahead &