ChassisDevice.c 42 KB

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  1. /*****************************************************************
  2. *****************************************************************
  3. *** **
  4. *** (C)Copyright 2005-2006, American Megatrends Inc. **
  5. *** **
  6. *** All Rights Reserved. **
  7. *** **
  8. *** 6145-F, Northbelt Parkway, Norcross, **
  9. *** **
  10. *** Georgia - 30071, USA. Phone-(770)-246-8600. **
  11. *** **
  12. *****************************************************************
  13. *****************************************************************
  14. ******************************************************************
  15. *
  16. * ChassisDevice.c
  17. * Chassis commands
  18. *
  19. * Author: Rama Bisa <ramab@ami.com>
  20. *
  21. ******************************************************************/
  22. #include <string.h>
  23. #include "com_IPMI_ChassisDevice.h"
  24. #include "ChassisDevice.h"
  25. #include "ChassisTimerTask.h"
  26. #include "Support.h"
  27. #include "main.h"
  28. #include "message.h"
  29. /* Reserved bit macro definitions */
  30. #define RESERVED_BITS_CHASSISCONTROL 0xF0 //(BIT7 | BIT6 | BIT5 |BIT4)
  31. #define RESERVED_BITS_GETCHASSISIDENTIFY 0xFE //(BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)
  32. #define RESERVED_BITS_SETCHASSISCAPS 0xFC //(BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2)
  33. #define RESERVED_BITS_SETPOWERRESTOREPOLICY 0xFC //(BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2)
  34. #define RESERVED_BITS_SETFPBUTTONENABLES 0xF0 //(BIT7 | BIT6 | BIT5 | BIT4)
  35. #if CHASSIS_DEVICE == 1
  36. /*** Local Definitions ***/
  37. #define PRP_ALWAYS_POWEROFF_SUPPORT 0x01
  38. #define PRP_LAST_STATE_SUPPORT 0x02
  39. #define PRP_ALWAYS_POWERON_SUPPORT 0x04
  40. #define CHASSIS_AMI_OEM_PARAM 96
  41. #define CHASSIS_SET_INPROG 0x00
  42. #define CHASSIS_SERVICE_PART_SEL 0x01
  43. #define CHASSIS_SERVICE_PART_SCAN 0x02
  44. #define CHASSIS_BOOT_FLAG_VALID_BIT_CLEAR 0x03
  45. #define CHASSIS_BOOT_INFO_ACK 0x04
  46. #define CHASSIS_BOOT_FLAGS 0x05
  47. #define CHASSIS_BOOT_INITIATOR_INFO 0x06
  48. #define CHASSIS_BOOT_INITIATOR_MBOX 0x07
  49. #define CHASSIS_AMI_OEM_PARAM 96
  50. #define SSICB_OEM_PARAM_BLK_SIZE_TBL 0x78
  51. #define SSICB_BOOT_ORDER_TBL 0x7D
  52. #define SSICB_BOOT_DEV_SELECTOR 0x7E
  53. #define SSICB_SLOT_CONFIG_TBL 0x7F
  54. #define ROLLBACK_OPTION 0x00
  55. /* Mask Bits */
  56. #define BIT5_BIT2_MASK 0x3C
  57. #define BIT6_BIT5_MASK 0x60
  58. #define BIT1_BIT0_MASK 0x03
  59. /* Reserved Bits */
  60. #define RESERVED_VALUE_03 0x03
  61. #define RESERVED_VALUE_10 0x10
  62. #define RESERVED_VALUE_20 0x20
  63. #define RESERVED_VALUE_28 0x28
  64. #define RESERVED_VALUE_30 0x30
  65. #define RESERVED_VALUE_34 0x34
  66. #define RESERVED_VALUE_38 0x38
  67. #define RESERVED_VALUE_40 0x40
  68. #define RESERVED_VALUE_60 0x60
  69. #define RESERVED_VALUE_80 0x80
  70. ///*** Module Varibales ***/
  71. //static const uint8_t m_BootOptParamLen [] = /**< Boot Options parameter length */
  72. //{
  73. // 0x01, /**< Set in progress byte length */
  74. // 0x01, /**< Service Partition selector length */
  75. // 0x01, /**< Service Partition scan length */
  76. // 0x01, /**< Boot flag valid bit length */
  77. // sizeof(BootInfoAck_T), /**< Boot info ack length */
  78. // sizeof(BootFlags_T), /**< Boot Flags valid length */
  79. // sizeof(BootInitiatorInfo_T), /**< Boot init info length */
  80. // sizeof(BootInitiatorMboxReq_T), /**< Boot init info length */
  81. //};
  82. //static const uint8_t m_SSIBootOptParamLen [] = /**< SSI Boot Options parameter length */
  83. //{
  84. // sizeof(OemParamBlkSizeTbl_T), /* OEM Parameter Block Size Table length */
  85. // 0x0, /* Reserved */
  86. // 0x0, /* Reserved */
  87. // 0x0, /* Reserved */
  88. // 0x0, /* Reserved */
  89. // sizeof(BootOrderTblReq_T), /* Boot Order Table length */
  90. // sizeof(uint8_t), /* SSI Boot Device Selector length*/
  91. // sizeof(SlotConfigTbl_T) /* Slot Configuration Table length */
  92. //};
  93. #define MAX_BOOT_PARAMS_DATA 20
  94. typedef struct
  95. {
  96. uint8_t Params;
  97. uint8_t ReservedBits [MAX_BOOT_PARAMS_DATA];
  98. uint8_t DataLen;
  99. } BootCfgRsvdBits_T;
  100. //static BootCfgRsvdBits_T m_RsvdBitsCheck [] = {
  101. // /* Param Reserved Bits Data Size */
  102. // { 0, { 0xFC }, 0x1 }, /* Set In progress */
  103. // { 2, { 0xFC }, 0x1 },
  104. // { 3, { 0xE0 }, 0x1 },
  105. // { 5, { 0x1F,0x00,0x00,0xF0,0xE0}, 0x5 },
  106. // { 6, { 0xF0 }, 0x1 }
  107. //};
  108. /*-------------------------------------
  109. * GetChassisCaps
  110. *-------------------------------------*/
  111. int
  112. GetChassisCaps ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  113. {
  114. GetChassisCapabilitiesRes_T* pGetChassisCapsRes = ( GetChassisCapabilitiesRes_T*) pRes;
  115. printf("GetChassisCaps not implement\r\n");
  116. pGetChassisCapsRes->CompletionCode = CC_NORMAL;
  117. memcpy ( ( uint8_t*)&pGetChassisCapsRes->ChassisCapabilities,
  118. ( uint8_t*)&g_BMCInfo.IpmiConfig.ChassisCapabilities,
  119. sizeof(ChassisCapabilities_T) );
  120. return sizeof(GetChassisCapabilitiesRes_T);
  121. }
  122. /*-------------------------------------
  123. * GetChassisStatus
  124. *-------------------------------------*/
  125. int
  126. GetChassisStatus ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  127. {
  128. GetChassisStatusRes_T* pGetChassisStatusRes =
  129. ( GetChassisStatusRes_T*) pRes;
  130. pGetChassisStatusRes->CompletionCode = CC_NORMAL;
  131. memcpy ( ( uint8_t*)&pGetChassisStatusRes->ChassisPowerState,
  132. ( uint8_t*)&g_BMCInfo.IpmiConfig.ChassisPowerState,
  133. sizeof(ChassisPowerState_T));
  134. return sizeof (GetChassisStatusRes_T) ;
  135. }
  136. /*-------------------------------------
  137. * ChassisControl
  138. *-------------------------------------*/
  139. int
  140. ChassisControl ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes )
  141. {
  142. ChassisControlReq_T* pChassisControlReq =
  143. ( ChassisControlReq_T*) pReq;
  144. ChassisControlRes_T* pChassisControlRes =
  145. ( ChassisControlRes_T*) pRes;
  146. MsgPkt_T MsgPkt;
  147. pChassisControlRes->CompletionCode = CC_NORMAL;
  148. /* Check for the reserved bytes should b zero */
  149. if ( 0 != (pChassisControlReq->ChassisControl & RESERVED_BITS_CHASSISCONTROL ) )
  150. {
  151. pChassisControlRes->CompletionCode = CC_INV_DATA_FIELD;
  152. return sizeof(uint8_t);
  153. }
  154. switch (pChassisControlReq->ChassisControl & 0x0F )
  155. {
  156. case CHASSIS_POWER_DOWN:
  157. //printf ("Chassis IS GOING FOR POWER_DOWN\n");
  158. MsgPkt.Param = PARAM_CHASSIS;
  159. MsgPkt.NetFnLUN = 0x00<<2;
  160. MsgPkt.Cmd = 0x02;
  161. MsgPkt.Data[0] = CHASSIS_POWER_DOWN;
  162. MsgPkt.Size = 1;
  163. PostMsg(gPendActionIfc, &MsgPkt);
  164. // g_BMCInfo.HostOFFStopWDT = TRUE ;
  165. g_BMCInfo.IpmiConfig.SysRestartCause = RESTART_CAUSE_CHASSIS_CTRL;
  166. // OnSetRestartCause(g_BMCInfo.ChassisConfig.SysRestartCause, TRUE,BMCInst);
  167. // g_BMCInfo.Msghndlr.ChassisControl= CHASSIS_POWER_DOWN;
  168. break;
  169. case CHASSIS_POWER_UP:
  170. //printf ("Chassis IS GOING FOR POWER UP\n");
  171. MsgPkt.Param = PARAM_CHASSIS;
  172. MsgPkt.NetFnLUN = 0x00<<2;
  173. MsgPkt.Cmd = 0x02;
  174. MsgPkt.Data[0] = CHASSIS_POWER_UP;
  175. MsgPkt.Size = 1;
  176. PostMsg(gPendActionIfc, &MsgPkt);
  177. g_BMCInfo.IpmiConfig.SysRestartCause = RESTART_CAUSE_CHASSIS_CTRL;
  178. // OnSetRestartCause(g_BMCInfo.ChassisConfig.SysRestartCause, TRUE,BMCInst);
  179. // g_BMCInfo.Msghndlr.ChassisControl = CHASSIS_POWER_UP;
  180. // /* Set Last Power Event through IPMI Command */
  181. // if(g_PDKHandle[PDK_SETLASTPOWEREVENT] != NULL)
  182. // {
  183. // ((void(*)(uint8_t,int))g_PDKHandle[PDK_SETLASTPOWEREVENT]) (PDK_LAST_POWER_ON_VIA_IPMI,BMCInst);
  184. // }
  185. break;
  186. case CHASSIS_POWER_CYCLE:
  187. //printf ("Chassis IS GOING FOR POWER CYCLE\n");
  188. MsgPkt.Param = PARAM_CHASSIS;
  189. MsgPkt.NetFnLUN = 0x00<<2;
  190. MsgPkt.Cmd = 0x02;
  191. MsgPkt.Data[0] = CHASSIS_POWER_CYCLE;
  192. MsgPkt.Size = 1;
  193. PostMsg(gPendActionIfc, &MsgPkt);
  194. g_BMCInfo.IpmiConfig.SysRestartCause = RESTART_CAUSE_CHASSIS_CTRL;
  195. // OnSetRestartCause(g_BMCInfo.ChassisConfig.SysRestartCause, TRUE,BMCInst);
  196. // g_BMCInfo.Msghndlr.ChassisControl = CHASSIS_POWER_CYCLE;
  197. // /* Set Last Power Event through IPMI Command */
  198. // if(g_PDKHandle[PDK_SETLASTPOWEREVENT] != NULL)
  199. // {
  200. // ((void(*)(uint8_t,int))g_PDKHandle[PDK_SETLASTPOWEREVENT]) (PDK_LAST_POWER_ON_VIA_IPMI,BMCInst);
  201. // }
  202. break;
  203. case CHASSIS_HARD_RESET:
  204. //printf ("Chassis IS GOING FOR HARD RESET");
  205. MsgPkt.Param = PARAM_CHASSIS;
  206. MsgPkt.NetFnLUN = 0x00<<2;
  207. MsgPkt.Cmd = 0x02;
  208. MsgPkt.Data[0] = CHASSIS_HARD_RESET;
  209. MsgPkt.Size = 1;
  210. PostMsg(gPendActionIfc, &MsgPkt);
  211. g_BMCInfo.IpmiConfig.SysRestartCause = RESTART_CAUSE_CHASSIS_CTRL;
  212. // OnSetRestartCause(g_BMCInfo.ChassisConfig.SysRestartCause, TRUE,BMCInst);
  213. // g_BMCInfo.Msghndlr.ChassisControl = CHASSIS_HARD_RESET;
  214. break;
  215. case CHASSIS_PULSE_DIAGNOSTIC_INTERRUPT:
  216. //printf ("Chassis IS GOING FOR DIAG INT\n");
  217. MsgPkt.Param = PARAM_CHASSIS;
  218. MsgPkt.NetFnLUN = 0x00<<2;
  219. MsgPkt.Cmd = 0x02;
  220. MsgPkt.Data[0] = CHASSIS_PULSE_DIAGNOSTIC_INTERRUPT;
  221. MsgPkt.Size = 1;
  222. PostMsg(gPendActionIfc, &MsgPkt);
  223. //Platform_HostDiagInt ();
  224. break;
  225. case CHASSIS_SOFT_SHUTDOWN:
  226. //printf ("Chassis IS GOING FOR SOFT SHUTDOWN\n");
  227. MsgPkt.Param = PARAM_CHASSIS;
  228. MsgPkt.NetFnLUN = 0x00<<2;
  229. MsgPkt.Cmd = 0x02;
  230. MsgPkt.Data[0] = CHASSIS_SOFT_SHUTDOWN;
  231. MsgPkt.Size = 1;
  232. PostMsg(gPendActionIfc, &MsgPkt);
  233. //Platform_HostSoftShutDown (BMCInst);
  234. break;
  235. default:
  236. printf ("UNKNOWN Chassis CONTROL REQUEST \r\n");
  237. pChassisControlRes->CompletionCode = CC_INV_DATA_FIELD;
  238. break;
  239. }
  240. FlushIPMIToFlash();
  241. return sizeof(ChassisControlRes_T);
  242. }
  243. /*-------------------------------------
  244. * GetChassisIdentify
  245. *-------------------------------------*/
  246. int
  247. GetChassisIdentify ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  248. {
  249. ChassisIdentifyReq_T* pChassisIdentifyReq =
  250. ( ChassisIdentifyReq_T*) pReq;
  251. if (ReqLen <= sizeof(ChassisIdentifyReq_T))
  252. {
  253. if (0 != ReqLen)
  254. {
  255. g_BMCInfo.ChassisIdentifyForce = 0;
  256. g_BMCInfo.ChassisIdentifyTimeout = pChassisIdentifyReq->IdentifyInterval;
  257. }
  258. else
  259. {
  260. g_BMCInfo.ChassisIdentifyForce = 0;
  261. g_BMCInfo.ChassisIdentifyTimeout = DEFAULT_IDENTIFY_TIMEOUT;
  262. }
  263. if (ReqLen == 2)
  264. {
  265. /* Check for the reserved bytes should b zero */
  266. if ( 0 != (pChassisIdentifyReq->ForceIdentify & RESERVED_BITS_GETCHASSISIDENTIFY ) )
  267. {
  268. pRes[0] = CC_INV_DATA_FIELD;
  269. return sizeof(uint8_t);
  270. }
  271. if(pChassisIdentifyReq->ForceIdentify & 1)
  272. {
  273. g_BMCInfo.ChassisIdentifyTimeout = 0;
  274. g_BMCInfo.ChassisIdentifyForce = 1;
  275. }
  276. else
  277. {
  278. g_BMCInfo.ChassisIdentifyForce = 0;
  279. }
  280. }
  281. g_BMCInfo.ChassisIdentify = TRUE;
  282. pRes[0] = CC_NORMAL;
  283. }
  284. else
  285. {
  286. pRes[0] = CC_REQ_INV_LEN;
  287. }
  288. return 1;
  289. }
  290. /*-------------------------------------
  291. * SetChassisCaps
  292. *-------------------------------------*/
  293. int
  294. SetChassisCaps ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  295. {
  296. SetChassisCapabilitiesReq_T* pSetChassisCapsReq =
  297. ( SetChassisCapabilitiesReq_T*) pReq;
  298. SetChassisCapabilitiesRes_T* pSetChassisCapsRes =
  299. ( SetChassisCapabilitiesRes_T*) pRes;
  300. //printf ("SET Chassis CAPABILITIES\n");
  301. /* Check for the reserved bytes should b zero */
  302. if ( 0 != (pSetChassisCapsReq->ChassisCaps.CapabilitiesFlags & RESERVED_BITS_SETCHASSISCAPS ) )
  303. {
  304. pSetChassisCapsRes->CompletionCode = CC_INV_DATA_FIELD;
  305. return sizeof(uint8_t);
  306. }
  307. if ((ReqLen != 5) &&
  308. (ReqLen != sizeof(SetChassisCapabilitiesReq_T)))
  309. {
  310. pSetChassisCapsRes->CompletionCode= CC_REQ_INV_LEN;
  311. return sizeof(SetChassisCapabilitiesRes_T);
  312. }
  313. if((pSetChassisCapsReq->ChassisCaps.CapabilitiesFlags & 0xFC ) != 0)
  314. {
  315. pSetChassisCapsRes->CompletionCode= CC_INV_DATA_FIELD;
  316. return sizeof(SetChassisCapabilitiesRes_T);
  317. }
  318. memcpy (( uint8_t*) &g_BMCInfo.IpmiConfig.ChassisCapabilities,
  319. ( uint8_t*) &pSetChassisCapsReq->ChassisCaps,
  320. sizeof(ChassisCapabilities_T));
  321. pSetChassisCapsRes->CompletionCode = CC_NORMAL;
  322. FlushIPMIToFlash();
  323. return sizeof (SetChassisCapabilitiesRes_T);
  324. }
  325. /*-------------------------------------
  326. * SetPowerRestorePolicy
  327. *-------------------------------------*/
  328. int
  329. SetPowerRestorePolicy ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  330. {
  331. SetPowerRestorePolicyReq_T* pSetPowerRestorePolicyReq =
  332. ( SetPowerRestorePolicyReq_T*) pReq;
  333. SetPowerRestorePolicyRes_T* pSetPowerRestorePolicyRes =
  334. ( SetPowerRestorePolicyRes_T*) pRes;
  335. printf ("\nSET POWER RESORE POLICY\r\n");
  336. /* Check for the reserved bytes should b zero */
  337. if ( 0 != ( pSetPowerRestorePolicyReq->PowerRestorePolicy & RESERVED_BITS_SETPOWERRESTOREPOLICY ))
  338. {
  339. pSetPowerRestorePolicyRes->CompletionCode = CC_INV_DATA_FIELD;
  340. return sizeof (uint8_t);
  341. }
  342. // 011b = no change to the current power restore policy
  343. if (pSetPowerRestorePolicyReq->PowerRestorePolicy != 0x03)
  344. {
  345. g_BMCInfo.IpmiConfig.PowerRestorePolicy =
  346. pSetPowerRestorePolicyReq->PowerRestorePolicy & 0x07;
  347. g_BMCInfo.IpmiConfig.ChassisPowerState.PowerState &= ~0x60;
  348. g_BMCInfo.IpmiConfig.ChassisPowerState.PowerState |= (pSetPowerRestorePolicyReq->PowerRestorePolicy << 5);
  349. FlushIPMIToFlash();
  350. }
  351. pSetPowerRestorePolicyRes->CompletionCode = CC_NORMAL;
  352. pSetPowerRestorePolicyRes->PowerRestorePolicy = PRP_ALWAYS_POWEROFF_SUPPORT |
  353. PRP_LAST_STATE_SUPPORT |
  354. PRP_ALWAYS_POWERON_SUPPORT;
  355. return sizeof(SetPowerRestorePolicyRes_T);
  356. }
  357. /*-------------------------------------
  358. * GetSysRestartCause
  359. *-------------------------------------*/
  360. int
  361. GetSysRestartCause ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  362. {
  363. GetSystemRestartCauseRes_T* pGetSysRestartCauseRes =
  364. ( GetSystemRestartCauseRes_T*) pRes;
  365. uint8_t *curchannel = 0;
  366. //printf ("GET SYSTEM RESTART CAUSE\n");
  367. pGetSysRestartCauseRes->CompletionCode = CC_NORMAL;
  368. pGetSysRestartCauseRes->SysRestartCause = g_BMCInfo.IpmiConfig.SysRestartCause;
  369. pGetSysRestartCauseRes->ChannelID = *curchannel & 0xF;
  370. return sizeof(GetSystemRestartCauseRes_T);
  371. }
  372. /*-------------------------------------
  373. * GetPOHCounter
  374. *-------------------------------------*/
  375. int
  376. GetPOHCounter ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  377. {
  378. //TODO: POHCounterReading unit is hour or minutes or second?
  379. GetPOHCounterRes_T* pGetPOHCounterRes = ( GetPOHCounterRes_T*) pRes;
  380. //printf ("GET POH COUNTER\r\n");
  381. pGetPOHCounterRes->CompletionCode = CC_NORMAL;
  382. pGetPOHCounterRes->MinutesPerCount = POH_MINS_PER_COUNT;
  383. pGetPOHCounterRes->POHCounterReading = g_BMCInfo.IpmiConfig.totalRunTimeCount;
  384. return sizeof(GetPOHCounterRes_T);
  385. }
  386. /*-------------------------------------
  387. * SetSysBOOTOptions
  388. *-------------------------------------*/
  389. int
  390. SetSysBOOTOptions ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  391. {
  392. printf("SetSysBOOTOptions not implement\r\n");
  393. // SetBootOptionsReq_T* pBootOptReq = ( SetBootOptionsReq_T*) pReq;
  394. // SetBootOptionsRes_T* pBootOptRes = ( SetBootOptionsRes_T*) pRes;
  395. // BMCInfo_t *pBMCInfo = &g_BMCInfo;
  396. // uint8_t Parameter;
  397. // BootOptions_T* pBootOptions;
  398. // uint8_t u8SetInProgress;
  399. // uint8_t u8TempData,SSIComputeBladeSupport;
  400. // int i,j=0;
  401. // Parameter = pBootOptReq->ParamValidCumParam & 0x7F;
  402. // SSIComputeBladeSupport = g_corefeatures.ssi_support;
  403. // /*Check for validity of parameter */
  404. // if(SSIComputeBladeSupport)
  405. // {
  406. // if ((Parameter >= sizeof (m_BootOptParamLen)) && (Parameter != CHASSIS_AMI_OEM_PARAM) &&
  407. // (Parameter != SSICB_OEM_PARAM_BLK_SIZE_TBL) && (Parameter < SSICB_BOOT_ORDER_TBL || Parameter > SSICB_SLOT_CONFIG_TBL))
  408. // {
  409. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  410. // return sizeof (SetBootOptionsRes_T);
  411. // }
  412. // }
  413. // else
  414. // {
  415. // if ((Parameter >= sizeof (m_BootOptParamLen)) && (Parameter != CHASSIS_AMI_OEM_PARAM))
  416. // {
  417. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  418. // return sizeof (SetBootOptionsRes_T);
  419. // }
  420. // }
  421. // /*Check if ReqLen valid for OEM Parameter */
  422. // if (CHASSIS_AMI_OEM_PARAM == Parameter)
  423. // {
  424. // if ((ReqLen - 1) != sizeof (AMI_BootOpt_T))
  425. // {
  426. // pBootOptRes->CompletionCode= CC_REQ_INV_LEN;
  427. // return sizeof (uint8_t);
  428. // }
  429. // }
  430. // else if (Parameter >= SSICB_OEM_PARAM_BLK_SIZE_TBL && Parameter <= SSICB_SLOT_CONFIG_TBL)
  431. // {
  432. // if(SSIComputeBladeSupport)
  433. // {
  434. // if ((ReqLen - 1) != m_SSIBootOptParamLen[Parameter-SSICB_OEM_PARAM_BLK_SIZE_TBL])
  435. // {
  436. // pBootOptRes->CompletionCode= CC_REQ_INV_LEN;
  437. // return sizeof (uint8_t);
  438. // }
  439. // }
  440. // }
  441. // else
  442. // {
  443. // /*Check if valid message length */
  444. // //if ( ((ReqLen - 1) != m_BootOptParamLen[Parameter]) && (ReqLen != sizeof (Parameter)))
  445. // if ((ReqLen - 1) != m_BootOptParamLen[Parameter])
  446. // {
  447. // pBootOptRes->CompletionCode= CC_REQ_INV_LEN;
  448. // return sizeof (uint8_t);
  449. // }
  450. // }
  451. //#if 0
  452. // Bit is 1 - Parameter is locked
  453. // Bit is 0 - Parameter is unlocked
  454. //if locked
  455. // if no req to unlock then return invalid
  456. // if req to unlock then unlock and procced
  457. //else
  458. // Proceed
  459. //#endif
  460. // /* Check for Reserved Bits */
  461. // for (i = 0; i < sizeof (m_RsvdBitsCheck)/ sizeof (m_RsvdBitsCheck[0]); i++)
  462. // {
  463. // /* Check if this Parameter Selector needs Reserved bit checking !! */
  464. // if (m_RsvdBitsCheck[i].Params == Parameter)
  465. // {
  466. // //IPMI_DBG_PRINT_2 ("Param - %x, DataLen - %x\n", pSetLanReq->ParameterSelect, m_RsvdBitsCheck[i].DataLen);
  467. // for (j = 0; j < m_RsvdBitsCheck[i].DataLen; j++)
  468. // {
  469. // // IPMI_DBG_PRINT_2 ("Cmp %x, %x\n", pReq[2+j], m_RsvdBitsCheck[i].ReservedBits[j]);
  470. // if ( 0 != (pReq[1+j] & m_RsvdBitsCheck[i].ReservedBits[j]))
  471. // {
  472. // /* Alarm !!! Somebody is trying to set Reseved Bits */
  473. // *pRes = CC_INV_DATA_FIELD;
  474. // return sizeof (*pRes);
  475. // }
  476. // }
  477. // }
  478. // }
  479. // OS_THREAD_MUTEX_ACQUIRE(&g_BMCInfo.ChassisMutex, WAIT_INFINITE);
  480. // pBootOptions = &(BMC_GET_SHARED_MEM(BMCInst)->sBootOptions);
  481. // u8SetInProgress = pBootOptions->u8SetInProgress;
  482. // /* if locked */
  483. // if (pBootOptions->ParameterValid & (1 << Parameter) )
  484. // {
  485. // /*if not req to unlock */
  486. // if (0 != (pBootOptReq->ParamValidCumParam & 0x80))
  487. // {
  488. // pBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  489. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  490. // return sizeof (uint8_t);
  491. // }
  492. // }
  493. //
  494. // /*Check for valid bit settings */
  495. // if (0 != (pBootOptReq->ParamValidCumParam & 0x80))
  496. // {
  497. // /* The valid bit for parameters 0 - 7 are SET/RESET to
  498. // * corresponding bits 0-7 in ParameterValid field
  499. // */
  500. // pBootOptions->ParameterValid |= (1 << Parameter);
  501. // }
  502. // else
  503. // {
  504. // pBootOptions->ParameterValid &= ~(1 << Parameter);
  505. // }
  506. // /*if only the parameter byte is provided then exit */
  507. // if (ReqLen == sizeof (Parameter))
  508. // {
  509. // pBootOptRes->CompletionCode = CC_NORMAL;
  510. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  511. // return sizeof (SetBootOptionsRes_T);
  512. // }
  513. // switch (Parameter)
  514. // {
  515. // case CHASSIS_SET_INPROG:
  516. // /* Commit Write is optional and supported
  517. // * only if rollback is supported */
  518. // if ( (BMC_BOOT_OPTION_SET_IN_PROGRESS != pBootOptReq->BootParam.SetInProgress) &&
  519. // (BMC_BOOT_OPTION_SET_COMPLETE != pBootOptReq->BootParam.SetInProgress) )
  520. // {
  521. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  522. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  523. // return sizeof(SetBootOptionsRes_T);
  524. // }
  525. // else if ((BMC_BOOT_OPTION_SET_IN_PROGRESS == (u8SetInProgress & 0x03)) &&
  526. // (BMC_BOOT_OPTION_SET_IN_PROGRESS == pBootOptReq->BootParam.SetInProgress))
  527. // {
  528. // IPMI_DBG_PRINT ("\nSET IN PROGRESS ALREADY SET \n");
  529. // pBootOptRes->CompletionCode = CC_SET_IN_PROGRESS;
  530. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  531. // return sizeof(SetBootOptionsRes_T);
  532. // }
  533. // /*Set the new setinpogress byte */
  534. // pBootOptions->u8SetInProgress = pBootOptReq->BootParam.SetInProgress;
  535. // break;
  536. //
  537. // case CHASSIS_SERVICE_PART_SEL:
  538. // pBootOptions->ServicePartitionSelector =
  539. // pBootOptReq->BootParam.ServicePartitionSelector;
  540. // break;
  541. //
  542. // case CHASSIS_SERVICE_PART_SCAN:
  543. // pBootOptions->ServicePartitionScan =
  544. // pBootOptReq->BootParam.ServicePartitionScan;
  545. // /*Update in NVRAM*/
  546. // g_BMCInfo.ChassisConfig.SysPartitionScan = pBootOptReq->BootParam.ServicePartitionScan;
  547. // FlushIPMI((uint8_t*)&g_BMCInfo.ChassisConfig,(uint8_t*)&g_BMCInfo.ChassisConfig.SysPartitionScan,g_BMCInfo.IPMIConfLoc.ChassisConfigAddr,sizeof(uint8_t),BMCInst);
  548. // break;
  549. //
  550. // case CHASSIS_BOOT_FLAG_VALID_BIT_CLEAR:
  551. // pBootOptions->BootFlagValidBitClearing =
  552. // pBootOptReq->BootParam.BootFlagValidBitClearing;
  553. // break;
  554. // case CHASSIS_BOOT_INFO_ACK:
  555. // _fmemcpy (( uint8_t*)&pBootOptions->BootInfoAck,
  556. // ( uint8_t*)&pBootOptReq->BootParam.BootInfoAck,
  557. // sizeof (BootInfoAck_T));
  558. // break;
  559. // case CHASSIS_BOOT_FLAGS:
  560. // u8TempData = (pBootOptReq->BootParam.BootFlags.Data2 & BIT5_BIT2_MASK);
  561. // if((u8TempData == RESERVED_VALUE_28) ||(u8TempData == RESERVED_VALUE_30) ||(u8TempData == RESERVED_VALUE_34)||(u8TempData == RESERVED_VALUE_38))
  562. // {
  563. // /* Alarm !!! Somebody is trying to set Reseved Bits */
  564. // *pRes = CC_INV_DATA_FIELD;
  565. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  566. // return sizeof (*pRes);
  567. // }
  568. // u8TempData = (pBootOptReq->BootParam.BootFlags.Data3 & BIT6_BIT5_MASK);
  569. // if((u8TempData == RESERVED_VALUE_60))
  570. // {
  571. // /* Alarm !!! Somebody is trying to set Reseved Bits */
  572. // *pRes = CC_INV_DATA_FIELD;
  573. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  574. // return sizeof (*pRes);
  575. // }
  576. // u8TempData = (pBootOptReq->BootParam.BootFlags.Data3 & BIT1_BIT0_MASK);
  577. // if((u8TempData == RESERVED_VALUE_03))
  578. // {
  579. // /* Alarm !!! Somebody is trying to set Reseved Bits */
  580. // *pRes = CC_INV_DATA_FIELD;
  581. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  582. // return sizeof (*pRes);
  583. // }
  584. // if((pBootOptReq->BootParam.BootFlags.Data5 == RESERVED_VALUE_20)||(pBootOptReq->BootParam.BootFlags.Data5 == RESERVED_VALUE_40)||(pBootOptReq->BootParam.BootFlags.Data5 == RESERVED_VALUE_80))
  585. // {
  586. // /* Alarm !!! Somebody is trying to set Reseved Bits */
  587. // *pRes = CC_INV_DATA_FIELD;
  588. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  589. // return sizeof (*pRes);
  590. // }
  591. // _fmemcpy (( uint8_t*)&pBootOptions->BootFlags,
  592. // ( uint8_t*)&pBootOptReq->BootParam.BootFlags,
  593. // sizeof (BootFlags_T));
  594. // break;
  595. // case CHASSIS_BOOT_INITIATOR_INFO:
  596. // _fmemcpy (( uint8_t*)&pBootOptions->BootInitiatorInfo,
  597. // ( uint8_t*)&pBootOptReq->BootParam.BootInitiatorInfo,
  598. // sizeof (BootInitiatorInfo_T));
  599. // break;
  600. //
  601. // case CHASSIS_BOOT_INITIATOR_MBOX:
  602. // if (pBootOptReq->BootParam.BootMailBox.BlockSel >= MAX_BOOT_INIT_MAILBOX_BLOCKS)
  603. // {
  604. // IPMI_DBG_PRINT ("\n ONLY FIVE BLOCKS ARE USED \n");
  605. // pBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  606. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  607. // return sizeof(SetBootOptionsRes_T);
  608. //
  609. // }
  610. // _fmemcpy (( uint8_t*)&pBootOptions->BootMailBox[pBootOptReq->BootParam.BootMailBox.BlockSel],
  611. // ( uint8_t*) &pBootOptReq->BootParam.BootMailBox.BootMBox,
  612. // sizeof (BootInitiatorMailbox_T));
  613. // break;
  614. // case CHASSIS_AMI_OEM_PARAM:
  615. // _fmemcpy (( uint8_t*)&g_BMCInfo.ChassisConfig.OemBootOpt,
  616. // ( uint8_t*) &pBootOptReq->BootParam.Oem,
  617. // sizeof (AMI_BootOpt_T));
  618. // FlushIPMI((uint8_t*)&g_BMCInfo.ChassisConfig,(uint8_t*)&g_BMCInfo.ChassisConfig,g_BMCInfo.IPMIConfLoc.ChassisConfigAddr,sizeof(ChassisConfig_T),BMCInst);
  619. // break;
  620. // case SSICB_OEM_PARAM_BLK_SIZE_TBL:
  621. // if(SSIComputeBladeSupport)
  622. // {
  623. // _fmemcpy (( uint8_t*)&pBootOptions->OemParamBlkSizeTbl,
  624. // ( uint8_t*)&pBootOptReq->BootParam.OemParamBlkSizeTbl,
  625. // sizeof(OemParamBlkSizeTbl_T));
  626. // break;
  627. // }
  628. // else
  629. // {
  630. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  631. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  632. // return sizeof (SetBootOptionsRes_T);
  633. // }
  634. // case SSICB_BOOT_ORDER_TBL:
  635. // if(SSIComputeBladeSupport)
  636. // {
  637. // if (pBootOptReq->BootParam.BootOrderTbl.BlockSel >= g_coremacros.ssi_bot_dev_num)
  638. // {
  639. // pBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  640. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  641. // return sizeof(uint8_t);
  642. // }
  643. // _fmemcpy (( uint8_t*)&pBootOptions->BootOrderTbl[(pBootOptReq->BootParam.BootOrderTbl.BlockSel) * sizeof(BootOrderTbl_T)],
  644. // ( uint8_t*)&pBootOptReq->BootParam.BootOrderTbl,
  645. // sizeof(BootOrderTbl_T));
  646. // break;
  647. // }
  648. // else
  649. // {
  650. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  651. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  652. // return sizeof (SetBootOptionsRes_T);
  653. // }
  654. // case SSICB_BOOT_DEV_SELECTOR:
  655. // if(SSIComputeBladeSupport)
  656. // {
  657. // pBootOptions->BootDevSelector = pBootOptReq->BootParam.BootDevSelector;
  658. // break;
  659. // }
  660. // else
  661. // {
  662. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  663. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  664. // return sizeof (SetBootOptionsRes_T);
  665. // }
  666. // case SSICB_SLOT_CONFIG_TBL:
  667. // if(SSIComputeBladeSupport)
  668. // {
  669. // _fmemcpy (( uint8_t*)&pBootOptions->SlotConfigTbl,
  670. // ( uint8_t*)&pBootOptReq->BootParam.SlotConfigTbl,
  671. // sizeof(SlotConfigTbl_T));
  672. // break;
  673. // }
  674. // else
  675. // {
  676. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  677. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  678. // return sizeof (SetBootOptionsRes_T);
  679. // }
  680. // default:
  681. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  682. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  683. // return sizeof (SetBootOptionsRes_T);
  684. // }
  685. // if (0 != ROLLBACK_OPTION)
  686. // {
  687. // if (BMC_BOOT_OPTION_COMMIT_WRITE == (u8SetInProgress & 0x03))
  688. // {
  689. // /* Writing to nvRAM when "commit write" is given */
  690. // FlushIPMI((uint8_t*)&g_BMCInfo.ChassisConfig,(uint8_t*)&g_BMCInfo.ChassisConfig,g_BMCInfo.IPMIConfLoc.ChassisConfigAddr,sizeof(ChassisConfig_T),BMCInst);
  691. // /* Setting this to "set complete", don't need mutex protection */
  692. // pBootOptions->u8SetInProgress = BMC_BOOT_OPTION_SET_COMPLETE;
  693. // }
  694. //
  695. // }
  696. // else
  697. // {
  698. // /* Since roll back feature is not provided
  699. // the data is written to nvram */
  700. // FlushIPMI((uint8_t*)&g_BMCInfo.ChassisConfig,(uint8_t*)&g_BMCInfo.ChassisConfig,g_BMCInfo.IPMIConfLoc.ChassisConfigAddr,sizeof(ChassisConfig_T),BMCInst);
  701. // }
  702. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  703. // pBootOptRes->CompletionCode = CC_NORMAL;
  704. return sizeof(SetBootOptionsRes_T);
  705. }
  706. /*-------------------------------------
  707. * GetSysBOOTOptions
  708. *-------------------------------------*/
  709. int
  710. GetSysBOOTOptions ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  711. {
  712. printf("GetSysBOOTOptions not implement\r\n");
  713. // GetBootOptionsReq_T* pGetBootOptReq = ( GetBootOptionsReq_T*) pReq;
  714. // GetBootOptionsRes_T* pGetBootOptRes = ( GetBootOptionsRes_T*) pRes;
  715. // BMCInfo_t *pBMCInfo = &g_BMCInfo[BMCInst];
  716. // uint8_t ParamSel,SSIComputeBladeSupport;
  717. // int ResponseLength;
  718. // BootOptions_T sBootOptions;
  719. // IPMI_DBG_PRINT ("GET SYSTEM BOOT OPTIONS\n");
  720. // if(pGetBootOptReq->ParamSel & RESERVED_VALUE_80)
  721. // {
  722. // /* Alarm !!! Somebody is trying to set Reseved Bits */
  723. // *pRes = CC_INV_DATA_FIELD;
  724. // return sizeof (*pRes);
  725. // }
  726. // ParamSel = pGetBootOptReq->ParamSel & 0x7F;
  727. // SSIComputeBladeSupport = g_corefeatures.ssi_support;
  728. // /*Check for validity of parameter */
  729. // if(SSIComputeBladeSupport)
  730. // {
  731. // if ((ParamSel >= sizeof (m_BootOptParamLen)) && (ParamSel != CHASSIS_AMI_OEM_PARAM) &&
  732. // (ParamSel != SSICB_OEM_PARAM_BLK_SIZE_TBL) && (ParamSel < SSICB_BOOT_ORDER_TBL || ParamSel > SSICB_SLOT_CONFIG_TBL))
  733. // {
  734. // pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  735. // return sizeof(uint8_t);
  736. // }
  737. // }
  738. // else
  739. // {
  740. // if ((ParamSel >= sizeof (m_BootOptParamLen)) && (ParamSel != CHASSIS_AMI_OEM_PARAM))
  741. // {
  742. // pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  743. // return sizeof(uint8_t);
  744. // }
  745. // }
  746. // /*Check the validity of Setselector & Blockselector */
  747. // if(SSIComputeBladeSupport)
  748. // {
  749. // if (((0 != pGetBootOptReq->SetSel) && (ParamSel != CHASSIS_BOOT_INITIATOR_MBOX || ParamSel != SSICB_BOOT_ORDER_TBL)) ||
  750. // (ParamSel == CHASSIS_BOOT_INITIATOR_MBOX && pGetBootOptReq->SetSel >= MAX_BOOT_INIT_MAILBOX_BLOCKS) ||
  751. // (ParamSel == SSICB_BOOT_ORDER_TBL && pGetBootOptReq->SetSel >= g_coremacros.ssi_bot_dev_num) ||
  752. // (0 != pGetBootOptReq->BlockSel))
  753. // {
  754. // IPMI_DBG_PRINT ("Set Selector or Block Selector is invalid\n") ;
  755. // pGetBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  756. // return sizeof(uint8_t);
  757. // }
  758. // }
  759. // else
  760. // {
  761. // if (((0 != pGetBootOptReq->SetSel) && (ParamSel != CHASSIS_BOOT_INITIATOR_MBOX)) ||
  762. // (pGetBootOptReq->SetSel >= MAX_BOOT_INIT_MAILBOX_BLOCKS) ||
  763. // (0 != pGetBootOptReq->BlockSel))
  764. // {
  765. // IPMI_DBG_PRINT ("Set Selector or Block Selector is invalid\n") ;
  766. // pGetBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  767. // return sizeof(uint8_t);
  768. // }
  769. // }
  770. // pGetBootOptRes->CompletionCode = CC_NORMAL;
  771. // pGetBootOptRes->ParamVersion = CHASSIS_PARAMETER_VERSION;
  772. // pGetBootOptRes->ParameterValid = ParamSel;
  773. // OS_THREAD_MUTEX_ACQUIRE(&g_BMCInfo.ChassisMutex, WAIT_INFINITE);
  774. // // get a local copy of the boot option from the shared memory
  775. // sBootOptions = BMC_GET_SHARED_MEM(BMCInst)->sBootOptions;
  776. // /*Set the Parameter valid bit if needed */
  777. // if (sBootOptions.ParameterValid & (1 << ParamSel))
  778. // {
  779. // pGetBootOptRes->ParameterValid |= 0x80;
  780. // }
  781. // /*Set initial length of Completion code,Param revision & Paramvalid */
  782. // ResponseLength = 0x03;
  783. // /*Load the specific parameter */
  784. // switch (ParamSel)
  785. // {
  786. // case CHASSIS_SET_INPROG :
  787. // pGetBootOptRes->BootParams.SetInProgress = sBootOptions.u8SetInProgress;
  788. // ResponseLength += sizeof (sBootOptions.u8SetInProgress);
  789. // break;
  790. // case CHASSIS_SERVICE_PART_SEL:
  791. // pGetBootOptRes->BootParams.ServicePartitionSelector =
  792. // sBootOptions.ServicePartitionSelector;
  793. // ResponseLength += sizeof (sBootOptions.ServicePartitionScan);
  794. // break;
  795. //
  796. // case CHASSIS_SERVICE_PART_SCAN:
  797. // pGetBootOptRes->BootParams.ServicePartitionScan = g_BMCInfo.ChassisConfig.SysPartitionScan;
  798. // ResponseLength += sizeof (sBootOptions.ServicePartitionScan);
  799. // break;
  800. //
  801. // case CHASSIS_BOOT_FLAG_VALID_BIT_CLEAR:
  802. // pGetBootOptRes->BootParams.BootFlagValidBitClearing =
  803. // sBootOptions.BootFlagValidBitClearing;
  804. // ResponseLength += sizeof (sBootOptions.BootFlagValidBitClearing);
  805. // break;
  806. //
  807. // case CHASSIS_BOOT_INFO_ACK:
  808. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.BootInfoAck,
  809. // ( uint8_t*)&sBootOptions.BootInfoAck,
  810. // sizeof (BootInfoAck_T));
  811. // pGetBootOptRes->BootParams.BootInfoAck.WriteMask = 0;
  812. // ResponseLength += sizeof (BootInfoAck_T);
  813. // break;
  814. //
  815. // case CHASSIS_BOOT_FLAGS:
  816. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.BootFlags,
  817. // ( uint8_t*)&sBootOptions.BootFlags,
  818. // sizeof (BootFlags_T));
  819. // ResponseLength += sizeof (BootFlags_T);
  820. // break;
  821. // case CHASSIS_BOOT_INITIATOR_INFO:
  822. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.BootInitiatorInfo,
  823. // ( uint8_t*)&sBootOptions.BootInitiatorInfo,
  824. // sizeof (BootInitiatorInfo_T));
  825. // ResponseLength += sizeof (BootInitiatorInfo_T);
  826. // break;
  827. //
  828. // case CHASSIS_BOOT_INITIATOR_MBOX:
  829. // pGetBootOptRes->BootParams.BootMailBox.BlockSel = pGetBootOptReq->SetSel;
  830. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.BootMailBox.BootMBox,
  831. // ( uint8_t*)&sBootOptions.BootMailBox[pGetBootOptReq->SetSel],
  832. // sizeof (BootInitiatorMailbox_T));
  833. // ResponseLength += sizeof (BootInitiatorMboxReq_T);
  834. // break;
  835. // case CHASSIS_AMI_OEM_PARAM:
  836. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.Oem,
  837. // ( uint8_t*)&g_BMCInfo.ChassisConfig.OemBootOpt,
  838. // sizeof (AMI_BootOpt_T));
  839. // ResponseLength += sizeof (AMI_BootOpt_T);
  840. // break;
  841. // case SSICB_OEM_PARAM_BLK_SIZE_TBL:
  842. // if(SSIComputeBladeSupport)
  843. // {
  844. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.OemParamBlkSizeTbl,
  845. // ( uint8_t*)&sBootOptions.OemParamBlkSizeTbl,
  846. // sizeof(OemParamBlkSizeTbl_T));
  847. // ResponseLength += sizeof(OemParamBlkSizeTbl_T);
  848. // break;
  849. // }
  850. // else
  851. // {
  852. // pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  853. // ResponseLength = 1 ;
  854. // break;
  855. // }
  856. // case SSICB_BOOT_ORDER_TBL:
  857. // if(SSIComputeBladeSupport)
  858. // {
  859. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.BootOrderTbl,
  860. // ( uint8_t*)&sBootOptions.BootOrderTbl[pGetBootOptReq->SetSel * sizeof(BootOrderTbl_T)],
  861. // sizeof(BootOrderTbl_T));
  862. // ResponseLength += sizeof(BootOrderTbl_T);
  863. // break;
  864. // }
  865. // else
  866. // {
  867. // pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  868. // ResponseLength = 1 ;
  869. // break;
  870. // }
  871. // case SSICB_BOOT_DEV_SELECTOR:
  872. // if(SSIComputeBladeSupport)
  873. // {
  874. // pGetBootOptRes->BootParams.BootDevSelector = sBootOptions.BootDevSelector;
  875. // ResponseLength += sizeof(sBootOptions.BootDevSelector);
  876. // break;
  877. // }
  878. // else
  879. // {
  880. // pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  881. // ResponseLength = 1 ;
  882. // break;
  883. // }
  884. // case SSICB_SLOT_CONFIG_TBL:
  885. // if(SSIComputeBladeSupport)
  886. // {
  887. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.SlotConfigTbl,
  888. // ( uint8_t*)&sBootOptions.SlotConfigTbl,
  889. // sizeof(SlotConfigTbl_T));
  890. // ResponseLength += sizeof(SlotConfigTbl_T);
  891. // break;
  892. // }
  893. // else
  894. // {
  895. // pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  896. // ResponseLength = 1 ;
  897. // break;
  898. // }
  899. // default :
  900. // pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  901. // ResponseLength = 1 ;
  902. // }
  903. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  904. // return ResponseLength;
  905. return 1;
  906. }
  907. /*-------------------------------------
  908. * SetFPButtonEnables
  909. *-------------------------------------*/
  910. int
  911. SetFPButtonEnables ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  912. {
  913. printf("SetFPButtonEnables not implement\r\n");
  914. //#if 0 //FQLI
  915. // PMConfig_T* pPMConfig;
  916. // bool bRet;
  917. // SetFPBtnEnablesRes_T* pFPBtnEnablesRes = (SetFPBtnEnablesRes_T*)pRes;
  918. // SetFPBtnEnablesReq_T* pFPBtnEnablesReq = (SetFPBtnEnablesReq_T*)pReq;
  919. // IPMI_DBG_PRINT ("PwrCtrl - SetFrontPanelEnables\n");
  920. // pFPBtnEnablesRes->CompletionCode = CC_INV_CMD;
  921. // if (pReq)
  922. // {
  923. // pFPBtnEnablesRes->CompletionCode = CC_NORMAL;
  924. // // retrieve chassis status from the NVStore
  925. // pPMConfig = ( PMConfig_T*)GetNVRAddr(NVRH_PMCONFIG);
  926. // // store the front panel enables to the NVStore
  927. // pPMConfig->ChassisConfig.ChassisPowerState.FPBtnEnables = pFPBtnEnablesReq->ButtonEnables;
  928. // // enable / disable front panel buttons. do the set before store the value in case the
  929. // // action fails. if failed to set the passthrough buttons, the current reading will be
  930. // // used to be the current settings.
  931. // bRet = PDK_SetFPEnable(&pFPBtnEnablesReq->ButtonEnables);
  932. // if (bRet != TRUE)
  933. // {
  934. // pFPBtnEnablesRes->CompletionCode = CC_UNSPECIFIED_ERR;
  935. // }
  936. // FlushPMC(&pPMConfig->ChassisConfig.ChassisPowerState.sFrontPanelButton, sizeof(ChassisPowerState_T));
  937. // }
  938. // return sizeof (SetFPBtnEnablesRes_T);
  939. //#else //AMI
  940. // SetFPBtnEnablesReq_T* pFPBtnEnablesReq = ( SetFPBtnEnablesReq_T*)pReq;
  941. // SetFPBtnEnablesRes_T* pFPBtnEnablesRes = ( SetFPBtnEnablesRes_T*)pRes;
  942. // BMCInfo_t *pBMCInfo = &g_BMCInfo[BMCInst];
  943. // IPMI_DBG_PRINT ("Set FP Button Enables\n");
  944. // /* Check for the reserved bytes should b zero */
  945. // if ( 0 != (pFPBtnEnablesReq->ButtonEnables & RESERVED_BITS_SETFPBUTTONENABLES ) )
  946. // {
  947. // pFPBtnEnablesRes->CompletionCode = CC_INV_DATA_FIELD;
  948. // return sizeof(uint8_t);
  949. // }
  950. // OS_THREAD_MUTEX_ACQUIRE(&g_BMCInfo.ChassisMutex, WAIT_INFINITE);
  951. // g_BMCInfo.ChassisConfig.ChassisPowerState.FPBtnEnables = pFPBtnEnablesReq->ButtonEnables;
  952. // if(g_PDKHandle[PDK_FPENABLE] != NULL)
  953. // {
  954. // ((int(*)(uint8_t,int))g_PDKHandle[PDK_FPENABLE]) (pFPBtnEnablesReq->ButtonEnables,BMCInst);
  955. // }
  956. // /* Save in NVR */
  957. // FlushIPMI((uint8_t*)&g_BMCInfo.IpmiConfig,sizeof(IPMIConfig_T));
  958. // pFPBtnEnablesRes->CompletionCode = 0x00;
  959. // return sizeof (SetFPBtnEnablesRes_T);
  960. //#endif //FQLI
  961. return 1;
  962. }
  963. /*-------------------------------------
  964. * SetPowerCycleInterval
  965. *-------------------------------------*/
  966. int
  967. SetPowerCycleInterval ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  968. {
  969. SetPowerCycleIntervalReq_T* pSetPowerCycleInterval = (SetPowerCycleIntervalReq_T*) pReq;
  970. SetPowerCycleIntervalRes_T* pSetPowerCycleIntervalRes = (SetPowerCycleIntervalRes_T*) pRes;
  971. g_BMCInfo.IpmiConfig.PowerCycleInterval = pSetPowerCycleInterval->PowerCycleInterval;
  972. pSetPowerCycleIntervalRes->CompletionCode = CC_NORMAL;
  973. FlushIPMIToFlash();
  974. return sizeof(SetPowerCycleIntervalRes_T);
  975. }
  976. #endif /* CHASSIS_DEVICE */