adc_main.c 8.3 KB

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  1. /* include path: install_root/linux/include */
  2. #include <linux/module.h>
  3. #include <linux/kernel.h>
  4. #include <linux/init.h>
  5. #include <linux/cdev.h>
  6. #include <linux/fs.h>
  7. #include <linux/errno.h>
  8. #include <linux/device.h>
  9. #include <linux/err.h>
  10. #include <asm/uaccess.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/irqreturn.h>
  13. #include <linux/wait.h>
  14. #include "stm32f4xx.h"
  15. #include "stm32f4xx_hal_rcc.h"
  16. #include "stm32f4xx_hal_gpio.h"
  17. #include "stm32f4xx_hal_adc.h"
  18. #include "stm32f4xx_hal_dma.h"
  19. #include "driver.h"
  20. #include "stm32_hal_legacy.h"
  21. //static dev_t devno;
  22. //static struct cdev *adc_cdev = NULL;
  23. //static int count = 3;
  24. #define NUM_OF_DEVICES 3
  25. //ruct class *my_class = NULL;
  26. //struct device *dev = NULL;
  27. #define DEVNAME "adc"
  28. struct adc_device {
  29. dev_t devno;
  30. struct cdev cdev;
  31. char data[128];
  32. char name[16];
  33. IRQn_Type DMA_IRQn;
  34. } adc_dev[NUM_OF_DEVICES];
  35. uint16_t gAdc1Value[10][7];
  36. static int adc_open(struct inode *inode, struct file *filep);
  37. static int adc_close(struct inode *inode, struct file *filep);
  38. static ssize_t adc_read(struct file *filep, char __user *buf, size_t size, loff_t *offset);
  39. static ssize_t adc_write(struct file *filep, const char __user *buf, size_t size, loff_t *offset);
  40. static int adc_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg);
  41. static struct file_operations adc_ops =
  42. {
  43. .owner = THIS_MODULE,
  44. .open = adc_open,
  45. .release = adc_close,
  46. .read = adc_read,
  47. .write = adc_write,
  48. .ioctl = adc_ioctl,
  49. };
  50. static int adc_open(struct inode *inode, struct file *filep)
  51. {
  52. return 0;
  53. }
  54. static int adc_close(struct inode *inode, struct file *filep)
  55. {
  56. //__HAL_ADC_DISABLE(&handle_adc);
  57. return 0;
  58. }
  59. static ssize_t adc_read(struct file *filep, char __user *buf, size_t size, loff_t *offset)
  60. {
  61. //printk("fmc_read!\n");
  62. return 0;
  63. }
  64. static ssize_t adc_write(struct file *filep, const char __user *buf, size_t size, loff_t *offset)
  65. {
  66. return 0;
  67. }
  68. static int adc_ioctl(struct inode *inode, struct file *filep, unsigned int cmd, unsigned long arg)
  69. {
  70. int i;
  71. adc_arg_t adc_arg;
  72. if ( copy_from_user((void*)&adc_arg, (void*)arg, 1) )
  73. return -EFAULT;
  74. if((adc_arg.channel < 1) || (adc_arg.channel > 7))
  75. return -EFAULT;
  76. switch(cmd)
  77. {
  78. case ADC_GET_RESULT:
  79. for(i=0;i<10;i++)
  80. adc_arg.value[i] = gAdc1Value[i][adc_arg.channel-1];
  81. copy_to_user((void*)arg, (void*)&adc_arg, sizeof(adc_arg_t));
  82. break;
  83. default:
  84. printk("Invalid command!\n");
  85. break;
  86. }
  87. return 0;
  88. }
  89. ADC_HandleTypeDef hadc;
  90. DMA_HandleTypeDef hdma_adc;
  91. // /**
  92. // * @brief Handles DMA interrupt request.
  93. // * @param hdma pointer to a DMA_HandleTypeDef structure that contains
  94. // * the configuration information for the specified DMA Stream.
  95. // * @retval None
  96. // */
  97. // irqreturn_t HAL_DMA_IRQHandler(int irqno, void *dev_id )
  98. // {
  99. // return IRQ_HANDLED;
  100. // }
  101. int adc_hw_init(void)
  102. {
  103. ADC_ChannelConfTypeDef sConfig;
  104. GPIO_InitTypeDef GPIO_InitStruct;
  105. /* ADC1
  106. * PA0 - ADC1_IN0
  107. * PA3 - ADC1_IN3
  108. * PA4 - ADC1_IN4
  109. * PA5 - ADC1_IN5
  110. * PA6 - ADC1_IN6
  111. * PB0 - ADC1_IN8
  112. * PB1 - ADC1_IN9
  113. */
  114. __HAL_RCC_GPIOA_CLK_ENABLE();
  115. __HAL_RCC_GPIOB_CLK_ENABLE();
  116. __HAL_RCC_GPIOF_CLK_ENABLE();
  117. GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5 | GPIO_PIN_6;
  118. GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
  119. GPIO_InitStruct.Pull = GPIO_NOPULL;
  120. HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
  121. GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1;
  122. GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
  123. GPIO_InitStruct.Pull = GPIO_NOPULL;
  124. HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
  125. GPIO_InitStruct.Pin = GPIO_PIN_10;
  126. GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
  127. GPIO_InitStruct.Pull = GPIO_NOPULL;
  128. HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
  129. __HAL_RCC_ADC1_CLK_ENABLE();
  130. hadc.Instance = ADC1;
  131. hadc.Init.ClockPrescaler = ADC_CLOCKPRESCALER_PCLK_DIV8;
  132. hadc.Init.Resolution = ADC_RESOLUTION_12B;
  133. hadc.Init.ScanConvMode = ENABLE;
  134. hadc.Init.ContinuousConvMode = ENABLE;
  135. hadc.Init.DiscontinuousConvMode = DISABLE;
  136. hadc.Init.NbrOfDiscConversion = 0;
  137. //hadc.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
  138. hadc.Init.ExternalTrigConv = ADC_SOFTWARE_START;
  139. hadc.Init.DataAlign = ADC_DATAALIGN_RIGHT;
  140. hadc.Init.NbrOfConversion = 7;
  141. hadc.Init.DMAContinuousRequests = ENABLE;
  142. hadc.Init.EOCSelection = DISABLE;
  143. if(HAL_ADC_Init(&hadc) != HAL_OK)
  144. {
  145. printk(KERN_ERR"adc hw init error!\n");
  146. }
  147. sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
  148. sConfig.Offset = 0;
  149. sConfig.Rank = 1;
  150. sConfig.Channel = ADC_CHANNEL_0;
  151. if(HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
  152. {
  153. printk(KERN_ERR"adc channel3 init error!\n");
  154. }
  155. sConfig.Rank = 2;
  156. sConfig.Channel = ADC_CHANNEL_3;
  157. if(HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
  158. {
  159. printk(KERN_ERR"adc channel3 init error!\n");
  160. }
  161. sConfig.Rank = 3;
  162. sConfig.Channel = ADC_CHANNEL_4;
  163. if(HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
  164. {
  165. printk(KERN_ERR"adc channel4 init error!\n");
  166. }
  167. sConfig.Rank = 4;
  168. sConfig.Channel = ADC_CHANNEL_5;
  169. if(HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
  170. {
  171. printk(KERN_ERR"adc channel5 init error!\n");
  172. }
  173. sConfig.Rank = 5;
  174. sConfig.Channel = ADC_CHANNEL_6;
  175. if(HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
  176. {
  177. printk(KERN_ERR"adc channel6 init error!\n");
  178. }
  179. sConfig.Rank = 6;
  180. sConfig.Channel = ADC_CHANNEL_8;
  181. if(HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
  182. {
  183. printk(KERN_ERR"adc channel3 init error!\n");
  184. }
  185. sConfig.Rank = 7;
  186. sConfig.Channel = ADC_CHANNEL_9;
  187. if(HAL_ADC_ConfigChannel(&hadc, &sConfig) != HAL_OK)
  188. {
  189. printk(KERN_ERR"adc channel3 init error!\n");
  190. }
  191. // __HAL_ADC_ENABLE(&hadc);
  192. // config dma
  193. __HAL_RCC_DMA2_CLK_ENABLE();
  194. hdma_adc.Instance = DMA2_Stream0;
  195. hdma_adc.Init.Channel = DMA_CHANNEL_0;
  196. hdma_adc.Init.Direction = DMA_PERIPH_TO_MEMORY;
  197. hdma_adc.Init.PeriphInc = DMA_PINC_DISABLE;
  198. hdma_adc.Init.MemInc = DMA_MINC_ENABLE;
  199. hdma_adc.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
  200. hdma_adc.Init.MemDataAlignment = DMA_PDATAALIGN_HALFWORD;
  201. hdma_adc.Init.Mode = DMA_CIRCULAR;
  202. hdma_adc.Init.Priority = DMA_PRIORITY_LOW;
  203. hdma_adc.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
  204. hdma_adc.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL;
  205. hdma_adc.Init.MemBurst = DMA_MBURST_SINGLE;
  206. hdma_adc.Init.PeriphBurst = DMA_PBURST_SINGLE;
  207. HAL_DMA_Init(&hdma_adc);
  208. /* Associate the initialized DMA handle to the the ADC handle */
  209. __HAL_LINKDMA(&hadc, DMA_Handle, hdma_adc);
  210. return 0;
  211. }
  212. static int __init adc_init(void)
  213. {
  214. printk("adc1 module start...\n");
  215. //ADC1
  216. adc_dev[0].devno = MKDEV(MAJOR_ADC, 0);
  217. sprintf(adc_dev[0].name, "%s%d", DEVNAME, 1);
  218. register_chrdev_region(adc_dev[0].devno, 1, adc_dev[0].name);
  219. cdev_add(&adc_dev[0].cdev, adc_dev[0].devno, 1);
  220. cdev_init(&adc_dev[0].cdev, &adc_ops);
  221. //ADC2
  222. //ADC3
  223. if(adc_hw_init() != 0)
  224. goto ERR_STEP1;
  225. // adc_dev[0].DMA_IRQn = DMA2_Stream0_IRQn;
  226. // adc_dev[1].DMA_IRQn = DMA2_Stream2_IRQn;
  227. // adc_dev[2].DMA_IRQn = DMA2_Stream1_IRQn;
  228. // // register adc1 interrupt
  229. // ret = request_irq(adc_dev[0].DMA_IRQn, HAL_DMA_IRQHandler, IRQF_SHARED, adc_dev[0].name, &adc_dev[0].devno);
  230. // if(ret) {
  231. // printk("request_irq() fialed! %d\n", ret);
  232. // goto ERR_STEP1;
  233. // }
  234. // HAL_ADC_Start(&hadc);
  235. // HAL_DMA_Start(&hdma_adc, (uint32_t)&hadc.Instance->DR, (uint16_t*)&gAdc1Value, 40);
  236. if(HAL_ADC_Start_DMA(&hadc, (uint32_t*)gAdc1Value, 70) != HAL_OK)
  237. {
  238. printk("Start DMA error!");
  239. }
  240. // ADC_Common_TypeDef * adc_commonReg = ADC123_COMMON;
  241. // printk("adc adc driver init over!, CCR = %#x\n", adc_commonReg->CCR);
  242. // printk("adc CR1: %#x, CR2: %#x\n", hadc.Instance->CR1, hadc.Instance->CR2);
  243. return 0;
  244. ERR_STEP1:
  245. unregister_chrdev_region(adc_dev[0].devno, 1);
  246. //ERR_STEP:
  247. cdev_del(&adc_dev[0].cdev);
  248. return 0;
  249. }
  250. static void __exit adc_exit(void)
  251. {
  252. unregister_chrdev_region(adc_dev[0].devno, 1);
  253. cdev_del(&adc_dev[0].cdev);
  254. }
  255. module_init(adc_init);
  256. module_exit(adc_exit);
  257. MODULE_LICENSE("GPL");
  258. MODULE_AUTHOR("jimbo_zhang");
  259. MODULE_DESCRIPTION("adc driver");