ipmi_sel.h 32 KB

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  1. /*
  2. * Copyright (c) 2003 Sun Microsystems, Inc. All Rights Reserved.
  3. *
  4. * Redistribution and use in source and binary forms, with or without
  5. * modification, are permitted provided that the following conditions
  6. * are met:
  7. *
  8. * Redistribution of source code must retain the above copyright
  9. * notice, this list of conditions and the following disclaimer.
  10. *
  11. * Redistribution in binary form must reproduce the above copyright
  12. * notice, this list of conditions and the following disclaimer in the
  13. * documentation and/or other materials provided with the distribution.
  14. *
  15. * Neither the name of Sun Microsystems, Inc. or the names of
  16. * contributors may be used to endorse or promote products derived
  17. * from this software without specific prior written permission.
  18. *
  19. * This software is provided "AS IS," without a warranty of any kind.
  20. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES,
  21. * INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A
  22. * PARTICULAR PURPOSE OR NON-INFRINGEMENT, ARE HEREBY EXCLUDED.
  23. * SUN MICROSYSTEMS, INC. ("SUN") AND ITS LICENSORS SHALL NOT BE LIABLE
  24. * FOR ANY DAMAGES SUFFERED BY LICENSEE AS A RESULT OF USING, MODIFYING
  25. * OR DISTRIBUTING THIS SOFTWARE OR ITS DERIVATIVES. IN NO EVENT WILL
  26. * SUN OR ITS LICENSORS BE LIABLE FOR ANY LOST REVENUE, PROFIT OR DATA,
  27. * OR FOR DIRECT, INDIRECT, SPECIAL, CONSEQUENTIAL, INCIDENTAL OR
  28. * PUNITIVE DAMAGES, HOWEVER CAUSED AND REGARDLESS OF THE THEORY OF
  29. * LIABILITY, ARISING OUT OF THE USE OF OR INABILITY TO USE THIS SOFTWARE,
  30. * EVEN IF SUN HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
  31. */
  32. #ifndef IPMI_SEL_H
  33. #define IPMI_SEL_H
  34. #include <inttypes.h>
  35. #include <ipmitool/ipmi.h>
  36. #include <ipmitool/ipmi_sdr.h>
  37. #define IPMI_CMD_GET_SEL_INFO 0x40
  38. #define IPMI_CMD_GET_SEL_ALLOC_INFO 0x41
  39. #define IPMI_CMD_RESERVE_SEL 0x42
  40. #define IPMI_CMD_GET_SEL_ENTRY 0x43
  41. #define IPMI_CMD_ADD_SEL_ENTRY 0x44
  42. #define IPMI_CMD_PARTIAL_ADD_SEL_ENTRY 0x45
  43. #define IPMI_CMD_DELETE_SEL_ENTRY 0x46
  44. #define IPMI_CMD_CLEAR_SEL 0x47
  45. #define IPMI_CMD_GET_SEL_TIME 0x48
  46. #define IPMI_CMD_SET_SEL_TIME 0x49
  47. #define IPMI_CMD_GET_AUX_LOG_STATUS 0x5A
  48. #define IPMI_CMD_SET_AUX_LOG_STATUS 0x5B
  49. enum {
  50. IPMI_EVENT_CLASS_DISCRETE,
  51. IPMI_EVENT_CLASS_DIGITAL,
  52. IPMI_EVENT_CLASS_THRESHOLD,
  53. IPMI_EVENT_CLASS_OEM,
  54. };
  55. #ifdef HAVE_PRAGMA_PACK
  56. #pragma pack(1)
  57. #endif
  58. struct sel_get_rq {
  59. uint16_t reserve_id;
  60. uint16_t record_id;
  61. uint8_t offset;
  62. uint8_t length;
  63. } ATTRIBUTE_PACKING;
  64. #ifdef HAVE_PRAGMA_PACK
  65. #pragma pack(0)
  66. #endif
  67. struct standard_spec_sel_rec{
  68. uint32_t timestamp;
  69. uint16_t gen_id;
  70. uint8_t evm_rev;
  71. uint8_t sensor_type;
  72. uint8_t sensor_num;
  73. #if WORDS_BIGENDIAN
  74. uint8_t event_dir : 1;
  75. uint8_t event_type : 7;
  76. #else
  77. uint8_t event_type : 7;
  78. uint8_t event_dir : 1;
  79. #endif
  80. #define DATA_BYTE2_SPECIFIED_MASK 0xc0 /* event_data[0] bit mask */
  81. #define DATA_BYTE3_SPECIFIED_MASK 0x30 /* event_data[0] bit mask */
  82. #define EVENT_OFFSET_MASK 0x0f /* event_data[0] bit mask */
  83. uint8_t event_data[3];
  84. };
  85. /* Dell Specific MACRO's */
  86. #define OEM_CODE_IN_BYTE2 0x80 /* Dell specific OEM Byte in Byte 2 Mask */
  87. #define OEM_CODE_IN_BYTE3 0x20 /* Dell specific OEM Byte in Byte 3 Mask */
  88. /* MASK MACROS */
  89. #define MASK_LOWER_NIBBLE 0x0F
  90. #define MASK_HIGHER_NIBBLE 0xF0
  91. /*Senosr type Macro's */
  92. #define SENSOR_TYPE_MEMORY 0x0C
  93. #define SENSOR_TYPE_CRIT_INTR 0x13
  94. #define SENSOR_TYPE_EVT_LOG 0x10
  95. #define SENSOR_TYPE_SYS_EVENT 0x12
  96. #define SENSOR_TYPE_PROCESSOR 0x07
  97. #define SENSOR_TYPE_OEM_SEC_EVENT 0xC1
  98. #define SENSOR_TYPE_VER_CHANGE 0x2B
  99. #define SENSOR_TYPE_FRM_PROG 0x0F
  100. #define SENSOR_TYPE_WTDOG 0x23
  101. #define SENSOR_TYPE_OEM_NFATAL_ERROR 0xC2
  102. #define SENSOR_TYPE_OEM_FATAL_ERROR 0xC3
  103. #define SENSOR_TYPE_TXT_CMD_ERROR 0x20
  104. #define SENSOR_TYPE_SUPERMICRO_OEM 0xD0
  105. /* End of Macro for DELL Specific */
  106. #define SEL_OEM_TS_DATA_LEN 6
  107. #define SEL_OEM_NOTS_DATA_LEN 13
  108. struct oem_ts_spec_sel_rec{
  109. uint32_t timestamp;
  110. uint8_t manf_id[3];
  111. uint8_t oem_defined[SEL_OEM_TS_DATA_LEN];
  112. };
  113. struct oem_nots_spec_sel_rec{
  114. uint8_t oem_defined[SEL_OEM_NOTS_DATA_LEN];
  115. };
  116. #ifdef HAVE_PRAGMA_PACK
  117. #pragma pack(1)
  118. #endif
  119. struct sel_event_record {
  120. uint16_t record_id;
  121. uint8_t record_type;
  122. union{
  123. struct standard_spec_sel_rec standard_type;
  124. struct oem_ts_spec_sel_rec oem_ts_type;
  125. struct oem_nots_spec_sel_rec oem_nots_type;
  126. } sel_type;
  127. } ATTRIBUTE_PACKING;
  128. #ifdef HAVE_PRAGMA_PACK
  129. #pragma pack(0)
  130. #endif
  131. struct ipmi_event_sensor_types {
  132. uint8_t code;
  133. uint8_t offset;
  134. #define ALL_OFFSETS_SPECIFIED 0xff
  135. uint8_t data;
  136. const char * desc;
  137. };
  138. static const struct ipmi_event_sensor_types generic_event_types[] = {
  139. /* Threshold Based States */
  140. { 0x01, 0x00, 0xff, "Lower Non-critical going low " },
  141. { 0x01, 0x01, 0xff, "Lower Non-critical going high" },
  142. { 0x01, 0x02, 0xff, "Lower Critical going low " },
  143. { 0x01, 0x03, 0xff, "Lower Critical going high" },
  144. { 0x01, 0x04, 0xff, "Lower Non-recoverable going low " },
  145. { 0x01, 0x05, 0xff, "Lower Non-recoverable going high" },
  146. { 0x01, 0x06, 0xff, "Upper Non-critical going low " },
  147. { 0x01, 0x07, 0xff, "Upper Non-critical going high" },
  148. { 0x01, 0x08, 0xff, "Upper Critical going low " },
  149. { 0x01, 0x09, 0xff, "Upper Critical going high" },
  150. { 0x01, 0x0a, 0xff, "Upper Non-recoverable going low " },
  151. { 0x01, 0x0b, 0xff, "Upper Non-recoverable going high" },
  152. /* DMI-based "usage state" States */
  153. { 0x02, 0x00, 0xff, "Transition to Idle" },
  154. { 0x02, 0x01, 0xff, "Transition to Active" },
  155. { 0x02, 0x02, 0xff, "Transition to Busy" },
  156. /* Digital-Discrete Event States */
  157. { 0x03, 0x00, 0xff, "State Deasserted" },
  158. { 0x03, 0x01, 0xff, "State Asserted" },
  159. { 0x04, 0x00, 0xff, "Predictive Failure Deasserted" },
  160. { 0x04, 0x01, 0xff, "Predictive Failure Asserted" },
  161. { 0x05, 0x00, 0xff, "Limit Not Exceeded" },
  162. { 0x05, 0x01, 0xff, "Limit Exceeded" },
  163. { 0x06, 0x00, 0xff, "Performance Met" },
  164. { 0x06, 0x01, 0xff, "Performance Lags" },
  165. /* Severity Event States */
  166. { 0x07, 0x00, 0xff, "Transition to OK" },
  167. { 0x07, 0x01, 0xff, "Transition to Non-critical from OK" },
  168. { 0x07, 0x02, 0xff, "Transition to Critical from less severe" },
  169. { 0x07, 0x03, 0xff, "Transition to Non-recoverable from less severe" },
  170. { 0x07, 0x04, 0xff, "Transition to Non-critical from more severe" },
  171. { 0x07, 0x05, 0xff, "Transition to Critical from Non-recoverable" },
  172. { 0x07, 0x06, 0xff, "Transition to Non-recoverable" },
  173. { 0x07, 0x07, 0xff, "Monitor" },
  174. { 0x07, 0x08, 0xff, "Informational" },
  175. /* Availability Status States */
  176. { 0x08, 0x00, 0xff, "Device Absent" },
  177. { 0x08, 0x01, 0xff, "Device Present" },
  178. { 0x09, 0x00, 0xff, "Device Disabled" },
  179. { 0x09, 0x01, 0xff, "Device Enabled" },
  180. { 0x0a, 0x00, 0xff, "Transition to Running" },
  181. { 0x0a, 0x01, 0xff, "Transition to In Test" },
  182. { 0x0a, 0x02, 0xff, "Transition to Power Off" },
  183. { 0x0a, 0x03, 0xff, "Transition to On Line" },
  184. { 0x0a, 0x04, 0xff, "Transition to Off Line" },
  185. { 0x0a, 0x05, 0xff, "Transition to Off Duty" },
  186. { 0x0a, 0x06, 0xff, "Transition to Degraded" },
  187. { 0x0a, 0x07, 0xff, "Transition to Power Save" },
  188. { 0x0a, 0x08, 0xff, "Install Error" },
  189. /* Redundancy States */
  190. { 0x0b, 0x00, 0xff, "Fully Redundant" },
  191. { 0x0b, 0x01, 0xff, "Redundancy Lost" },
  192. { 0x0b, 0x02, 0xff, "Redundancy Degraded" },
  193. { 0x0b, 0x03, 0xff, "Non-Redundant: Sufficient from Redundant" },
  194. { 0x0b, 0x04, 0xff, "Non-Redundant: Sufficient from Insufficient" },
  195. { 0x0b, 0x05, 0xff, "Non-Redundant: Insufficient Resources" },
  196. { 0x0b, 0x06, 0xff, "Redundancy Degraded from Fully Redundant" },
  197. { 0x0b, 0x07, 0xff, "Redundancy Degraded from Non-Redundant" },
  198. /* ACPI Device Power States */
  199. { 0x0c, 0x00, 0xff, "D0 Power State" },
  200. { 0x0c, 0x01, 0xff, "D1 Power State" },
  201. { 0x0c, 0x02, 0xff, "D2 Power State" },
  202. { 0x0c, 0x03, 0xff, "D3 Power State" },
  203. /* END */
  204. { 0x00, 0x00, 0xff, NULL },
  205. };
  206. static const struct ipmi_event_sensor_types sensor_specific_event_types[] = {
  207. /* Physical Security */
  208. { 0x05, 0x00, 0xff, "General Chassis intrusion" },
  209. { 0x05, 0x01, 0xff, "Drive Bay intrusion" },
  210. { 0x05, 0x02, 0xff, "I/O Card area intrusion" },
  211. { 0x05, 0x03, 0xff, "Processor area intrusion" },
  212. { 0x05, 0x04, 0xff, "System unplugged from LAN" },
  213. { 0x05, 0x05, 0xff, "Unauthorized dock" },
  214. { 0x05, 0x06, 0xff, "FAN area intrusion" },
  215. /* Platform Security */
  216. { 0x06, 0x00, 0xff, "Front Panel Lockout violation attempted" },
  217. { 0x06, 0x01, 0xff, "Pre-boot password violation - user password" },
  218. { 0x06, 0x02, 0xff, "Pre-boot password violation - setup password" },
  219. { 0x06, 0x03, 0xff, "Pre-boot password violation - network boot password" },
  220. { 0x06, 0x04, 0xff, "Other pre-boot password violation" },
  221. { 0x06, 0x05, 0xff, "Out-of-band access password violation" },
  222. /* Processor */
  223. { 0x07, 0x00, 0xff, "IERR" },
  224. { 0x07, 0x01, 0xff, "Thermal Trip" },
  225. { 0x07, 0x02, 0xff, "FRB1/BIST failure" },
  226. { 0x07, 0x03, 0xff, "FRB2/Hang in POST failure" },
  227. { 0x07, 0x04, 0xff, "FRB3/Processor startup/init failure" },
  228. { 0x07, 0x05, 0xff, "Configuration Error" },
  229. { 0x07, 0x06, 0xff, "SM BIOS Uncorrectable CPU-complex Error" },
  230. { 0x07, 0x07, 0xff, "Presence detected" },
  231. { 0x07, 0x08, 0xff, "Disabled" },
  232. { 0x07, 0x09, 0xff, "Terminator presence detected" },
  233. { 0x07, 0x0a, 0xff, "Throttled" },
  234. { 0x07, 0x0b, 0xff, "Uncorrectable machine check exception" },
  235. { 0x07, 0x0c, 0xff, "Correctable machine check error" },
  236. /* Power Supply */
  237. { 0x08, 0x00, 0xff, "Presence detected" },
  238. { 0x08, 0x01, 0xff, "Failure detected" },
  239. { 0x08, 0x02, 0xff, "Predictive failure" },
  240. { 0x08, 0x03, 0xff, "Power Supply AC lost" },
  241. { 0x08, 0x04, 0xff, "AC lost or out-of-range" },
  242. { 0x08, 0x05, 0xff, "AC out-of-range, but present" },
  243. { 0x08, 0x06, 0x00, "Config Error: Vendor Mismatch" },
  244. { 0x08, 0x06, 0x01, "Config Error: Revision Mismatch" },
  245. { 0x08, 0x06, 0x02, "Config Error: Processor Missing" },
  246. { 0x08, 0x06, 0x03, "Config Error: Power Supply Rating Mismatch" },
  247. { 0x08, 0x06, 0x04, "Config Error: Voltage Rating Mismatch" },
  248. { 0x08, 0x06, 0xff, "Config Error" },
  249. { 0x08, 0x06, 0xff, "Power Supply Inactive" },
  250. /* Power Unit */
  251. { 0x09, 0x00, 0xff, "Power off/down" },
  252. { 0x09, 0x01, 0xff, "Power cycle" },
  253. { 0x09, 0x02, 0xff, "240VA power down" },
  254. { 0x09, 0x03, 0xff, "Interlock power down" },
  255. { 0x09, 0x04, 0xff, "AC lost" },
  256. { 0x09, 0x05, 0xff, "Soft-power control failure" },
  257. { 0x09, 0x06, 0xff, "Failure detected" },
  258. { 0x09, 0x07, 0xff, "Predictive failure" },
  259. /* Memory */
  260. { 0x0c, 0x00, 0xff, "Correctable ECC" },
  261. { 0x0c, 0x01, 0xff, "Uncorrectable ECC" },
  262. { 0x0c, 0x02, 0xff, "Parity" },
  263. { 0x0c, 0x03, 0xff, "Memory Scrub Failed" },
  264. { 0x0c, 0x04, 0xff, "Memory Device Disabled" },
  265. { 0x0c, 0x05, 0xff, "Correctable ECC logging limit reached" },
  266. { 0x0c, 0x06, 0xff, "Presence Detected" },
  267. { 0x0c, 0x07, 0xff, "Configuration Error" },
  268. { 0x0c, 0x08, 0xff, "Spare" },
  269. { 0x0c, 0x09, 0xff, "Throttled" },
  270. { 0x0c, 0x0a, 0xff, "Critical Overtemperature" },
  271. /* Drive Slot */
  272. { 0x0d, 0x00, 0xff, "Drive Present" },
  273. { 0x0d, 0x01, 0xff, "Drive Fault" },
  274. { 0x0d, 0x02, 0xff, "Predictive Failure" },
  275. { 0x0d, 0x03, 0xff, "Hot Spare" },
  276. { 0x0d, 0x04, 0xff, "Parity Check In Progress" },
  277. { 0x0d, 0x05, 0xff, "In Critical Array" },
  278. { 0x0d, 0x06, 0xff, "In Failed Array" },
  279. { 0x0d, 0x07, 0xff, "Rebuild In Progress" },
  280. { 0x0d, 0x08, 0xff, "Rebuild Aborted" },
  281. /* System Firmware Error */
  282. { 0x0f, 0x00, 0x00, "Unspecified" },
  283. { 0x0f, 0x00, 0x01, "No system memory installed" },
  284. { 0x0f, 0x00, 0x02, "No usable system memory" },
  285. { 0x0f, 0x00, 0x03, "Unrecoverable IDE device failure" },
  286. { 0x0f, 0x00, 0x04, "Unrecoverable system-board failure" },
  287. { 0x0f, 0x00, 0x05, "Unrecoverable diskette failure" },
  288. { 0x0f, 0x00, 0x06, "Unrecoverable hard-disk controller failure" },
  289. { 0x0f, 0x00, 0x07, "Unrecoverable PS/2 or USB keyboard failure" },
  290. { 0x0f, 0x00, 0x08, "Removable boot media not found" },
  291. { 0x0f, 0x00, 0x09, "Unrecoverable video controller failure" },
  292. { 0x0f, 0x00, 0x0a, "No video device selected" },
  293. { 0x0f, 0x00, 0x0b, "BIOS corruption detected" },
  294. { 0x0f, 0x00, 0x0c, "CPU voltage mismatch" },
  295. { 0x0f, 0x00, 0x0d, "CPU speed mismatch failure" },
  296. { 0x0f, 0x00, 0xff, "Unknown Error" },
  297. /* System Firmware Hang */
  298. { 0x0f, 0x01, 0x00, "Unspecified" },
  299. { 0x0f, 0x01, 0x01, "Memory initialization" },
  300. { 0x0f, 0x01, 0x02, "Hard-disk initialization" },
  301. { 0x0f, 0x01, 0x03, "Secondary CPU Initialization" },
  302. { 0x0f, 0x01, 0x04, "User authentication" },
  303. { 0x0f, 0x01, 0x05, "User-initiated system setup" },
  304. { 0x0f, 0x01, 0x06, "USB resource configuration" },
  305. { 0x0f, 0x01, 0x07, "PCI resource configuration" },
  306. { 0x0f, 0x01, 0x08, "Option ROM initialization" },
  307. { 0x0f, 0x01, 0x09, "Video initialization" },
  308. { 0x0f, 0x01, 0x0a, "Cache initialization" },
  309. { 0x0f, 0x01, 0x0b, "SMBus initialization" },
  310. { 0x0f, 0x01, 0x0c, "Keyboard controller initialization" },
  311. { 0x0f, 0x01, 0x0d, "Management controller initialization" },
  312. { 0x0f, 0x01, 0x0e, "Docking station attachment" },
  313. { 0x0f, 0x01, 0x0f, "Enabling docking station" },
  314. { 0x0f, 0x01, 0x10, "Docking station ejection" },
  315. { 0x0f, 0x01, 0x11, "Disabling docking station" },
  316. { 0x0f, 0x01, 0x12, "Calling operating system wake-up vector" },
  317. { 0x0f, 0x01, 0x13, "System boot initiated" },
  318. { 0x0f, 0x01, 0x14, "Motherboard initialization" },
  319. { 0x0f, 0x01, 0x15, "reserved" },
  320. { 0x0f, 0x01, 0x16, "Floppy initialization" },
  321. { 0x0f, 0x01, 0x17, "Keyboard test" },
  322. { 0x0f, 0x01, 0x18, "Pointing device test" },
  323. { 0x0f, 0x01, 0x19, "Primary CPU initialization" },
  324. { 0x0f, 0x01, 0xff, "Unknown Hang" },
  325. /* System Firmware Progress */
  326. { 0x0f, 0x02, 0x00, "Unspecified" },
  327. { 0x0f, 0x02, 0x01, "Memory initialization" },
  328. { 0x0f, 0x02, 0x02, "Hard-disk initialization" },
  329. { 0x0f, 0x02, 0x03, "Secondary CPU Initialization" },
  330. { 0x0f, 0x02, 0x04, "User authentication" },
  331. { 0x0f, 0x02, 0x05, "User-initiated system setup" },
  332. { 0x0f, 0x02, 0x06, "USB resource configuration" },
  333. { 0x0f, 0x02, 0x07, "PCI resource configuration" },
  334. { 0x0f, 0x02, 0x08, "Option ROM initialization" },
  335. { 0x0f, 0x02, 0x09, "Video initialization" },
  336. { 0x0f, 0x02, 0x0a, "Cache initialization" },
  337. { 0x0f, 0x02, 0x0b, "SMBus initialization" },
  338. { 0x0f, 0x02, 0x0c, "Keyboard controller initialization" },
  339. { 0x0f, 0x02, 0x0d, "Management controller initialization" },
  340. { 0x0f, 0x02, 0x0e, "Docking station attachment" },
  341. { 0x0f, 0x02, 0x0f, "Enabling docking station" },
  342. { 0x0f, 0x02, 0x10, "Docking station ejection" },
  343. { 0x0f, 0x02, 0x11, "Disabling docking station" },
  344. { 0x0f, 0x02, 0x12, "Calling operating system wake-up vector" },
  345. { 0x0f, 0x02, 0x13, "System boot initiated" },
  346. { 0x0f, 0x02, 0x14, "Motherboard initialization" },
  347. { 0x0f, 0x02, 0x15, "reserved" },
  348. { 0x0f, 0x02, 0x16, "Floppy initialization" },
  349. { 0x0f, 0x02, 0x17, "Keyboard test" },
  350. { 0x0f, 0x02, 0x18, "Pointing device test" },
  351. { 0x0f, 0x02, 0x19, "Primary CPU initialization" },
  352. { 0x0f, 0x02, 0xff, "Unknown Progress" },
  353. /* Event Logging Disabled */
  354. { 0x10, 0x00, 0xff, "Correctable memory error logging disabled" },
  355. { 0x10, 0x01, 0xff, "Event logging disabled" },
  356. { 0x10, 0x02, 0xff, "Log area reset/cleared" },
  357. { 0x10, 0x03, 0xff, "All event logging disabled" },
  358. { 0x10, 0x04, 0xff, "Log full" },
  359. { 0x10, 0x05, 0xff, "Log almost full" },
  360. /* Watchdog 1 */
  361. { 0x11, 0x00, 0xff, "BIOS Reset" },
  362. { 0x11, 0x01, 0xff, "OS Reset" },
  363. { 0x11, 0x02, 0xff, "OS Shut Down" },
  364. { 0x11, 0x03, 0xff, "OS Power Down" },
  365. { 0x11, 0x04, 0xff, "OS Power Cycle" },
  366. { 0x11, 0x05, 0xff, "OS NMI/Diag Interrupt" },
  367. { 0x11, 0x06, 0xff, "OS Expired" },
  368. { 0x11, 0x07, 0xff, "OS pre-timeout Interrupt" },
  369. /* System Event */
  370. { 0x12, 0x00, 0xff, "System Reconfigured" },
  371. { 0x12, 0x01, 0xff, "OEM System boot event" },
  372. { 0x12, 0x02, 0xff, "Undetermined system hardware failure" },
  373. { 0x12, 0x03, 0xff, "Entry added to auxiliary log" },
  374. { 0x12, 0x04, 0xff, "PEF Action" },
  375. { 0x12, 0x05, 0xff, "Timestamp Clock Sync" },
  376. /* Critical Interrupt */
  377. { 0x13, 0x00, 0xff, "NMI/Diag Interrupt" },
  378. { 0x13, 0x01, 0xff, "Bus Timeout" },
  379. { 0x13, 0x02, 0xff, "I/O Channel check NMI" },
  380. { 0x13, 0x03, 0xff, "Software NMI" },
  381. { 0x13, 0x04, 0xff, "PCI PERR" },
  382. { 0x13, 0x05, 0xff, "PCI SERR" },
  383. { 0x13, 0x06, 0xff, "EISA failsafe timeout" },
  384. { 0x13, 0x07, 0xff, "Bus Correctable error" },
  385. { 0x13, 0x08, 0xff, "Bus Uncorrectable error" },
  386. { 0x13, 0x09, 0xff, "Fatal NMI" },
  387. { 0x13, 0x0a, 0xff, "Bus Fatal Error" },
  388. { 0x13, 0x0b, 0xff, "Bus Degraded" },
  389. /* Button */
  390. { 0x14, 0x00, 0xff, "Power Button pressed" },
  391. { 0x14, 0x01, 0xff, "Sleep Button pressed" },
  392. { 0x14, 0x02, 0xff, "Reset Button pressed" },
  393. { 0x14, 0x03, 0xff, "FRU Latch" },
  394. { 0x14, 0x04, 0xff, "FRU Service" },
  395. /* Chip Set */
  396. { 0x19, 0x00, 0xff, "Soft Power Control Failure" },
  397. { 0x19, 0x01, 0xff, "Thermal Trip" },
  398. /* Cable/Interconnect */
  399. { 0x1b, 0x00, 0xff, "Connected" },
  400. { 0x1b, 0x01, 0xff, "Config Error" },
  401. /* System Boot Initiated */
  402. { 0x1d, 0x00, 0xff, "Initiated by power up" },
  403. { 0x1d, 0x01, 0xff, "Initiated by hard reset" },
  404. { 0x1d, 0x02, 0xff, "Initiated by warm reset" },
  405. { 0x1d, 0x03, 0xff, "User requested PXE boot" },
  406. { 0x1d, 0x04, 0xff, "Automatic boot to diagnostic" },
  407. { 0x1d, 0x05, 0xff, "OS initiated hard reset" },
  408. { 0x1d, 0x06, 0xff, "OS initiated warm reset" },
  409. { 0x1d, 0x07, 0xff, "System Restart" },
  410. /* Boot Error */
  411. { 0x1e, 0x00, 0xff, "No bootable media" },
  412. { 0x1e, 0x01, 0xff, "Non-bootable disk in drive" },
  413. { 0x1e, 0x02, 0xff, "PXE server not found" },
  414. { 0x1e, 0x03, 0xff, "Invalid boot sector" },
  415. { 0x1e, 0x04, 0xff, "Timeout waiting for selection" },
  416. /* OS Boot */
  417. { 0x1f, 0x00, 0xff, "A: boot completed" },
  418. { 0x1f, 0x01, 0xff, "C: boot completed" },
  419. { 0x1f, 0x02, 0xff, "PXE boot completed" },
  420. { 0x1f, 0x03, 0xff, "Diagnostic boot completed" },
  421. { 0x1f, 0x04, 0xff, "CD-ROM boot completed" },
  422. { 0x1f, 0x05, 0xff, "ROM boot completed" },
  423. { 0x1f, 0x06, 0xff, "boot completed - device not specified" },
  424. { 0x1f, 0x07, 0xff, "Installation started" },
  425. { 0x1f, 0x08, 0xff, "Installation completed" },
  426. { 0x1f, 0x09, 0xff, "Installation aborted" },
  427. { 0x1f, 0x0a, 0xff, "Installation failed" },
  428. /* OS Stop/Shutdown */
  429. { 0x20, 0x00, 0xff, "Error during system startup" },
  430. { 0x20, 0x01, 0xff, "Run-time critical stop" },
  431. { 0x20, 0x02, 0xff, "OS graceful stop" },
  432. { 0x20, 0x03, 0xff, "OS graceful shutdown" },
  433. { 0x20, 0x04, 0xff, "PEF initiated soft shutdown" },
  434. { 0x20, 0x05, 0xff, "Agent not responding" },
  435. /* Slot/Connector */
  436. { 0x21, 0x00, 0xff, "Fault Status" },
  437. { 0x21, 0x01, 0xff, "Identify Status" },
  438. { 0x21, 0x02, 0xff, "Device Installed" },
  439. { 0x21, 0x03, 0xff, "Ready for Device Installation" },
  440. { 0x21, 0x04, 0xff, "Ready for Device Removal" },
  441. { 0x21, 0x05, 0xff, "Slot Power is Off" },
  442. { 0x21, 0x06, 0xff, "Device Removal Request" },
  443. { 0x21, 0x07, 0xff, "Interlock" },
  444. { 0x21, 0x08, 0xff, "Slot is Disabled" },
  445. { 0x21, 0x09, 0xff, "Spare Device" },
  446. /* System ACPI Power State */
  447. { 0x22, 0x00, 0xff, "S0/G0: working" },
  448. { 0x22, 0x01, 0xff, "S1: sleeping with system hw & processor context maintained" },
  449. { 0x22, 0x02, 0xff, "S2: sleeping, processor context lost" },
  450. { 0x22, 0x03, 0xff, "S3: sleeping, processor & hw context lost, memory retained" },
  451. { 0x22, 0x04, 0xff, "S4: non-volatile sleep/suspend-to-disk" },
  452. { 0x22, 0x05, 0xff, "S5/G2: soft-off" },
  453. { 0x22, 0x06, 0xff, "S4/S5: soft-off" },
  454. { 0x22, 0x07, 0xff, "G3: mechanical off" },
  455. { 0x22, 0x08, 0xff, "Sleeping in S1/S2/S3 state" },
  456. { 0x22, 0x09, 0xff, "G1: sleeping" },
  457. { 0x22, 0x0a, 0xff, "S5: entered by override" },
  458. { 0x22, 0x0b, 0xff, "Legacy ON state" },
  459. { 0x22, 0x0c, 0xff, "Legacy OFF state" },
  460. { 0x22, 0x0e, 0xff, "Unknown" },
  461. /* Watchdog 2 */
  462. { 0x23, 0x00, 0xff, "Timer expired" },
  463. { 0x23, 0x01, 0xff, "Hard reset" },
  464. { 0x23, 0x02, 0xff, "Power down" },
  465. { 0x23, 0x03, 0xff, "Power cycle" },
  466. { 0x23, 0x04, 0xff, "reserved" },
  467. { 0x23, 0x05, 0xff, "reserved" },
  468. { 0x23, 0x06, 0xff, "reserved" },
  469. { 0x23, 0x07, 0xff, "reserved" },
  470. { 0x23, 0x08, 0xff, "Timer interrupt" },
  471. /* Platform Alert */
  472. { 0x24, 0x00, 0xff, "Platform generated page" },
  473. { 0x24, 0x01, 0xff, "Platform generated LAN alert" },
  474. { 0x24, 0x02, 0xff, "Platform Event Trap generated" },
  475. { 0x24, 0x03, 0xff, "Platform generated SNMP trap, OEM format" },
  476. /* Entity Presence */
  477. { 0x25, 0x00, 0xff, "Present" },
  478. { 0x25, 0x01, 0xff, "Absent" },
  479. { 0x25, 0x02, 0xff, "Disabled" },
  480. /* LAN */
  481. { 0x27, 0x00, 0xff, "Heartbeat Lost" },
  482. { 0x27, 0x01, 0xff, "Heartbeat" },
  483. /* Management Subsystem Health */
  484. { 0x28, 0x00, 0xff, "Sensor access degraded or unavailable" },
  485. { 0x28, 0x01, 0xff, "Controller access degraded or unavailable" },
  486. { 0x28, 0x02, 0xff, "Management controller off-line" },
  487. { 0x28, 0x03, 0xff, "Management controller unavailable" },
  488. { 0x28, 0x04, 0xff, "Sensor failure" },
  489. { 0x28, 0x05, 0xff, "FRU failure" },
  490. /* Battery */
  491. { 0x29, 0x00, 0xff, "Low" },
  492. { 0x29, 0x01, 0xff, "Failed" },
  493. { 0x29, 0x02, 0xff, "Presence Detected" },
  494. /* Version Change */
  495. { 0x2b, 0x00, 0xff, "Hardware change detected" },
  496. { 0x2b, 0x01, 0x00, "Firmware or software change detected" },
  497. { 0x2b, 0x01, 0x01, "Firmware or software change detected, Mngmt Ctrl Dev Id" },
  498. { 0x2b, 0x01, 0x02, "Firmware or software change detected, Mngmt Ctrl Firm Rev" },
  499. { 0x2b, 0x01, 0x03, "Firmware or software change detected, Mngmt Ctrl Dev Rev" },
  500. { 0x2b, 0x01, 0x04, "Firmware or software change detected, Mngmt Ctrl Manuf Id" },
  501. { 0x2b, 0x01, 0x05, "Firmware or software change detected, Mngmt Ctrl IPMI Vers" },
  502. { 0x2b, 0x01, 0x06, "Firmware or software change detected, Mngmt Ctrl Aux Firm Id" },
  503. { 0x2b, 0x01, 0x07, "Firmware or software change detected, Mngmt Ctrl Firm Boot Block" },
  504. { 0x2b, 0x01, 0x08, "Firmware or software change detected, Mngmt Ctrl Other" },
  505. { 0x2b, 0x01, 0x09, "Firmware or software change detected, BIOS/EFI change" },
  506. { 0x2b, 0x01, 0x0A, "Firmware or software change detected, SMBIOS change" },
  507. { 0x2b, 0x01, 0x0B, "Firmware or software change detected, O/S change" },
  508. { 0x2b, 0x01, 0x0C, "Firmware or software change detected, O/S loader change" },
  509. { 0x2b, 0x01, 0x0D, "Firmware or software change detected, Service Diag change" },
  510. { 0x2b, 0x01, 0x0E, "Firmware or software change detected, Mngmt SW agent change" },
  511. { 0x2b, 0x01, 0x0F, "Firmware or software change detected, Mngmt SW App change" },
  512. { 0x2b, 0x01, 0x10, "Firmware or software change detected, Mngmt SW Middle" },
  513. { 0x2b, 0x01, 0x11, "Firmware or software change detected, Prog HW Change (FPGA)" },
  514. { 0x2b, 0x01, 0x12, "Firmware or software change detected, board/FRU module change" },
  515. { 0x2b, 0x01, 0x13, "Firmware or software change detected, board/FRU component change" },
  516. { 0x2b, 0x01, 0x14, "Firmware or software change detected, board/FRU replace equ ver" },
  517. { 0x2b, 0x01, 0x15, "Firmware or software change detected, board/FRU replace new ver" },
  518. { 0x2b, 0x01, 0x16, "Firmware or software change detected, board/FRU replace old ver" },
  519. { 0x2b, 0x01, 0x17, "Firmware or software change detected, board/FRU HW conf change" },
  520. { 0x2b, 0x02, 0xff, "Hardware incompatibility detected" },
  521. { 0x2b, 0x03, 0xff, "Firmware or software incompatibility detected" },
  522. { 0x2b, 0x04, 0xff, "Invalid or unsupported hardware version" },
  523. { 0x2b, 0x05, 0xff, "Invalid or unsupported firmware or software version" },
  524. { 0x2b, 0x06, 0xff, "Hardware change success" },
  525. { 0x2b, 0x07, 0x00, "Firmware or software change success" },
  526. { 0x2b, 0x07, 0x01, "Firmware or software change success, Mngmt Ctrl Dev Id" },
  527. { 0x2b, 0x07, 0x02, "Firmware or software change success, Mngmt Ctrl Firm Rev" },
  528. { 0x2b, 0x07, 0x03, "Firmware or software change success, Mngmt Ctrl Dev Rev" },
  529. { 0x2b, 0x07, 0x04, "Firmware or software change success, Mngmt Ctrl Manuf Id" },
  530. { 0x2b, 0x07, 0x05, "Firmware or software change success, Mngmt Ctrl IPMI Vers" },
  531. { 0x2b, 0x07, 0x06, "Firmware or software change success, Mngmt Ctrl Aux Firm Id" },
  532. { 0x2b, 0x07, 0x07, "Firmware or software change success, Mngmt Ctrl Firm Boot Block" },
  533. { 0x2b, 0x07, 0x08, "Firmware or software change success, Mngmt Ctrl Other" },
  534. { 0x2b, 0x07, 0x09, "Firmware or software change success, BIOS/EFI change" },
  535. { 0x2b, 0x07, 0x0A, "Firmware or software change success, SMBIOS change" },
  536. { 0x2b, 0x07, 0x0B, "Firmware or software change success, O/S change" },
  537. { 0x2b, 0x07, 0x0C, "Firmware or software change success, O/S loader change" },
  538. { 0x2b, 0x07, 0x0D, "Firmware or software change success, Service Diag change" },
  539. { 0x2b, 0x07, 0x0E, "Firmware or software change success, Mngmt SW agent change" },
  540. { 0x2b, 0x07, 0x0F, "Firmware or software change success, Mngmt SW App change" },
  541. { 0x2b, 0x07, 0x10, "Firmware or software change success, Mngmt SW Middle" },
  542. { 0x2b, 0x07, 0x11, "Firmware or software change success, Prog HW Change (FPGA)" },
  543. { 0x2b, 0x07, 0x12, "Firmware or software change success, board/FRU module change" },
  544. { 0x2b, 0x07, 0x13, "Firmware or software change success, board/FRU component change" },
  545. { 0x2b, 0x07, 0x14, "Firmware or software change success, board/FRU replace equ ver" },
  546. { 0x2b, 0x07, 0x15, "Firmware or software change success, board/FRU replace new ver" },
  547. { 0x2b, 0x07, 0x16, "Firmware or software change success, board/FRU replace old ver" },
  548. { 0x2b, 0x07, 0x17, "Firmware or software change success, board/FRU HW conf change" },
  549. /* FRU State */
  550. { 0x2c, 0x00, 0xff, "Not Installed" },
  551. { 0x2c, 0x01, 0xff, "Inactive" },
  552. { 0x2c, 0x02, 0xff, "Activation Requested" },
  553. { 0x2c, 0x03, 0xff, "Activation in Progress" },
  554. { 0x2c, 0x04, 0xff, "Active" },
  555. { 0x2c, 0x05, 0xff, "Deactivation Requested" },
  556. { 0x2c, 0x06, 0xff, "Deactivation in Progress" },
  557. { 0x2c, 0x07, 0xff, "Communication lost" },
  558. /* PICMG FRU Hot Swap */
  559. { 0xF0, 0x00, 0xFF, "Transition to M0" },
  560. { 0xF0, 0x01, 0xFF, "Transition to M1" },
  561. { 0xF0, 0x02, 0xFF, "Transition to M2" },
  562. { 0xF0, 0x03, 0xFF, "Transition to M3" },
  563. { 0xF0, 0x04, 0xFF, "Transition to M4" },
  564. { 0xF0, 0x05, 0xFF, "Transition to M5" },
  565. { 0xF0, 0x06, 0xFF, "Transition to M6" },
  566. { 0xF0, 0x07, 0xFF, "Transition to M7" },
  567. /* PICMG IPMB Physical Link */
  568. { 0xF1, 0x00, 0xff, "IPMB-A disabled, IPMB-B disabled" },
  569. { 0xF1, 0x01, 0xff, "IPMB-A enabled, IPMB-B disabled" },
  570. { 0xF1, 0x02, 0xff, "IPMB-A disabled, IPMB-B enabled" },
  571. { 0xF1, 0x03, 0xff, "IPMB-A enabled, IPMP-B enabled" },
  572. /* PICNG Moduke Hot Swap */
  573. { 0xF2, 0x00, 0xff, "Module Handle Closed" },
  574. { 0xF2, 0x01, 0xff, "Module Handle Opened" },
  575. { 0xF2, 0x02, 0xff, "Quiesced" },
  576. { 0x00, 0x00, 0xff, NULL },
  577. };
  578. static const struct ipmi_event_sensor_types vita_sensor_event_types[] = {
  579. /* VITA FRU State */
  580. { 0xF0, 0x00, 0xFF, "Transition to M0" },
  581. { 0xF0, 0x01, 0xFF, "Transition to M1" },
  582. { 0xF0, 0x04, 0xFF, "Transition to M4" },
  583. { 0xF0, 0x05, 0xFF, "Transition to M5" },
  584. { 0xF0, 0x06, 0xFF, "Transition to M6" },
  585. { 0xF0, 0x07, 0xFF, "Transition to M7" },
  586. /* VITA System IPMB Link */
  587. { 0xF1, 0x00, 0xFF, "IPMB-A disabled, IPMB-B disabled" },
  588. { 0xF1, 0x01, 0xFF, "IPMB-A enabled, IPMB-B disabled" },
  589. { 0xF1, 0x02, 0xFF, "IPMB-A disabled, IPMB-B enabled" },
  590. { 0xF1, 0x03, 0xFF, "IPMB-A enabled, IPMP-B enabled" },
  591. /* VITA FRU Temperature */
  592. { 0xF3, 0x00, 0xff, "At or below Lower Non-critical" },
  593. { 0xF3, 0x01, 0xff, "At or below Lower Critical" },
  594. { 0xF3, 0x02, 0xff, "At or below Lower Non-recoverable" },
  595. { 0xF3, 0x03, 0xff, "At or above Upper Non-critical" },
  596. { 0xF3, 0x04, 0xff, "At or above Upper Critical" },
  597. { 0xF3, 0x05, 0xff, "At or above Upper Non-recoverable" },
  598. { 0x00, 0x00, 0xff, NULL }
  599. };
  600. static const struct ipmi_event_sensor_types oem_kontron_event_types[] = {
  601. /* Board Reset(cPCI) */
  602. { 0xC1, 0x00, 0xff, "Push Button" },
  603. { 0xC1, 0x01, 0xff, "Bridge Reset" },
  604. { 0xC1, 0x02, 0xff, "Backplane" },
  605. { 0xC1, 0x03, 0xff, "Hotswap Fault" },
  606. { 0xC1, 0x04, 0xff, "Hotswap Healty" },
  607. { 0xC1, 0x05, 0xff, "Unknown" },
  608. { 0xC1, 0x06, 0xff, "ITP" },
  609. { 0xC1, 0x07, 0xff, "Hardware Watchdog" },
  610. { 0xC1, 0x08, 0xff, "Software Reset" },
  611. /* IPMB-L Link State, based on PICMG IPMB-0 Link state sensor */
  612. { 0xC3, 0x02, 0xff, "IPMB L Disabled" },
  613. { 0xC3, 0x03, 0xff, "IPMB L Enabled" },
  614. /* Board Reset */
  615. { 0xC4, 0x00, 0xff, "Push Button" },
  616. { 0xC4, 0x01, 0xff, "Hardware Power Failure" },
  617. { 0xC4, 0x02, 0xff, "Unknown" },
  618. { 0xC4, 0x03, 0xff, "Hardware Watchdog" },
  619. { 0xC4, 0x04, 0xff, "Soft Reset" },
  620. { 0xC4, 0x05, 0xff, "Warm Reset" },
  621. { 0xC4, 0x06, 0xff, "Cold Reset" },
  622. { 0xC4, 0x07, 0xff, "IPMI Command" },
  623. { 0xC4, 0x08, 0xff, "Setup Reset (Save CMOS)" },
  624. { 0xC4, 0x09, 0xff, "Power Up Reset" },
  625. /* POST Value */
  626. { 0xC6, 0x0E, 0xff, "Post Error (see data2)" },
  627. /* FWUM Status */
  628. { 0xC7, 0x00, 0xff, "First Boot After Upgrade" },
  629. { 0xC7, 0x01, 0xff, "First Boot After Rollback(error)" },
  630. { 0xC7, 0x02, 0xff, "First Boot After Errors (watchdog)" },
  631. { 0xC7, 0x03, 0xff, "First Boot After Manual Rollback" },
  632. { 0xC7, 0x08, 0xff, "Firmware Watchdog Bite, reset occurred" },
  633. /* Switch Mngt Software Status */
  634. { 0xC8, 0x00, 0xff, "Not Loaded" },
  635. { 0xC8, 0x01, 0xff, "Initializing" },
  636. { 0xC8, 0x02, 0xff, "Ready" },
  637. { 0xC8, 0x03, 0xff, "Failure (see data2)" },
  638. /* Diagnostic Status */
  639. { 0xC9, 0x00, 0xff, "Started" },
  640. { 0xC9, 0x01, 0xff, "Pass" },
  641. { 0xC9, 0x02, 0xff, "Fail" },
  642. { 0xCA, 0x00, 0xff, "In progress"},
  643. { 0xCA, 0x01, 0xff, "Success"},
  644. { 0xCA, 0x02, 0xff, "Failure"},
  645. /* FRU Over Current */
  646. { 0xCB, 0x00, 0xff, "Asserted"},
  647. { 0xCB, 0x01, 0xff, "Deasserted"},
  648. /* FRU Sensor Error */
  649. { 0xCC, 0x00, 0xff, "Asserted"},
  650. { 0xCC, 0x01, 0xff, "Deasserted"},
  651. /* FRU Power Denied */
  652. { 0xCD, 0x00, 0xff, "Asserted"},
  653. { 0xCD, 0x01, 0xff, "Deasserted"},
  654. /* Reset */
  655. { 0xCF, 0x00, 0xff, "Asserted"},
  656. { 0xCF, 0x01, 0xff, "Deasserted"},
  657. /* END */
  658. { 0x00, 0x00, 0xff, NULL },
  659. };
  660. int ipmi_sel_main(struct ipmi_intf *, int, char **);
  661. void ipmi_sel_print_std_entry(struct ipmi_intf * intf, struct sel_event_record * evt);
  662. void ipmi_sel_print_std_entry_verbose(struct ipmi_intf * intf, struct sel_event_record * evt);
  663. void ipmi_sel_print_extended_entry(struct ipmi_intf * intf, struct sel_event_record * evt);
  664. void ipmi_sel_print_extended_entry_verbose(struct ipmi_intf * intf, struct sel_event_record * evt);
  665. void ipmi_get_event_desc(struct ipmi_intf * intf, struct sel_event_record * rec, char ** desc);
  666. const char * ipmi_get_sensor_type(struct ipmi_intf *intf, uint8_t code);
  667. uint16_t ipmi_sel_get_std_entry(struct ipmi_intf * intf, uint16_t id, struct sel_event_record * evt);
  668. char * get_newisys_evt_desc(struct ipmi_intf * intf, struct sel_event_record * rec);
  669. IPMI_OEM ipmi_get_oem(struct ipmi_intf * intf);
  670. char * ipmi_get_oem_desc(struct ipmi_intf * intf, struct sel_event_record * rec);
  671. int ipmi_sel_oem_init(const char * filename);
  672. const struct ipmi_event_sensor_types *
  673. ipmi_get_first_event_sensor_type(struct ipmi_intf *intf, uint8_t sensor_type, uint8_t event_type);
  674. const struct ipmi_event_sensor_types *
  675. ipmi_get_next_event_sensor_type(const struct ipmi_event_sensor_types *evt);
  676. #endif /* IPMI_SEL_H */