stm32f4xx_hal_spdifrx.c 44 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_spdifrx.c
  4. * @author MCD Application Team
  5. * @brief This file provides firmware functions to manage the following
  6. * functionalities of the SPDIFRX audio interface:
  7. * + Initialization and Configuration
  8. * + Data transfers functions
  9. * + DMA transfers management
  10. * + Interrupts and flags management
  11. @verbatim
  12. ===============================================================================
  13. ##### How to use this driver #####
  14. ===============================================================================
  15. [..]
  16. The SPDIFRX HAL driver can be used as follow:
  17. (#) Declare SPDIFRX_HandleTypeDef handle structure.
  18. (#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API:
  19. (##) Enable the SPDIFRX interface clock.
  20. (##) SPDIFRX pins configuration:
  21. (+++) Enable the clock for the SPDIFRX GPIOs.
  22. (+++) Configure these SPDIFRX pins as alternate function pull-up.
  23. (##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveControlFlow_IT() and HAL_SPDIFRX_ReceiveDataFlow_IT() API's).
  24. (+++) Configure the SPDIFRX interrupt priority.
  25. (+++) Enable the NVIC SPDIFRX IRQ handle.
  26. (##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and HAL_SPDIFRX_ReceiveControlFlow_DMA() API's).
  27. (+++) Declare a DMA handle structure for the reception of the Data Flow channel.
  28. (+++) Declare a DMA handle structure for the reception of the Control Flow channel.
  29. (+++) Enable the DMAx interface clock.
  30. (+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters.
  31. (+++) Configure the DMA Channel.
  32. (+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle.
  33. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
  34. DMA CtrlRx/DataRx channel.
  35. (#) Program the input selection, re-tries number, wait for activity, channel status selection, data format, stereo mode and masking of user bits
  36. using HAL_SPDIFRX_Init() function.
  37. -@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros
  38. __SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process.
  39. -@- Make sure that ck_spdif clock is configured.
  40. (#) Three operation modes are available within this driver :
  41. *** Polling mode for reception operation (for debug purpose) ***
  42. ================================================================
  43. [..]
  44. (+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow()
  45. (+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveControlFlow()
  46. *** Interrupt mode for reception operation ***
  47. =========================================
  48. [..]
  49. (+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT()
  50. (+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveControlFlow_IT()
  51. (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
  52. add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
  53. (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
  54. add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
  55. (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
  56. add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
  57. *** DMA mode for reception operation ***
  58. ========================================
  59. [..]
  60. (+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA()
  61. (+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveControlFlow_DMA()
  62. (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
  63. add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
  64. (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
  65. add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
  66. (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
  67. add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
  68. (+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop()
  69. *** SPDIFRX HAL driver macros list ***
  70. =============================================
  71. [..]
  72. Below the list of most used macros in SPDIFRX HAL driver.
  73. (+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDEL State)
  74. (+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State)
  75. (+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State)
  76. (+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts
  77. (+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts
  78. (+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not.
  79. [..]
  80. (@) You can refer to the SPDIFRX HAL driver header file for more useful macros
  81. @endverbatim
  82. ******************************************************************************
  83. * @attention
  84. *
  85. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  86. *
  87. * Redistribution and use in source and binary forms, with or without modification,
  88. * are permitted provided that the following conditions are met:
  89. * 1. Redistributions of source code must retain the above copyright notice,
  90. * this list of conditions and the following disclaimer.
  91. * 2. Redistributions in binary form must reproduce the above copyright notice,
  92. * this list of conditions and the following disclaimer in the documentation
  93. * and/or other materials provided with the distribution.
  94. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  95. * may be used to endorse or promote products derived from this software
  96. * without specific prior written permission.
  97. *
  98. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  99. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  100. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  101. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  102. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  103. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  104. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  105. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  106. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  107. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  108. *
  109. ******************************************************************************
  110. */
  111. /* Includes ------------------------------------------------------------------*/
  112. #include "stm32f4xx_hal.h"
  113. /** @addtogroup STM32F4xx_HAL_Driver
  114. * @{
  115. */
  116. /** @defgroup SPDIFRX SPDIFRX
  117. * @brief SPDIFRX HAL module driver
  118. * @{
  119. */
  120. #ifdef HAL_SPDIFRX_MODULE_ENABLED
  121. #if defined(STM32F446xx)
  122. /* Private typedef -----------------------------------------------------------*/
  123. /* Private define ------------------------------------------------------------*/
  124. #define SPDIFRX_TIMEOUT_VALUE 0xFFFF
  125. /* Private macro -------------------------------------------------------------*/
  126. /* Private variables ---------------------------------------------------------*/
  127. /* Private function prototypes -----------------------------------------------*/
  128. /** @addtogroup SPDIFRX_Private_Functions
  129. * @{
  130. */
  131. static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
  132. static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
  133. static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
  134. static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
  135. static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
  136. static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
  137. static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
  138. static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
  139. /**
  140. * @}
  141. */
  142. /* Exported functions ---------------------------------------------------------*/
  143. /** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions
  144. * @{
  145. */
  146. /** @defgroup SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions
  147. * @brief Initialization and Configuration functions
  148. *
  149. @verbatim
  150. ===============================================================================
  151. ##### Initialization and de-initialization functions #####
  152. ===============================================================================
  153. [..] This subsection provides a set of functions allowing to initialize and
  154. de-initialize the SPDIFRX peripheral:
  155. (+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures
  156. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
  157. (+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with
  158. the selected configuration:
  159. (++) Input Selection (IN0, IN1,...)
  160. (++) Maximum allowed re-tries during synchronization phase
  161. (++) Wait for activity on SPDIF selected input
  162. (++) Channel status selection (from channel A or B)
  163. (++) Data format (LSB, MSB, ...)
  164. (++) Stereo mode
  165. (++) User bits masking (PT,C,U,V,...)
  166. (+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration
  167. of the selected SPDIFRXx peripheral.
  168. @endverbatim
  169. * @{
  170. */
  171. /**
  172. * @brief Initializes the SPDIFRX according to the specified parameters
  173. * in the SPDIFRX_InitTypeDef and create the associated handle.
  174. * @param hspdif SPDIFRX handle
  175. * @retval HAL status
  176. */
  177. HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
  178. {
  179. uint32_t tmpreg = 0U;
  180. /* Check the SPDIFRX handle allocation */
  181. if(hspdif == NULL)
  182. {
  183. return HAL_ERROR;
  184. }
  185. /* Check the SPDIFRX parameters */
  186. assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode));
  187. assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection));
  188. assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries));
  189. assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity));
  190. assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection));
  191. assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat));
  192. assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask));
  193. assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask));
  194. assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask));
  195. assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask));
  196. if(hspdif->State == HAL_SPDIFRX_STATE_RESET)
  197. {
  198. /* Allocate lock resource and initialize it */
  199. hspdif->Lock = HAL_UNLOCKED;
  200. /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
  201. HAL_SPDIFRX_MspInit(hspdif);
  202. }
  203. /* SPDIFRX peripheral state is BUSY*/
  204. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  205. /* Disable SPDIFRX interface (IDLE State) */
  206. __HAL_SPDIFRX_IDLE(hspdif);
  207. /* Reset the old SPDIFRX CR configuration */
  208. tmpreg = hspdif->Instance->CR;
  209. tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
  210. SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK |
  211. SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA |
  212. SPDIFRX_CR_INSEL);
  213. /* Sets the new configuration of the SPDIFRX peripheral */
  214. tmpreg |= ((uint16_t) hspdif->Init.StereoMode |
  215. hspdif->Init.InputSelection |
  216. hspdif->Init.Retries |
  217. hspdif->Init.WaitForActivity |
  218. hspdif->Init.ChannelSelection |
  219. hspdif->Init.DataFormat |
  220. hspdif->Init.PreambleTypeMask |
  221. hspdif->Init.ChannelStatusMask |
  222. hspdif->Init.ValidityBitMask |
  223. hspdif->Init.ParityErrorMask);
  224. hspdif->Instance->CR = tmpreg;
  225. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  226. /* SPDIFRX peripheral state is READY*/
  227. hspdif->State = HAL_SPDIFRX_STATE_READY;
  228. return HAL_OK;
  229. }
  230. /**
  231. * @brief DeInitializes the SPDIFRX peripheral
  232. * @param hspdif SPDIFRX handle
  233. * @retval HAL status
  234. */
  235. HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
  236. {
  237. /* Check the SPDIFRX handle allocation */
  238. if(hspdif == NULL)
  239. {
  240. return HAL_ERROR;
  241. }
  242. /* Check the parameters */
  243. assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance));
  244. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  245. /* Disable SPDIFRX interface (IDLE state) */
  246. __HAL_SPDIFRX_IDLE(hspdif);
  247. /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
  248. HAL_SPDIFRX_MspDeInit(hspdif);
  249. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  250. /* SPDIFRX peripheral state is RESET*/
  251. hspdif->State = HAL_SPDIFRX_STATE_RESET;
  252. /* Release Lock */
  253. __HAL_UNLOCK(hspdif);
  254. return HAL_OK;
  255. }
  256. /**
  257. * @brief SPDIFRX MSP Init
  258. * @param hspdif SPDIFRX handle
  259. * @retval None
  260. */
  261. __weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
  262. {
  263. /* Prevent unused argument(s) compilation warning */
  264. UNUSED(hspdif);
  265. /* NOTE : This function Should not be modified, when the callback is needed,
  266. the HAL_SPDIFRX_MspInit could be implemented in the user file
  267. */
  268. }
  269. /**
  270. * @brief SPDIFRX MSP DeInit
  271. * @param hspdif SPDIFRX handle
  272. * @retval None
  273. */
  274. __weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
  275. {
  276. /* Prevent unused argument(s) compilation warning */
  277. UNUSED(hspdif);
  278. /* NOTE : This function Should not be modified, when the callback is needed,
  279. the HAL_SPDIFRX_MspDeInit could be implemented in the user file
  280. */
  281. }
  282. /**
  283. * @brief Sets the SPDIFRX dtat format according to the specified parameters
  284. * in the SPDIFRX_InitTypeDef.
  285. * @param hspdif SPDIFRX handle
  286. * @param sDataFormat SPDIFRX data format
  287. * @retval HAL status
  288. */
  289. HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat)
  290. {
  291. uint32_t tmpreg = 0U;
  292. /* Check the SPDIFRX handle allocation */
  293. if(hspdif == NULL)
  294. {
  295. return HAL_ERROR;
  296. }
  297. /* Check the SPDIFRX parameters */
  298. assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
  299. assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat));
  300. assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask));
  301. assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask));
  302. assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask));
  303. assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask));
  304. /* Reset the old SPDIFRX CR configuration */
  305. tmpreg = hspdif->Instance->CR;
  306. if(((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
  307. (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) ||
  308. ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
  309. {
  310. return HAL_ERROR;
  311. }
  312. tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
  313. SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK);
  314. /* Sets the new configuration of the SPDIFRX peripheral */
  315. tmpreg |= ((uint16_t) sDataFormat.StereoMode |
  316. sDataFormat.DataFormat |
  317. sDataFormat.PreambleTypeMask |
  318. sDataFormat.ChannelStatusMask |
  319. sDataFormat.ValidityBitMask |
  320. sDataFormat.ParityErrorMask);
  321. hspdif->Instance->CR = tmpreg;
  322. return HAL_OK;
  323. }
  324. /**
  325. * @}
  326. */
  327. /** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions
  328. * @brief Data transfers functions
  329. *
  330. @verbatim
  331. ===============================================================================
  332. ##### IO operation functions #####
  333. ===============================================================================
  334. [..]
  335. This subsection provides a set of functions allowing to manage the SPDIFRX data
  336. transfers.
  337. (#) There is two mode of transfer:
  338. (++) Blocking mode : The communication is performed in the polling mode.
  339. The status of all data processing is returned by the same function
  340. after finishing transfer.
  341. (++) No-Blocking mode : The communication is performed using Interrupts
  342. or DMA. These functions return the status of the transfer start-up.
  343. The end of the data processing will be indicated through the
  344. dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when
  345. using DMA mode.
  346. (#) Blocking mode functions are :
  347. (++) HAL_SPDIFRX_ReceiveDataFlow()
  348. (++) HAL_SPDIFRX_ReceiveControlFlow()
  349. (+@) Do not use blocking mode to receive both control and data flow at the same time.
  350. (#) No-Blocking mode functions with Interrupt are :
  351. (++) HAL_SPDIFRX_ReceiveControlFlow_IT()
  352. (++) HAL_SPDIFRX_ReceiveDataFlow_IT()
  353. (#) No-Blocking mode functions with DMA are :
  354. (++) HAL_SPDIFRX_ReceiveControlFlow_DMA()
  355. (++) HAL_SPDIFRX_ReceiveDataFlow_DMA()
  356. (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
  357. (++) HAL_SPDIFRX_RxCpltCallback()
  358. (++) HAL_SPDIFRX_ErrorCallback()
  359. @endverbatim
  360. * @{
  361. */
  362. /**
  363. * @brief Receives an amount of data (Data Flow) in blocking mode.
  364. * @param hspdif pointer to SPDIFRX_HandleTypeDef structure that contains
  365. * the configuration information for SPDIFRX module.
  366. * @param pData Pointer to data buffer
  367. * @param Size Amount of data to be received
  368. * @param Timeout Timeout duration
  369. * @retval HAL status
  370. */
  371. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
  372. {
  373. if((pData == NULL ) || (Size == 0))
  374. {
  375. return HAL_ERROR;
  376. }
  377. if(hspdif->State == HAL_SPDIFRX_STATE_READY)
  378. {
  379. /* Process Locked */
  380. __HAL_LOCK(hspdif);
  381. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  382. /* Start synchronisation */
  383. __HAL_SPDIFRX_SYNC(hspdif);
  384. /* Wait until SYNCD flag is set */
  385. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
  386. {
  387. return HAL_TIMEOUT;
  388. }
  389. /* Start reception */
  390. __HAL_SPDIFRX_RCV(hspdif);
  391. /* Receive data flow */
  392. while(Size > 0)
  393. {
  394. /* Wait until RXNE flag is set */
  395. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout) != HAL_OK)
  396. {
  397. return HAL_TIMEOUT;
  398. }
  399. (*pData++) = hspdif->Instance->DR;
  400. Size--;
  401. }
  402. /* SPDIFRX ready */
  403. hspdif->State = HAL_SPDIFRX_STATE_READY;
  404. /* Process Unlocked */
  405. __HAL_UNLOCK(hspdif);
  406. return HAL_OK;
  407. }
  408. else
  409. {
  410. return HAL_BUSY;
  411. }
  412. }
  413. /**
  414. * @brief Receives an amount of data (Control Flow) in blocking mode.
  415. * @param hspdif pointer to a SPDIFRX_HandleTypeDef structure that contains
  416. * the configuration information for SPDIFRX module.
  417. * @param pData Pointer to data buffer
  418. * @param Size Amount of data to be received
  419. * @param Timeout Timeout duration
  420. * @retval HAL status
  421. */
  422. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
  423. {
  424. if((pData == NULL ) || (Size == 0))
  425. {
  426. return HAL_ERROR;
  427. }
  428. if(hspdif->State == HAL_SPDIFRX_STATE_READY)
  429. {
  430. /* Process Locked */
  431. __HAL_LOCK(hspdif);
  432. hspdif->State = HAL_SPDIFRX_STATE_BUSY;
  433. /* Start synchronization */
  434. __HAL_SPDIFRX_SYNC(hspdif);
  435. /* Wait until SYNCD flag is set */
  436. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
  437. {
  438. return HAL_TIMEOUT;
  439. }
  440. /* Start reception */
  441. __HAL_SPDIFRX_RCV(hspdif);
  442. /* Receive control flow */
  443. while(Size > 0)
  444. {
  445. /* Wait until CSRNE flag is set */
  446. if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout) != HAL_OK)
  447. {
  448. return HAL_TIMEOUT;
  449. }
  450. (*pData++) = hspdif->Instance->CSR;
  451. Size--;
  452. }
  453. /* SPDIFRX ready */
  454. hspdif->State = HAL_SPDIFRX_STATE_READY;
  455. /* Process Unlocked */
  456. __HAL_UNLOCK(hspdif);
  457. return HAL_OK;
  458. }
  459. else
  460. {
  461. return HAL_BUSY;
  462. }
  463. }
  464. /**
  465. * @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt
  466. * @param hspdif SPDIFRX handle
  467. * @param pData a 32-bit pointer to the Receive data buffer.
  468. * @param Size number of data sample to be received .
  469. * @retval HAL status
  470. */
  471. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  472. {
  473. __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
  474. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
  475. {
  476. if((pData == NULL) || (Size == 0))
  477. {
  478. return HAL_ERROR;
  479. }
  480. /* Process Locked */
  481. __HAL_LOCK(hspdif);
  482. hspdif->pRxBuffPtr = pData;
  483. hspdif->RxXferSize = Size;
  484. hspdif->RxXferCount = Size;
  485. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  486. /* Check if a receive process is ongoing or not */
  487. hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
  488. /* Enable the SPDIFRX PE Error Interrupt */
  489. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  490. /* Enable the SPDIFRX OVR Error Interrupt */
  491. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  492. /* Process Unlocked */
  493. __HAL_UNLOCK(hspdif);
  494. /* Enable the SPDIFRX RXNE interrupt */
  495. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  496. if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
  497. {
  498. /* Start synchronization */
  499. __HAL_SPDIFRX_SYNC(hspdif);
  500. /* Wait until SYNCD flag is set */
  501. do
  502. {
  503. if (count-- == 0U)
  504. {
  505. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  506. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  507. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  508. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  509. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  510. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  511. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  512. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  513. hspdif->State= HAL_SPDIFRX_STATE_READY;
  514. /* Process Unlocked */
  515. __HAL_UNLOCK(hspdif);
  516. return HAL_TIMEOUT;
  517. }
  518. }
  519. while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
  520. /* Start reception */
  521. __HAL_SPDIFRX_RCV(hspdif);
  522. }
  523. return HAL_OK;
  524. }
  525. else
  526. {
  527. return HAL_BUSY;
  528. }
  529. }
  530. /**
  531. * @brief Receive an amount of data (Control Flow) with Interrupt
  532. * @param hspdif SPDIFRX handle
  533. * @param pData a 32-bit pointer to the Receive data buffer.
  534. * @param Size number of data sample (Control Flow) to be received :
  535. * @retval HAL status
  536. */
  537. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  538. {
  539. __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
  540. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
  541. {
  542. if((pData == NULL ) || (Size == 0))
  543. {
  544. return HAL_ERROR;
  545. }
  546. /* Process Locked */
  547. __HAL_LOCK(hspdif);
  548. hspdif->pCsBuffPtr = pData;
  549. hspdif->CsXferSize = Size;
  550. hspdif->CsXferCount = Size;
  551. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  552. /* Check if a receive process is ongoing or not */
  553. hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
  554. /* Enable the SPDIFRX PE Error Interrupt */
  555. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  556. /* Enable the SPDIFRX OVR Error Interrupt */
  557. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  558. /* Process Unlocked */
  559. __HAL_UNLOCK(hspdif);
  560. /* Enable the SPDIFRX CSRNE interrupt */
  561. __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  562. if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
  563. {
  564. /* Start synchronization */
  565. __HAL_SPDIFRX_SYNC(hspdif);
  566. /* Wait until SYNCD flag is set */
  567. do
  568. {
  569. if (count-- == 0U)
  570. {
  571. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  572. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  573. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  574. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  575. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  576. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  577. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  578. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  579. hspdif->State= HAL_SPDIFRX_STATE_READY;
  580. /* Process Unlocked */
  581. __HAL_UNLOCK(hspdif);
  582. return HAL_TIMEOUT;
  583. }
  584. }
  585. while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
  586. /* Start reception */
  587. __HAL_SPDIFRX_RCV(hspdif);
  588. }
  589. return HAL_OK;
  590. }
  591. else
  592. {
  593. return HAL_BUSY;
  594. }
  595. }
  596. /**
  597. * @brief Receive an amount of data (Data Flow) mode with DMA
  598. * @param hspdif SPDIFRX handle
  599. * @param pData a 32-bit pointer to the Receive data buffer.
  600. * @param Size number of data sample to be received :
  601. * @retval HAL status
  602. */
  603. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  604. {
  605. __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
  606. if((pData == NULL) || (Size == 0))
  607. {
  608. return HAL_ERROR;
  609. }
  610. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
  611. {
  612. hspdif->pRxBuffPtr = pData;
  613. hspdif->RxXferSize = Size;
  614. hspdif->RxXferCount = Size;
  615. /* Process Locked */
  616. __HAL_LOCK(hspdif);
  617. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  618. hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
  619. /* Set the SPDIFRX Rx DMA Half transfer complete callback */
  620. hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
  621. /* Set the SPDIFRX Rx DMA transfer complete callback */
  622. hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
  623. /* Set the DMA error callback */
  624. hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
  625. /* Enable the DMA request */
  626. HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size);
  627. /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
  628. hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN;
  629. if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
  630. {
  631. /* Start synchronization */
  632. __HAL_SPDIFRX_SYNC(hspdif);
  633. /* Wait until SYNCD flag is set */
  634. do
  635. {
  636. if (count-- == 0U)
  637. {
  638. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  639. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  640. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  641. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  642. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  643. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  644. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  645. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  646. hspdif->State= HAL_SPDIFRX_STATE_READY;
  647. /* Process Unlocked */
  648. __HAL_UNLOCK(hspdif);
  649. return HAL_TIMEOUT;
  650. }
  651. }
  652. while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
  653. /* Start reception */
  654. __HAL_SPDIFRX_RCV(hspdif);
  655. }
  656. /* Process Unlocked */
  657. __HAL_UNLOCK(hspdif);
  658. return HAL_OK;
  659. }
  660. else
  661. {
  662. return HAL_BUSY;
  663. }
  664. }
  665. /**
  666. * @brief Receive an amount of data (Control Flow) with DMA
  667. * @param hspdif SPDIFRX handle
  668. * @param pData a 32-bit pointer to the Receive data buffer.
  669. * @param Size number of data (Control Flow) sample to be received :
  670. * @retval HAL status
  671. */
  672. HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
  673. {
  674. __IO uint32_t count = SPDIFRX_TIMEOUT_VALUE * (SystemCoreClock / 24U / 1000U);
  675. if((pData == NULL) || (Size == 0))
  676. {
  677. return HAL_ERROR;
  678. }
  679. if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
  680. {
  681. hspdif->pCsBuffPtr = pData;
  682. hspdif->CsXferSize = Size;
  683. hspdif->CsXferCount = Size;
  684. /* Process Locked */
  685. __HAL_LOCK(hspdif);
  686. hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
  687. hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
  688. /* Set the SPDIFRX Rx DMA Half transfer complete callback */
  689. hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
  690. /* Set the SPDIFRX Rx DMA transfer complete callback */
  691. hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
  692. /* Set the DMA error callback */
  693. hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
  694. /* Enable the DMA request */
  695. HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size);
  696. /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
  697. hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN;
  698. if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00U)
  699. {
  700. /* Start synchronization */
  701. __HAL_SPDIFRX_SYNC(hspdif);
  702. /* Wait until SYNCD flag is set */
  703. do
  704. {
  705. if (count-- == 0U)
  706. {
  707. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  708. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  709. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  710. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  711. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  712. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  713. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  714. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  715. hspdif->State= HAL_SPDIFRX_STATE_READY;
  716. /* Process Unlocked */
  717. __HAL_UNLOCK(hspdif);
  718. return HAL_TIMEOUT;
  719. }
  720. }
  721. while (__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_SYNCD) == RESET);
  722. /* Start reception */
  723. __HAL_SPDIFRX_RCV(hspdif);
  724. }
  725. /* Process Unlocked */
  726. __HAL_UNLOCK(hspdif);
  727. return HAL_OK;
  728. }
  729. else
  730. {
  731. return HAL_BUSY;
  732. }
  733. }
  734. /**
  735. * @brief stop the audio stream receive from the Media.
  736. * @param hspdif SPDIFRX handle
  737. * @retval None
  738. */
  739. HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
  740. {
  741. /* Process Locked */
  742. __HAL_LOCK(hspdif);
  743. /* Disable the SPDIFRX DMA requests */
  744. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
  745. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
  746. /* Disable the SPDIFRX DMA channel */
  747. __HAL_DMA_DISABLE(hspdif->hdmaDrRx);
  748. __HAL_DMA_DISABLE(hspdif->hdmaCsRx);
  749. /* Disable SPDIFRX peripheral */
  750. __HAL_SPDIFRX_IDLE(hspdif);
  751. hspdif->State = HAL_SPDIFRX_STATE_READY;
  752. /* Process Unlocked */
  753. __HAL_UNLOCK(hspdif);
  754. return HAL_OK;
  755. }
  756. /**
  757. * @brief This function handles SPDIFRX interrupt request.
  758. * @param hspdif SPDIFRX handle
  759. * @retval HAL status
  760. */
  761. void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
  762. {
  763. /* SPDIFRX in mode Data Flow Reception ------------------------------------------------*/
  764. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_RXNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_RXNE) != RESET))
  765. {
  766. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE);
  767. SPDIFRX_ReceiveDataFlow_IT(hspdif);
  768. }
  769. /* SPDIFRX in mode Control Flow Reception ------------------------------------------------*/
  770. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_CSRNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_CSRNE) != RESET))
  771. {
  772. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE);
  773. SPDIFRX_ReceiveControlFlow_IT(hspdif);
  774. }
  775. /* SPDIFRX Overrun error interrupt occurred ---------------------------------*/
  776. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_OVR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_OVRIE) != RESET))
  777. {
  778. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_OVR);
  779. /* Change the SPDIFRX error code */
  780. hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR;
  781. /* the transfer is not stopped */
  782. HAL_SPDIFRX_ErrorCallback(hspdif);
  783. }
  784. /* SPDIFRX Parity error interrupt occurred ---------------------------------*/
  785. if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_PERR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_PERRIE) != RESET))
  786. {
  787. __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_PERR);
  788. /* Change the SPDIFRX error code */
  789. hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE;
  790. /* the transfer is not stopped */
  791. HAL_SPDIFRX_ErrorCallback(hspdif);
  792. }
  793. }
  794. /**
  795. * @brief Rx Transfer (Data flow) half completed callbacks
  796. * @param hspdif SPDIFRX handle
  797. * @retval None
  798. */
  799. __weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  800. {
  801. /* Prevent unused argument(s) compilation warning */
  802. UNUSED(hspdif);
  803. /* NOTE : This function Should not be modified, when the callback is needed,
  804. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  805. */
  806. }
  807. /**
  808. * @brief Rx Transfer (Data flow) completed callbacks
  809. * @param hspdif SPDIFRX handle
  810. * @retval None
  811. */
  812. __weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  813. {
  814. /* Prevent unused argument(s) compilation warning */
  815. UNUSED(hspdif);
  816. /* NOTE : This function Should not be modified, when the callback is needed,
  817. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  818. */
  819. }
  820. /**
  821. * @brief Rx (Control flow) Transfer half completed callbacks
  822. * @param hspdif SPDIFRX handle
  823. * @retval None
  824. */
  825. __weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  826. {
  827. /* Prevent unused argument(s) compilation warning */
  828. UNUSED(hspdif);
  829. /* NOTE : This function Should not be modified, when the callback is needed,
  830. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  831. */
  832. }
  833. /**
  834. * @brief Rx Transfer (Control flow) completed callbacks
  835. * @param hspdif SPDIFRX handle
  836. * @retval None
  837. */
  838. __weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
  839. {
  840. /* Prevent unused argument(s) compilation warning */
  841. UNUSED(hspdif);
  842. /* NOTE : This function Should not be modified, when the callback is needed,
  843. the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
  844. */
  845. }
  846. /**
  847. * @brief SPDIFRX error callbacks
  848. * @param hspdif SPDIFRX handle
  849. * @retval None
  850. */
  851. __weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
  852. {
  853. /* Prevent unused argument(s) compilation warning */
  854. UNUSED(hspdif);
  855. /* NOTE : This function Should not be modified, when the callback is needed,
  856. the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
  857. */
  858. }
  859. /**
  860. * @}
  861. */
  862. /** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions
  863. * @brief Peripheral State functions
  864. *
  865. @verbatim
  866. ===============================================================================
  867. ##### Peripheral State and Errors functions #####
  868. ===============================================================================
  869. [..]
  870. This subsection permit to get in run-time the status of the peripheral
  871. and the data flow.
  872. @endverbatim
  873. * @{
  874. */
  875. /**
  876. * @brief Return the SPDIFRX state
  877. * @param hspdif SPDIFRX handle
  878. * @retval HAL state
  879. */
  880. HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif)
  881. {
  882. return hspdif->State;
  883. }
  884. /**
  885. * @brief Return the SPDIFRX error code
  886. * @param hspdif SPDIFRX handle
  887. * @retval SPDIFRX Error Code
  888. */
  889. uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif)
  890. {
  891. return hspdif->ErrorCode;
  892. }
  893. /**
  894. * @}
  895. */
  896. /**
  897. * @brief DMA SPDIFRX receive process (Data flow) complete callback
  898. * @param hdma DMA handle
  899. * @retval None
  900. */
  901. static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
  902. {
  903. SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  904. /* Disable Rx DMA Request */
  905. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
  906. hspdif->RxXferCount = 0U;
  907. hspdif->State = HAL_SPDIFRX_STATE_READY;
  908. HAL_SPDIFRX_RxCpltCallback(hspdif);
  909. }
  910. /**
  911. * @brief DMA SPDIFRX receive process (Data flow) half complete callback
  912. * @param hdma DMA handle
  913. * @retval None
  914. */
  915. static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
  916. {
  917. SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  918. HAL_SPDIFRX_RxHalfCpltCallback(hspdif);
  919. }
  920. /**
  921. * @brief DMA SPDIFRX receive process (Control flow) complete callback
  922. * @param hdma DMA handle
  923. * @retval None
  924. */
  925. static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
  926. {
  927. SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  928. /* Disable Cb DMA Request */
  929. hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
  930. hspdif->CsXferCount = 0U;
  931. hspdif->State = HAL_SPDIFRX_STATE_READY;
  932. HAL_SPDIFRX_CxCpltCallback(hspdif);
  933. }
  934. /**
  935. * @brief DMA SPDIFRX receive process (Control flow) half complete callback
  936. * @param hdma DMA handle
  937. * @retval None
  938. */
  939. static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
  940. {
  941. SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  942. HAL_SPDIFRX_CxHalfCpltCallback(hspdif);
  943. }
  944. /**
  945. * @brief DMA SPDIFRX communication error callback
  946. * @param hdma DMA handle
  947. * @retval None
  948. */
  949. static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
  950. {
  951. SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  952. /* Disable Rx and Cb DMA Request */
  953. hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN));
  954. hspdif->RxXferCount = 0U;
  955. hspdif->State= HAL_SPDIFRX_STATE_READY;
  956. /* Set the error code and execute error callback*/
  957. hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA;
  958. HAL_SPDIFRX_ErrorCallback(hspdif);
  959. }
  960. /**
  961. * @brief Receive an amount of data (Data Flow) with Interrupt
  962. * @param hspdif SPDIFRX handle
  963. * @retval None
  964. */
  965. static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
  966. {
  967. /* Receive data */
  968. (*hspdif->pRxBuffPtr++) = hspdif->Instance->DR;
  969. hspdif->RxXferCount--;
  970. if(hspdif->RxXferCount == 0U)
  971. {
  972. /* Disable RXNE/PE and OVR interrupts */
  973. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE);
  974. hspdif->State = HAL_SPDIFRX_STATE_READY;
  975. /* Process Unlocked */
  976. __HAL_UNLOCK(hspdif);
  977. HAL_SPDIFRX_RxCpltCallback(hspdif);
  978. }
  979. }
  980. /**
  981. * @brief Receive an amount of data (Control Flow) with Interrupt
  982. * @param hspdif SPDIFRX handle
  983. * @retval None
  984. */
  985. static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
  986. {
  987. /* Receive data */
  988. (*hspdif->pCsBuffPtr++) = hspdif->Instance->CSR;
  989. hspdif->CsXferCount--;
  990. if(hspdif->CsXferCount == 0U)
  991. {
  992. /* Disable CSRNE interrupt */
  993. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  994. hspdif->State = HAL_SPDIFRX_STATE_READY;
  995. /* Process Unlocked */
  996. __HAL_UNLOCK(hspdif);
  997. HAL_SPDIFRX_CxCpltCallback(hspdif);
  998. }
  999. }
  1000. /**
  1001. * @brief This function handles SPDIFRX Communication Timeout.
  1002. * @param hspdif SPDIFRX handle
  1003. * @param Flag Flag checked
  1004. * @param Status Value of the flag expected
  1005. * @param Timeout Duration of the timeout
  1006. * @retval HAL status
  1007. */
  1008. static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
  1009. {
  1010. uint32_t tickstart = 0U;
  1011. /* Get tick */
  1012. tickstart = HAL_GetTick();
  1013. /* Wait until flag is set */
  1014. if(Status == RESET)
  1015. {
  1016. while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == RESET)
  1017. {
  1018. /* Check for the Timeout */
  1019. if(Timeout != HAL_MAX_DELAY)
  1020. {
  1021. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  1022. {
  1023. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  1024. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  1025. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  1026. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  1027. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  1028. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  1029. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  1030. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  1031. hspdif->State= HAL_SPDIFRX_STATE_READY;
  1032. /* Process Unlocked */
  1033. __HAL_UNLOCK(hspdif);
  1034. return HAL_TIMEOUT;
  1035. }
  1036. }
  1037. }
  1038. }
  1039. else
  1040. {
  1041. while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) != RESET)
  1042. {
  1043. /* Check for the Timeout */
  1044. if(Timeout != HAL_MAX_DELAY)
  1045. {
  1046. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  1047. {
  1048. /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
  1049. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
  1050. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
  1051. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
  1052. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
  1053. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
  1054. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
  1055. __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
  1056. hspdif->State= HAL_SPDIFRX_STATE_READY;
  1057. /* Process Unlocked */
  1058. __HAL_UNLOCK(hspdif);
  1059. return HAL_TIMEOUT;
  1060. }
  1061. }
  1062. }
  1063. }
  1064. return HAL_OK;
  1065. }
  1066. /**
  1067. * @}
  1068. */
  1069. #endif /* STM32F446xx */
  1070. #endif /* HAL_SPDIFRX_MODULE_ENABLED */
  1071. /**
  1072. * @}
  1073. */
  1074. /**
  1075. * @}
  1076. */
  1077. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/