stm32f4xx_hal_hash.c 60 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_hash.c
  4. * @author MCD Application Team
  5. * @brief HASH HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the HASH peripheral:
  8. * + Initialization and de-initialization functions
  9. * + HASH/HMAC Processing functions by algorithm using polling mode
  10. * + HASH/HMAC functions by algorithm using interrupt mode
  11. * + HASH/HMAC functions by algorithm using DMA mode
  12. * + Peripheral State functions
  13. *
  14. @verbatim
  15. ==============================================================================
  16. ##### How to use this driver #####
  17. ==============================================================================
  18. [..]
  19. The HASH HAL driver can be used as follows:
  20. (#)Initialize the HASH low level resources by implementing the HAL_HASH_MspInit():
  21. (##) Enable the HASH interface clock using __HAL_RCC_HASH_CLK_ENABLE()
  22. (##) In case of using processing APIs based on interrupts (e.g. HAL_HMAC_SHA1_Start_IT())
  23. (+++) Configure the HASH interrupt priority using HAL_NVIC_SetPriority()
  24. (+++) Enable the HASH IRQ handler using HAL_NVIC_EnableIRQ()
  25. (+++) In HASH IRQ handler, call HAL_HASH_IRQHandler()
  26. (##) In case of using DMA to control data transfer (e.g. HAL_HMAC_SHA1_Start_DMA())
  27. (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
  28. (+++) Configure and enable one DMA stream one for managing data transfer from
  29. memory to peripheral (input stream). Managing data transfer from
  30. peripheral to memory can be performed only using CPU
  31. (+++) Associate the initialized DMA handle to the HASH DMA handle
  32. using __HAL_LINKDMA()
  33. (+++) Configure the priority and enable the NVIC for the transfer complete
  34. interrupt on the DMA Stream using HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
  35. (#)Initialize the HASH HAL using HAL_HASH_Init(). This function configures mainly:
  36. (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit.
  37. (##) For HMAC, the encryption key.
  38. (##) For HMAC, the key size used for encryption.
  39. (#)Three processing functions are available:
  40. (##) Polling mode: processing APIs are blocking functions
  41. i.e. they process the data and wait till the digest computation is finished
  42. e.g. HAL_HASH_SHA1_Start()
  43. (##) Interrupt mode: encryption and decryption APIs are not blocking functions
  44. i.e. they process the data under interrupt
  45. e.g. HAL_HASH_SHA1_Start_IT()
  46. (##) DMA mode: processing APIs are not blocking functions and the CPU is
  47. not used for data transfer i.e. the data transfer is ensured by DMA
  48. e.g. HAL_HASH_SHA1_Start_DMA()
  49. (#)When the processing function is called at first time after HAL_HASH_Init()
  50. the HASH peripheral is initialized and processes the buffer in input.
  51. After that, the digest computation is started.
  52. When processing multi-buffer use the accumulate function to write the
  53. data in the peripheral without starting the digest computation. In last
  54. buffer use the start function to input the last buffer ans start the digest
  55. computation.
  56. (##) e.g. HAL_HASH_SHA1_Accumulate() : write 1st data buffer in the peripheral without starting the digest computation
  57. (##) write (n-1)th data buffer in the peripheral without starting the digest computation
  58. (##) HAL_HASH_SHA1_Start() : write (n)th data buffer in the peripheral and start the digest computation
  59. (#)In HMAC mode, there is no Accumulate API. Only Start API is available.
  60. (#)In case of using DMA, call the DMA start processing e.g. HAL_HASH_SHA1_Start_DMA().
  61. After that, call the finish function in order to get the digest value
  62. e.g. HAL_HASH_SHA1_Finish()
  63. (#)Call HAL_HASH_DeInit() to deinitialize the HASH peripheral.
  64. @endverbatim
  65. ******************************************************************************
  66. * @attention
  67. *
  68. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  69. *
  70. * Redistribution and use in source and binary forms, with or without modification,
  71. * are permitted provided that the following conditions are met:
  72. * 1. Redistributions of source code must retain the above copyright notice,
  73. * this list of conditions and the following disclaimer.
  74. * 2. Redistributions in binary form must reproduce the above copyright notice,
  75. * this list of conditions and the following disclaimer in the documentation
  76. * and/or other materials provided with the distribution.
  77. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  78. * may be used to endorse or promote products derived from this software
  79. * without specific prior written permission.
  80. *
  81. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  82. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  83. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  84. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  85. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  86. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  87. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  88. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  89. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  90. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  91. *
  92. ******************************************************************************
  93. */
  94. /* Includes ------------------------------------------------------------------*/
  95. #include "stm32f4xx_hal.h"
  96. /** @addtogroup STM32F4xx_HAL_Driver
  97. * @{
  98. */
  99. /** @defgroup HASH HASH
  100. * @brief HASH HAL module driver.
  101. * @{
  102. */
  103. #ifdef HAL_HASH_MODULE_ENABLED
  104. #if defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F437xx) || defined(STM32F439xx) || defined(STM32F479xx)
  105. /* Private typedef -----------------------------------------------------------*/
  106. /* Private define ------------------------------------------------------------*/
  107. /* Private macro -------------------------------------------------------------*/
  108. /* Private variables ---------------------------------------------------------*/
  109. /* Private function prototypes -----------------------------------------------*/
  110. /** @defgroup HASH_Private_Functions HASH Private Functions
  111. * @{
  112. */
  113. static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma);
  114. static void HASH_DMAError(DMA_HandleTypeDef *hdma);
  115. static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size);
  116. static void HASH_WriteData(uint8_t *pInBuffer, uint32_t Size);
  117. /**
  118. * @}
  119. */
  120. /* Private functions ---------------------------------------------------------*/
  121. /** @addtogroup HASH_Private_Functions
  122. * @{
  123. */
  124. /**
  125. * @brief DMA HASH Input Data complete callback.
  126. * @param hdma DMA handle
  127. * @retval None
  128. */
  129. static void HASH_DMAXferCplt(DMA_HandleTypeDef *hdma)
  130. {
  131. HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  132. uint32_t inputaddr = 0U;
  133. uint32_t buffersize = 0U;
  134. if((HASH->CR & HASH_CR_MODE) != HASH_CR_MODE)
  135. {
  136. /* Disable the DMA transfer */
  137. HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
  138. /* Change HASH peripheral state */
  139. hhash->State = HAL_HASH_STATE_READY;
  140. /* Call Input data transfer complete callback */
  141. HAL_HASH_InCpltCallback(hhash);
  142. }
  143. else
  144. {
  145. /* Increment Interrupt counter */
  146. hhash->HashInCount++;
  147. /* Disable the DMA transfer before starting the next transfer */
  148. HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
  149. if(hhash->HashInCount <= 2U)
  150. {
  151. /* In case HashInCount = 1, set the DMA to transfer data to HASH DIN register */
  152. if(hhash->HashInCount == 1U)
  153. {
  154. inputaddr = (uint32_t)hhash->pHashInBuffPtr;
  155. buffersize = hhash->HashBuffSize;
  156. }
  157. /* In case HashInCount = 2, set the DMA to transfer key to HASH DIN register */
  158. else if(hhash->HashInCount == 2U)
  159. {
  160. inputaddr = (uint32_t)hhash->Init.pKey;
  161. buffersize = hhash->Init.KeySize;
  162. }
  163. /* Configure the number of valid bits in last word of the message */
  164. MODIFY_REG(HASH->STR, HASH_STR_NBLW, 8U * (buffersize % 4U));
  165. /* Set the HASH DMA transfer complete */
  166. hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
  167. /* Enable the DMA In DMA Stream */
  168. HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (buffersize%4U ? (buffersize+3U)/4U:buffersize/4U));
  169. /* Enable DMA requests */
  170. HASH->CR |= (HASH_CR_DMAE);
  171. }
  172. else
  173. {
  174. /* Disable the DMA transfer */
  175. HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
  176. /* Reset the InCount */
  177. hhash->HashInCount = 0U;
  178. /* Change HASH peripheral state */
  179. hhash->State = HAL_HASH_STATE_READY;
  180. /* Call Input data transfer complete callback */
  181. HAL_HASH_InCpltCallback(hhash);
  182. }
  183. }
  184. }
  185. /**
  186. * @brief DMA HASH communication error callback.
  187. * @param hdma DMA handle
  188. * @retval None
  189. */
  190. static void HASH_DMAError(DMA_HandleTypeDef *hdma)
  191. {
  192. HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  193. hhash->State= HAL_HASH_STATE_READY;
  194. HAL_HASH_ErrorCallback(hhash);
  195. }
  196. /**
  197. * @brief Writes the input buffer in data register.
  198. * @param pInBuffer Pointer to input buffer
  199. * @param Size The size of input buffer
  200. * @retval None
  201. */
  202. static void HASH_WriteData(uint8_t *pInBuffer, uint32_t Size)
  203. {
  204. uint32_t buffercounter;
  205. uint32_t inputaddr = (uint32_t) pInBuffer;
  206. for(buffercounter = 0U; buffercounter < Size; buffercounter+=4)
  207. {
  208. HASH->DIN = *(uint32_t*)inputaddr;
  209. inputaddr+=4U;
  210. }
  211. }
  212. /**
  213. * @brief Provides the message digest result.
  214. * @param pMsgDigest Pointer to the message digest
  215. * @param Size The size of the message digest in bytes
  216. * @retval None
  217. */
  218. static void HASH_GetDigest(uint8_t *pMsgDigest, uint8_t Size)
  219. {
  220. uint32_t msgdigest = (uint32_t)pMsgDigest;
  221. switch(Size)
  222. {
  223. case 16U:
  224. /* Read the message digest */
  225. *(uint32_t*)(msgdigest) = __REV(HASH->HR[0U]);
  226. msgdigest+=4U;
  227. *(uint32_t*)(msgdigest) = __REV(HASH->HR[1U]);
  228. msgdigest+=4U;
  229. *(uint32_t*)(msgdigest) = __REV(HASH->HR[2U]);
  230. msgdigest+=4U;
  231. *(uint32_t*)(msgdigest) = __REV(HASH->HR[3U]);
  232. break;
  233. case 20U:
  234. /* Read the message digest */
  235. *(uint32_t*)(msgdigest) = __REV(HASH->HR[0U]);
  236. msgdigest+=4U;
  237. *(uint32_t*)(msgdigest) = __REV(HASH->HR[1U]);
  238. msgdigest+=4U;
  239. *(uint32_t*)(msgdigest) = __REV(HASH->HR[2U]);
  240. msgdigest+=4U;
  241. *(uint32_t*)(msgdigest) = __REV(HASH->HR[3U]);
  242. msgdigest+=4U;
  243. *(uint32_t*)(msgdigest) = __REV(HASH->HR[4U]);
  244. break;
  245. case 28U:
  246. /* Read the message digest */
  247. *(uint32_t*)(msgdigest) = __REV(HASH->HR[0U]);
  248. msgdigest+=4U;
  249. *(uint32_t*)(msgdigest) = __REV(HASH->HR[1U]);
  250. msgdigest+=4U;
  251. *(uint32_t*)(msgdigest) = __REV(HASH->HR[2U]);
  252. msgdigest+=4U;
  253. *(uint32_t*)(msgdigest) = __REV(HASH->HR[3U]);
  254. msgdigest+=4U;
  255. *(uint32_t*)(msgdigest) = __REV(HASH->HR[4U]);
  256. msgdigest+=4U;
  257. *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[5U]);
  258. msgdigest+=4U;
  259. *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[6U]);
  260. break;
  261. case 32U:
  262. /* Read the message digest */
  263. *(uint32_t*)(msgdigest) = __REV(HASH->HR[0U]);
  264. msgdigest+=4U;
  265. *(uint32_t*)(msgdigest) = __REV(HASH->HR[1U]);
  266. msgdigest+=4U;
  267. *(uint32_t*)(msgdigest) = __REV(HASH->HR[2U]);
  268. msgdigest+=4U;
  269. *(uint32_t*)(msgdigest) = __REV(HASH->HR[3U]);
  270. msgdigest+=4U;
  271. *(uint32_t*)(msgdigest) = __REV(HASH->HR[4U]);
  272. msgdigest+=4U;
  273. *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[5U]);
  274. msgdigest+=4U;
  275. *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[6U]);
  276. msgdigest+=4U;
  277. *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[7U]);
  278. break;
  279. default:
  280. break;
  281. }
  282. }
  283. /**
  284. * @}
  285. */
  286. /* Exported functions --------------------------------------------------------*/
  287. /** @addtogroup HASH_Exported_Functions
  288. * @{
  289. */
  290. /** @addtogroup HASH_Exported_Functions_Group1 Initialization and de-initialization functions
  291. * @brief Initialization and Configuration functions.
  292. *
  293. @verbatim
  294. ===============================================================================
  295. ##### Initialization and de-initialization functions #####
  296. ===============================================================================
  297. [..] This section provides functions allowing to:
  298. (+) Initialize the HASH according to the specified parameters
  299. in the HASH_InitTypeDef and creates the associated handle.
  300. (+) DeInitialize the HASH peripheral.
  301. (+) Initialize the HASH MSP.
  302. (+) DeInitialize HASH MSP.
  303. @endverbatim
  304. * @{
  305. */
  306. /**
  307. * @brief Initializes the HASH according to the specified parameters in the
  308. HASH_HandleTypeDef and creates the associated handle.
  309. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  310. * the configuration information for HASH module
  311. * @retval HAL status
  312. */
  313. HAL_StatusTypeDef HAL_HASH_Init(HASH_HandleTypeDef *hhash)
  314. {
  315. /* Check the hash handle allocation */
  316. if(hhash == NULL)
  317. {
  318. return HAL_ERROR;
  319. }
  320. /* Check the parameters */
  321. assert_param(IS_HASH_DATATYPE(hhash->Init.DataType));
  322. if(hhash->State == HAL_HASH_STATE_RESET)
  323. {
  324. /* Allocate lock resource and initialize it */
  325. hhash->Lock = HAL_UNLOCKED;
  326. /* Init the low level hardware */
  327. HAL_HASH_MspInit(hhash);
  328. }
  329. /* Change the HASH state */
  330. hhash->State = HAL_HASH_STATE_BUSY;
  331. /* Reset HashInCount, HashBuffSize and HashITCounter */
  332. hhash->HashInCount = 0U;
  333. hhash->HashBuffSize = 0U;
  334. hhash->HashITCounter = 0U;
  335. /* Set the data type */
  336. HASH->CR |= (uint32_t) (hhash->Init.DataType);
  337. /* Change the HASH state */
  338. hhash->State = HAL_HASH_STATE_READY;
  339. /* Set the default HASH phase */
  340. hhash->Phase = HAL_HASH_PHASE_READY;
  341. /* Return function status */
  342. return HAL_OK;
  343. }
  344. /**
  345. * @brief DeInitializes the HASH peripheral.
  346. * @note This API must be called before starting a new processing.
  347. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  348. * the configuration information for HASH module
  349. * @retval HAL status
  350. */
  351. HAL_StatusTypeDef HAL_HASH_DeInit(HASH_HandleTypeDef *hhash)
  352. {
  353. /* Check the HASH handle allocation */
  354. if(hhash == NULL)
  355. {
  356. return HAL_ERROR;
  357. }
  358. /* Change the HASH state */
  359. hhash->State = HAL_HASH_STATE_BUSY;
  360. /* Set the default HASH phase */
  361. hhash->Phase = HAL_HASH_PHASE_READY;
  362. /* Reset HashInCount, HashBuffSize and HashITCounter */
  363. hhash->HashInCount = 0U;
  364. hhash->HashBuffSize = 0U;
  365. hhash->HashITCounter = 0U;
  366. /* DeInit the low level hardware */
  367. HAL_HASH_MspDeInit(hhash);
  368. /* Change the HASH state */
  369. hhash->State = HAL_HASH_STATE_RESET;
  370. /* Release Lock */
  371. __HAL_UNLOCK(hhash);
  372. /* Return function status */
  373. return HAL_OK;
  374. }
  375. /**
  376. * @brief Initializes the HASH MSP.
  377. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  378. * the configuration information for HASH module
  379. * @retval None
  380. */
  381. __weak void HAL_HASH_MspInit(HASH_HandleTypeDef *hhash)
  382. {
  383. /* Prevent unused argument(s) compilation warning */
  384. UNUSED(hhash);
  385. /* NOTE: This function Should not be modified, when the callback is needed,
  386. the HAL_HASH_MspInit could be implemented in the user file
  387. */
  388. }
  389. /**
  390. * @brief DeInitializes HASH MSP.
  391. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  392. * the configuration information for HASH module
  393. * @retval None
  394. */
  395. __weak void HAL_HASH_MspDeInit(HASH_HandleTypeDef *hhash)
  396. {
  397. /* Prevent unused argument(s) compilation warning */
  398. UNUSED(hhash);
  399. /* NOTE: This function Should not be modified, when the callback is needed,
  400. the HAL_HASH_MspDeInit could be implemented in the user file
  401. */
  402. }
  403. /**
  404. * @brief Input data transfer complete callback.
  405. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  406. * the configuration information for HASH module
  407. * @retval None
  408. */
  409. __weak void HAL_HASH_InCpltCallback(HASH_HandleTypeDef *hhash)
  410. {
  411. /* Prevent unused argument(s) compilation warning */
  412. UNUSED(hhash);
  413. /* NOTE: This function Should not be modified, when the callback is needed,
  414. the HAL_HASH_InCpltCallback could be implemented in the user file
  415. */
  416. }
  417. /**
  418. * @brief Data transfer Error callback.
  419. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  420. * the configuration information for HASH module
  421. * @retval None
  422. */
  423. __weak void HAL_HASH_ErrorCallback(HASH_HandleTypeDef *hhash)
  424. {
  425. /* Prevent unused argument(s) compilation warning */
  426. UNUSED(hhash);
  427. /* NOTE: This function Should not be modified, when the callback is needed,
  428. the HAL_HASH_ErrorCallback could be implemented in the user file
  429. */
  430. }
  431. /**
  432. * @brief Digest computation complete callback. It is used only with interrupt.
  433. * @note This callback is not relevant with DMA.
  434. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  435. * the configuration information for HASH module
  436. * @retval None
  437. */
  438. __weak void HAL_HASH_DgstCpltCallback(HASH_HandleTypeDef *hhash)
  439. {
  440. /* Prevent unused argument(s) compilation warning */
  441. UNUSED(hhash);
  442. /* NOTE: This function Should not be modified, when the callback is needed,
  443. the HAL_HASH_DgstCpltCallback could be implemented in the user file
  444. */
  445. }
  446. /**
  447. * @}
  448. */
  449. /** @defgroup HASH_Exported_Functions_Group2 HASH processing functions using polling mode
  450. * @brief processing functions using polling mode
  451. *
  452. @verbatim
  453. ===============================================================================
  454. ##### HASH processing using polling mode functions#####
  455. ===============================================================================
  456. [..] This section provides functions allowing to calculate in polling mode
  457. the hash value using one of the following algorithms:
  458. (+) MD5
  459. (+) SHA1
  460. @endverbatim
  461. * @{
  462. */
  463. /**
  464. * @brief Initializes the HASH peripheral in MD5 mode then processes pInBuffer.
  465. The digest is available in pOutBuffer.
  466. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  467. * the configuration information for HASH module
  468. * @param pInBuffer Pointer to the input buffer (buffer to be hashed).
  469. * @param Size Length of the input buffer in bytes.
  470. * If the Size is multiple of 64 bytes, appending the input buffer is possible.
  471. * If the Size is not multiple of 64 bytes, the padding is managed by hardware
  472. * and appending the input buffer is no more possible.
  473. * @param pOutBuffer Pointer to the computed digest. Its size must be 16 bytes.
  474. * @param Timeout Timeout value
  475. * @retval HAL status
  476. */
  477. HAL_StatusTypeDef HAL_HASH_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
  478. {
  479. uint32_t tickstart = 0U;
  480. /* Process Locked */
  481. __HAL_LOCK(hhash);
  482. /* Change the HASH state */
  483. hhash->State = HAL_HASH_STATE_BUSY;
  484. /* Check if initialization phase has already been performed */
  485. if(hhash->Phase == HAL_HASH_PHASE_READY)
  486. {
  487. /* Select the MD5 mode and reset the HASH processor core, so that the HASH will be ready to compute
  488. the message digest of a new message */
  489. HASH->CR |= HASH_ALGOSELECTION_MD5 | HASH_CR_INIT;
  490. }
  491. /* Set the phase */
  492. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  493. /* Configure the number of valid bits in last word of the message */
  494. __HAL_HASH_SET_NBVALIDBITS(Size);
  495. /* Write input buffer in data register */
  496. HASH_WriteData(pInBuffer, Size);
  497. /* Start the digest calculation */
  498. __HAL_HASH_START_DIGEST();
  499. /* Get tick */
  500. tickstart = HAL_GetTick();
  501. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  502. {
  503. /* Check for the Timeout */
  504. if(Timeout != HAL_MAX_DELAY)
  505. {
  506. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  507. {
  508. /* Change state */
  509. hhash->State = HAL_HASH_STATE_TIMEOUT;
  510. /* Process Unlocked */
  511. __HAL_UNLOCK(hhash);
  512. return HAL_TIMEOUT;
  513. }
  514. }
  515. }
  516. /* Read the message digest */
  517. HASH_GetDigest(pOutBuffer, 16U);
  518. /* Change the HASH state */
  519. hhash->State = HAL_HASH_STATE_READY;
  520. /* Process Unlocked */
  521. __HAL_UNLOCK(hhash);
  522. /* Return function status */
  523. return HAL_OK;
  524. }
  525. /**
  526. * @brief Initializes the HASH peripheral in MD5 mode then writes the pInBuffer.
  527. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  528. * the configuration information for HASH module
  529. * @param pInBuffer Pointer to the input buffer (buffer to be hashed).
  530. * @param Size Length of the input buffer in bytes.
  531. * If the Size is multiple of 64 bytes, appending the input buffer is possible.
  532. * If the Size is not multiple of 64 bytes, the padding is managed by hardware
  533. * and appending the input buffer is no more possible.
  534. * @retval HAL status
  535. */
  536. HAL_StatusTypeDef HAL_HASH_MD5_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
  537. {
  538. /* Process Locked */
  539. __HAL_LOCK(hhash);
  540. /* Change the HASH state */
  541. hhash->State = HAL_HASH_STATE_BUSY;
  542. /* Check if initialization phase has already been performed */
  543. if(hhash->Phase == HAL_HASH_PHASE_READY)
  544. {
  545. /* Select the MD5 mode and reset the HASH processor core, so that the HASH will be ready to compute
  546. the message digest of a new message */
  547. HASH->CR |= HASH_ALGOSELECTION_MD5 | HASH_CR_INIT;
  548. }
  549. /* Set the phase */
  550. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  551. /* Configure the number of valid bits in last word of the message */
  552. __HAL_HASH_SET_NBVALIDBITS(Size);
  553. /* Write input buffer in data register */
  554. HASH_WriteData(pInBuffer, Size);
  555. /* Change the HASH state */
  556. hhash->State = HAL_HASH_STATE_READY;
  557. /* Process Unlocked */
  558. __HAL_UNLOCK(hhash);
  559. /* Return function status */
  560. return HAL_OK;
  561. }
  562. /**
  563. * @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer.
  564. The digest is available in pOutBuffer.
  565. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  566. * the configuration information for HASH module
  567. * @param pInBuffer Pointer to the input buffer (buffer to be hashed).
  568. * @param Size Length of the input buffer in bytes.
  569. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  570. * @param pOutBuffer Pointer to the computed digest. Its size must be 20 bytes.
  571. * @param Timeout Timeout value
  572. * @retval HAL status
  573. */
  574. HAL_StatusTypeDef HAL_HASH_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
  575. {
  576. uint32_t tickstart = 0U;
  577. /* Process Locked */
  578. __HAL_LOCK(hhash);
  579. /* Change the HASH state */
  580. hhash->State = HAL_HASH_STATE_BUSY;
  581. /* Check if initialization phase has already been performed */
  582. if(hhash->Phase == HAL_HASH_PHASE_READY)
  583. {
  584. /* Select the SHA1 mode and reset the HASH processor core, so that the HASH will be ready to compute
  585. the message digest of a new message */
  586. HASH->CR |= HASH_ALGOSELECTION_SHA1 | HASH_CR_INIT;
  587. }
  588. /* Set the phase */
  589. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  590. /* Configure the number of valid bits in last word of the message */
  591. __HAL_HASH_SET_NBVALIDBITS(Size);
  592. /* Write input buffer in data register */
  593. HASH_WriteData(pInBuffer, Size);
  594. /* Start the digest calculation */
  595. __HAL_HASH_START_DIGEST();
  596. /* Get tick */
  597. tickstart = HAL_GetTick();
  598. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  599. {
  600. /* Check for the Timeout */
  601. if(Timeout != HAL_MAX_DELAY)
  602. {
  603. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  604. {
  605. /* Change state */
  606. hhash->State = HAL_HASH_STATE_TIMEOUT;
  607. /* Process Unlocked */
  608. __HAL_UNLOCK(hhash);
  609. return HAL_TIMEOUT;
  610. }
  611. }
  612. }
  613. /* Read the message digest */
  614. HASH_GetDigest(pOutBuffer, 20U);
  615. /* Change the HASH state */
  616. hhash->State = HAL_HASH_STATE_READY;
  617. /* Process Unlocked */
  618. __HAL_UNLOCK(hhash);
  619. /* Return function status */
  620. return HAL_OK;
  621. }
  622. /**
  623. * @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer.
  624. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  625. * the configuration information for HASH module
  626. * @param pInBuffer Pointer to the input buffer (buffer to be hashed).
  627. * @param Size Length of the input buffer in bytes.
  628. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  629. * @note Input buffer size in bytes must be a multiple of 4 otherwise the digest computation is corrupted.
  630. * @retval HAL status
  631. */
  632. HAL_StatusTypeDef HAL_HASH_SHA1_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
  633. {
  634. /* Check the parameters */
  635. assert_param(IS_HASH_SHA1_BUFFER_SIZE(Size));
  636. /* Process Locked */
  637. __HAL_LOCK(hhash);
  638. /* Change the HASH state */
  639. hhash->State = HAL_HASH_STATE_BUSY;
  640. /* Check if initialization phase has already been performed */
  641. if(hhash->Phase == HAL_HASH_PHASE_READY)
  642. {
  643. /* Select the SHA1 mode and reset the HASH processor core, so that the HASH will be ready to compute
  644. the message digest of a new message */
  645. HASH->CR |= HASH_ALGOSELECTION_SHA1 | HASH_CR_INIT;
  646. }
  647. /* Set the phase */
  648. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  649. /* Configure the number of valid bits in last word of the message */
  650. __HAL_HASH_SET_NBVALIDBITS(Size);
  651. /* Write input buffer in data register */
  652. HASH_WriteData(pInBuffer, Size);
  653. /* Change the HASH state */
  654. hhash->State = HAL_HASH_STATE_READY;
  655. /* Process Unlocked */
  656. __HAL_UNLOCK(hhash);
  657. /* Return function status */
  658. return HAL_OK;
  659. }
  660. /**
  661. * @}
  662. */
  663. /** @defgroup HASH_Exported_Functions_Group3 HASH processing functions using interrupt mode
  664. * @brief processing functions using interrupt mode.
  665. *
  666. @verbatim
  667. ===============================================================================
  668. ##### HASH processing using interrupt mode functions #####
  669. ===============================================================================
  670. [..] This section provides functions allowing to calculate in interrupt mode
  671. the hash value using one of the following algorithms:
  672. (+) MD5
  673. (+) SHA1
  674. @endverbatim
  675. * @{
  676. */
  677. /**
  678. * @brief Initializes the HASH peripheral in MD5 mode then processes pInBuffer.
  679. * The digest is available in pOutBuffer.
  680. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  681. * the configuration information for HASH module
  682. * @param pInBuffer Pointer to the input buffer (buffer to be hashed).
  683. * @param Size Length of the input buffer in bytes.
  684. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  685. * @param pOutBuffer Pointer to the computed digest. Its size must be 16 bytes.
  686. * @retval HAL status
  687. */
  688. HAL_StatusTypeDef HAL_HASH_MD5_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
  689. {
  690. uint32_t inputaddr;
  691. uint32_t outputaddr;
  692. uint32_t buffercounter;
  693. uint32_t inputcounter;
  694. /* Process Locked */
  695. __HAL_LOCK(hhash);
  696. if(hhash->State == HAL_HASH_STATE_READY)
  697. {
  698. /* Change the HASH state */
  699. hhash->State = HAL_HASH_STATE_BUSY;
  700. hhash->HashInCount = Size;
  701. hhash->pHashInBuffPtr = pInBuffer;
  702. hhash->pHashOutBuffPtr = pOutBuffer;
  703. /* Check if initialization phase has already been performed */
  704. if(hhash->Phase == HAL_HASH_PHASE_READY)
  705. {
  706. /* Select the SHA1 mode */
  707. HASH->CR |= HASH_ALGOSELECTION_MD5;
  708. /* Reset the HASH processor core, so that the HASH will be ready to compute
  709. the message digest of a new message */
  710. HASH->CR |= HASH_CR_INIT;
  711. }
  712. /* Reset interrupt counter */
  713. hhash->HashITCounter = 0U;
  714. /* Set the phase */
  715. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  716. /* Process Unlocked */
  717. __HAL_UNLOCK(hhash);
  718. /* Enable Interrupts */
  719. HASH->IMR = (HASH_IT_DINI | HASH_IT_DCI);
  720. /* Return function status */
  721. return HAL_OK;
  722. }
  723. if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS))
  724. {
  725. outputaddr = (uint32_t)hhash->pHashOutBuffPtr;
  726. /* Read the Output block from the Output FIFO */
  727. *(uint32_t*)(outputaddr) = __REV(HASH->HR[0U]);
  728. outputaddr+=4U;
  729. *(uint32_t*)(outputaddr) = __REV(HASH->HR[1U]);
  730. outputaddr+=4U;
  731. *(uint32_t*)(outputaddr) = __REV(HASH->HR[2U]);
  732. outputaddr+=4U;
  733. *(uint32_t*)(outputaddr) = __REV(HASH->HR[3U]);
  734. if(hhash->HashInCount == 0U)
  735. {
  736. /* Disable Interrupts */
  737. HASH->IMR = 0U;
  738. /* Change the HASH state */
  739. hhash->State = HAL_HASH_STATE_READY;
  740. /* Call digest computation complete callback */
  741. HAL_HASH_DgstCpltCallback(hhash);
  742. /* Process Unlocked */
  743. __HAL_UNLOCK(hhash);
  744. /* Return function status */
  745. return HAL_OK;
  746. }
  747. }
  748. if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
  749. {
  750. if(hhash->HashInCount >= 68U)
  751. {
  752. inputaddr = (uint32_t)hhash->pHashInBuffPtr;
  753. /* Write the Input block in the Data IN register */
  754. for(buffercounter = 0U; buffercounter < 64U; buffercounter+=4U)
  755. {
  756. HASH->DIN = *(uint32_t*)inputaddr;
  757. inputaddr+=4U;
  758. }
  759. if(hhash->HashITCounter == 0U)
  760. {
  761. HASH->DIN = *(uint32_t*)inputaddr;
  762. if(hhash->HashInCount >= 68U)
  763. {
  764. /* Decrement buffer counter */
  765. hhash->HashInCount -= 68U;
  766. hhash->pHashInBuffPtr+= 68U;
  767. }
  768. else
  769. {
  770. hhash->HashInCount = 0U;
  771. hhash->pHashInBuffPtr+= hhash->HashInCount;
  772. }
  773. /* Set Interrupt counter */
  774. hhash->HashITCounter = 1U;
  775. }
  776. else
  777. {
  778. /* Decrement buffer counter */
  779. hhash->HashInCount -= 64U;
  780. hhash->pHashInBuffPtr+= 64U;
  781. }
  782. }
  783. else
  784. {
  785. /* Get the buffer address */
  786. inputaddr = (uint32_t)hhash->pHashInBuffPtr;
  787. /* Get the buffer counter */
  788. inputcounter = hhash->HashInCount;
  789. /* Disable Interrupts */
  790. HASH->IMR &= ~(HASH_IT_DINI);
  791. /* Configure the number of valid bits in last word of the message */
  792. __HAL_HASH_SET_NBVALIDBITS(inputcounter);
  793. if((inputcounter > 4U) && (inputcounter%4U))
  794. {
  795. inputcounter = (inputcounter+4U-inputcounter%4U);
  796. }
  797. else if ((inputcounter < 4U) && (inputcounter != 0U))
  798. {
  799. inputcounter = 4U;
  800. }
  801. /* Write the Input block in the Data IN register */
  802. for(buffercounter = 0U; buffercounter < inputcounter/4U; buffercounter++)
  803. {
  804. HASH->DIN = *(uint32_t*)inputaddr;
  805. inputaddr+=4U;
  806. }
  807. /* Start the digest calculation */
  808. __HAL_HASH_START_DIGEST();
  809. /* Reset buffer counter */
  810. hhash->HashInCount = 0U;
  811. /* Call Input data transfer complete callback */
  812. HAL_HASH_InCpltCallback(hhash);
  813. }
  814. }
  815. /* Process Unlocked */
  816. __HAL_UNLOCK(hhash);
  817. /* Return function status */
  818. return HAL_OK;
  819. }
  820. /**
  821. * @brief Initializes the HASH peripheral in SHA1 mode then processes pInBuffer.
  822. * The digest is available in pOutBuffer.
  823. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  824. * the configuration information for HASH module
  825. * @param pInBuffer Pointer to the input buffer (buffer to be hashed).
  826. * @param Size Length of the input buffer in bytes.
  827. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  828. * @param pOutBuffer Pointer to the computed digest. Its size must be 20 bytes.
  829. * @retval HAL status
  830. */
  831. HAL_StatusTypeDef HAL_HASH_SHA1_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
  832. {
  833. uint32_t inputaddr;
  834. uint32_t outputaddr;
  835. uint32_t buffercounter;
  836. uint32_t inputcounter;
  837. /* Process Locked */
  838. __HAL_LOCK(hhash);
  839. if(hhash->State == HAL_HASH_STATE_READY)
  840. {
  841. /* Change the HASH state */
  842. hhash->State = HAL_HASH_STATE_BUSY;
  843. hhash->HashInCount = Size;
  844. hhash->pHashInBuffPtr = pInBuffer;
  845. hhash->pHashOutBuffPtr = pOutBuffer;
  846. /* Check if initialization phase has already been performed */
  847. if(hhash->Phase == HAL_HASH_PHASE_READY)
  848. {
  849. /* Select the SHA1 mode */
  850. HASH->CR |= HASH_ALGOSELECTION_SHA1;
  851. /* Reset the HASH processor core, so that the HASH will be ready to compute
  852. the message digest of a new message */
  853. HASH->CR |= HASH_CR_INIT;
  854. }
  855. /* Reset interrupt counter */
  856. hhash->HashITCounter = 0U;
  857. /* Set the phase */
  858. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  859. /* Process Unlocked */
  860. __HAL_UNLOCK(hhash);
  861. /* Enable Interrupts */
  862. HASH->IMR = (HASH_IT_DINI | HASH_IT_DCI);
  863. /* Return function status */
  864. return HAL_OK;
  865. }
  866. if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS))
  867. {
  868. outputaddr = (uint32_t)hhash->pHashOutBuffPtr;
  869. /* Read the Output block from the Output FIFO */
  870. *(uint32_t*)(outputaddr) = __REV(HASH->HR[0U]);
  871. outputaddr+=4U;
  872. *(uint32_t*)(outputaddr) = __REV(HASH->HR[1U]);
  873. outputaddr+=4U;
  874. *(uint32_t*)(outputaddr) = __REV(HASH->HR[2U]);
  875. outputaddr+=4U;
  876. *(uint32_t*)(outputaddr) = __REV(HASH->HR[3U]);
  877. outputaddr+=4U;
  878. *(uint32_t*)(outputaddr) = __REV(HASH->HR[4U]);
  879. if(hhash->HashInCount == 0U)
  880. {
  881. /* Disable Interrupts */
  882. HASH->IMR = 0U;
  883. /* Change the HASH state */
  884. hhash->State = HAL_HASH_STATE_READY;
  885. /* Call digest computation complete callback */
  886. HAL_HASH_DgstCpltCallback(hhash);
  887. /* Process Unlocked */
  888. __HAL_UNLOCK(hhash);
  889. /* Return function status */
  890. return HAL_OK;
  891. }
  892. }
  893. if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
  894. {
  895. if(hhash->HashInCount >= 68U)
  896. {
  897. inputaddr = (uint32_t)hhash->pHashInBuffPtr;
  898. /* Write the Input block in the Data IN register */
  899. for(buffercounter = 0U; buffercounter < 64U; buffercounter+=4U)
  900. {
  901. HASH->DIN = *(uint32_t*)inputaddr;
  902. inputaddr+=4U;
  903. }
  904. if(hhash->HashITCounter == 0U)
  905. {
  906. HASH->DIN = *(uint32_t*)inputaddr;
  907. if(hhash->HashInCount >= 68U)
  908. {
  909. /* Decrement buffer counter */
  910. hhash->HashInCount -= 68U;
  911. hhash->pHashInBuffPtr+= 68U;
  912. }
  913. else
  914. {
  915. hhash->HashInCount = 0U;
  916. hhash->pHashInBuffPtr+= hhash->HashInCount;
  917. }
  918. /* Set Interrupt counter */
  919. hhash->HashITCounter = 1U;
  920. }
  921. else
  922. {
  923. /* Decrement buffer counter */
  924. hhash->HashInCount -= 64U;
  925. hhash->pHashInBuffPtr+= 64U;
  926. }
  927. }
  928. else
  929. {
  930. /* Get the buffer address */
  931. inputaddr = (uint32_t)hhash->pHashInBuffPtr;
  932. /* Get the buffer counter */
  933. inputcounter = hhash->HashInCount;
  934. /* Disable Interrupts */
  935. HASH->IMR &= ~(HASH_IT_DINI);
  936. /* Configure the number of valid bits in last word of the message */
  937. __HAL_HASH_SET_NBVALIDBITS(inputcounter);
  938. if((inputcounter > 4U) && (inputcounter%4U))
  939. {
  940. inputcounter = (inputcounter+4U-inputcounter%4U);
  941. }
  942. else if ((inputcounter < 4U) && (inputcounter != 0U))
  943. {
  944. inputcounter = 4U;
  945. }
  946. /* Write the Input block in the Data IN register */
  947. for(buffercounter = 0U; buffercounter < inputcounter/4U; buffercounter++)
  948. {
  949. HASH->DIN = *(uint32_t*)inputaddr;
  950. inputaddr+=4U;
  951. }
  952. /* Start the digest calculation */
  953. __HAL_HASH_START_DIGEST();
  954. /* Reset buffer counter */
  955. hhash->HashInCount = 0U;
  956. /* Call Input data transfer complete callback */
  957. HAL_HASH_InCpltCallback(hhash);
  958. }
  959. }
  960. /* Process Unlocked */
  961. __HAL_UNLOCK(hhash);
  962. /* Return function status */
  963. return HAL_OK;
  964. }
  965. /**
  966. * @brief This function handles HASH interrupt request.
  967. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  968. * the configuration information for HASH module
  969. * @retval None
  970. */
  971. void HAL_HASH_IRQHandler(HASH_HandleTypeDef *hhash)
  972. {
  973. switch(HASH->CR & HASH_CR_ALGO)
  974. {
  975. case HASH_ALGOSELECTION_MD5:
  976. HAL_HASH_MD5_Start_IT(hhash, NULL, 0U, NULL);
  977. break;
  978. case HASH_ALGOSELECTION_SHA1:
  979. HAL_HASH_SHA1_Start_IT(hhash, NULL, 0U, NULL);
  980. break;
  981. default:
  982. break;
  983. }
  984. }
  985. /**
  986. * @}
  987. */
  988. /** @defgroup HASH_Exported_Functions_Group4 HASH processing functions using DMA mode
  989. * @brief processing functions using DMA mode.
  990. *
  991. @verbatim
  992. ===============================================================================
  993. ##### HASH processing using DMA mode functions #####
  994. ===============================================================================
  995. [..] This section provides functions allowing to calculate in DMA mode
  996. the hash value using one of the following algorithms:
  997. (+) MD5
  998. (+) SHA1
  999. @endverbatim
  1000. * @{
  1001. */
  1002. /**
  1003. * @brief Initializes the HASH peripheral in MD5 mode then enables DMA to
  1004. control data transfer. Use HAL_HASH_MD5_Finish() to get the digest.
  1005. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  1006. * the configuration information for HASH module
  1007. * @param pInBuffer Pointer to the input buffer (buffer to be hashed).
  1008. * @param Size Length of the input buffer in bytes.
  1009. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  1010. * @retval HAL status
  1011. */
  1012. HAL_StatusTypeDef HAL_HASH_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
  1013. {
  1014. uint32_t inputaddr = (uint32_t)pInBuffer;
  1015. /* Process Locked */
  1016. __HAL_LOCK(hhash);
  1017. /* Change the HASH state */
  1018. hhash->State = HAL_HASH_STATE_BUSY;
  1019. /* Check if initialization phase has already been performed */
  1020. if(hhash->Phase == HAL_HASH_PHASE_READY)
  1021. {
  1022. /* Select the MD5 mode and reset the HASH processor core, so that the HASH will be ready to compute
  1023. the message digest of a new message */
  1024. HASH->CR |= HASH_ALGOSELECTION_MD5 | HASH_CR_INIT;
  1025. }
  1026. /* Configure the number of valid bits in last word of the message */
  1027. __HAL_HASH_SET_NBVALIDBITS(Size);
  1028. /* Set the phase */
  1029. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  1030. /* Set the HASH DMA transfer complete callback */
  1031. hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
  1032. /* Set the DMA error callback */
  1033. hhash->hdmain->XferErrorCallback = HASH_DMAError;
  1034. /* Enable the DMA In DMA Stream */
  1035. HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4U ? (Size+3U)/4U:Size/4U));
  1036. /* Enable DMA requests */
  1037. HASH->CR |= (HASH_CR_DMAE);
  1038. /* Process Unlocked */
  1039. __HAL_UNLOCK(hhash);
  1040. /* Return function status */
  1041. return HAL_OK;
  1042. }
  1043. /**
  1044. * @brief Returns the computed digest in MD5 mode
  1045. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  1046. * the configuration information for HASH module
  1047. * @param pOutBuffer Pointer to the computed digest. Its size must be 16 bytes.
  1048. * @param Timeout Timeout value
  1049. * @retval HAL status
  1050. */
  1051. HAL_StatusTypeDef HAL_HASH_MD5_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
  1052. {
  1053. uint32_t tickstart = 0U;
  1054. /* Process Locked */
  1055. __HAL_LOCK(hhash);
  1056. /* Change HASH peripheral state */
  1057. hhash->State = HAL_HASH_STATE_BUSY;
  1058. /* Get tick */
  1059. tickstart = HAL_GetTick();
  1060. while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS))
  1061. {
  1062. /* Check for the Timeout */
  1063. if(Timeout != HAL_MAX_DELAY)
  1064. {
  1065. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  1066. {
  1067. /* Change state */
  1068. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1069. /* Process Unlocked */
  1070. __HAL_UNLOCK(hhash);
  1071. return HAL_TIMEOUT;
  1072. }
  1073. }
  1074. }
  1075. /* Read the message digest */
  1076. HASH_GetDigest(pOutBuffer, 16U);
  1077. /* Change HASH peripheral state */
  1078. hhash->State = HAL_HASH_STATE_READY;
  1079. /* Process Unlocked */
  1080. __HAL_UNLOCK(hhash);
  1081. /* Return function status */
  1082. return HAL_OK;
  1083. }
  1084. /**
  1085. * @brief Initializes the HASH peripheral in SHA1 mode then enables DMA to
  1086. control data transfer. Use HAL_HASH_SHA1_Finish() to get the digest.
  1087. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  1088. * the configuration information for HASH module
  1089. * @param pInBuffer Pointer to the input buffer (buffer to be hashed).
  1090. * @param Size Length of the input buffer in bytes.
  1091. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  1092. * @retval HAL status
  1093. */
  1094. HAL_StatusTypeDef HAL_HASH_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
  1095. {
  1096. uint32_t inputaddr = (uint32_t)pInBuffer;
  1097. /* Process Locked */
  1098. __HAL_LOCK(hhash);
  1099. /* Change the HASH state */
  1100. hhash->State = HAL_HASH_STATE_BUSY;
  1101. /* Check if initialization phase has already been performed */
  1102. if(hhash->Phase == HAL_HASH_PHASE_READY)
  1103. {
  1104. /* Select the SHA1 mode and reset the HASH processor core, so that the HASH will be ready to compute
  1105. the message digest of a new message */
  1106. HASH->CR |= HASH_ALGOSELECTION_SHA1;
  1107. HASH->CR |= HASH_CR_INIT;
  1108. }
  1109. /* Configure the number of valid bits in last word of the message */
  1110. __HAL_HASH_SET_NBVALIDBITS(Size);
  1111. /* Set the phase */
  1112. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  1113. /* Set the HASH DMA transfer complete callback */
  1114. hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
  1115. /* Set the DMA error callback */
  1116. hhash->hdmain->XferErrorCallback = HASH_DMAError;
  1117. /* Enable the DMA In DMA Stream */
  1118. HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4U ? (Size+3U)/4U:Size/4U));
  1119. /* Enable DMA requests */
  1120. HASH->CR |= (HASH_CR_DMAE);
  1121. /* Process Unlocked */
  1122. __HAL_UNLOCK(hhash);
  1123. /* Return function status */
  1124. return HAL_OK;
  1125. }
  1126. /**
  1127. * @brief Returns the computed digest in SHA1 mode.
  1128. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  1129. * the configuration information for HASH module
  1130. * @param pOutBuffer Pointer to the computed digest. Its size must be 20 bytes.
  1131. * @param Timeout Timeout value
  1132. * @retval HAL status
  1133. */
  1134. HAL_StatusTypeDef HAL_HASH_SHA1_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
  1135. {
  1136. uint32_t tickstart = 0U;
  1137. /* Process Locked */
  1138. __HAL_LOCK(hhash);
  1139. /* Change HASH peripheral state */
  1140. hhash->State = HAL_HASH_STATE_BUSY;
  1141. /* Get tick */
  1142. tickstart = HAL_GetTick();
  1143. while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS))
  1144. {
  1145. /* Check for the Timeout */
  1146. if(Timeout != HAL_MAX_DELAY)
  1147. {
  1148. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  1149. {
  1150. /* Change state */
  1151. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1152. /* Process Unlocked */
  1153. __HAL_UNLOCK(hhash);
  1154. return HAL_TIMEOUT;
  1155. }
  1156. }
  1157. }
  1158. /* Read the message digest */
  1159. HASH_GetDigest(pOutBuffer, 20U);
  1160. /* Change HASH peripheral state */
  1161. hhash->State = HAL_HASH_STATE_READY;
  1162. /* Process UnLock */
  1163. __HAL_UNLOCK(hhash);
  1164. /* Return function status */
  1165. return HAL_OK;
  1166. }
  1167. /**
  1168. * @}
  1169. */
  1170. /** @defgroup HASH_Exported_Functions_Group5 HASH-MAC (HMAC) processing functions using polling mode
  1171. * @brief HMAC processing functions using polling mode .
  1172. *
  1173. @verbatim
  1174. ===============================================================================
  1175. ##### HMAC processing using polling mode functions #####
  1176. ===============================================================================
  1177. [..] This section provides functions allowing to calculate in polling mode
  1178. the HMAC value using one of the following algorithms:
  1179. (+) MD5
  1180. (+) SHA1
  1181. @endverbatim
  1182. * @{
  1183. */
  1184. /**
  1185. * @brief Initializes the HASH peripheral in HMAC MD5 mode
  1186. * then processes pInBuffer. The digest is available in pOutBuffer
  1187. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  1188. * the configuration information for HASH module
  1189. * @param pInBuffer Pointer to the input buffer (buffer to be hashed).
  1190. * @param Size Length of the input buffer in bytes.
  1191. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  1192. * @param pOutBuffer Pointer to the computed digest. Its size must be 20 bytes.
  1193. * @param Timeout Timeout value
  1194. * @retval HAL status
  1195. */
  1196. HAL_StatusTypeDef HAL_HMAC_MD5_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
  1197. {
  1198. uint32_t tickstart = 0U;
  1199. /* Process Locked */
  1200. __HAL_LOCK(hhash);
  1201. /* Change the HASH state */
  1202. hhash->State = HAL_HASH_STATE_BUSY;
  1203. /* Check if initialization phase has already been performed */
  1204. if(hhash->Phase == HAL_HASH_PHASE_READY)
  1205. {
  1206. /* Check if key size is greater than 64 bytes */
  1207. if(hhash->Init.KeySize > 64U)
  1208. {
  1209. /* Select the HMAC MD5 mode */
  1210. HASH->CR |= (HASH_ALGOSELECTION_MD5 | HASH_ALGOMODE_HMAC | HASH_HMAC_KEYTYPE_LONGKEY | HASH_CR_INIT);
  1211. }
  1212. else
  1213. {
  1214. /* Select the HMAC MD5 mode */
  1215. HASH->CR |= (HASH_ALGOSELECTION_MD5 | HASH_ALGOMODE_HMAC | HASH_CR_INIT);
  1216. }
  1217. }
  1218. /* Set the phase */
  1219. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  1220. /************************** STEP 1 ******************************************/
  1221. /* Configure the number of valid bits in last word of the message */
  1222. __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
  1223. /* Write input buffer in data register */
  1224. HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
  1225. /* Start the digest calculation */
  1226. __HAL_HASH_START_DIGEST();
  1227. /* Get tick */
  1228. tickstart = HAL_GetTick();
  1229. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  1230. {
  1231. /* Check for the Timeout */
  1232. if(Timeout != HAL_MAX_DELAY)
  1233. {
  1234. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  1235. {
  1236. /* Change state */
  1237. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1238. /* Process Unlocked */
  1239. __HAL_UNLOCK(hhash);
  1240. return HAL_TIMEOUT;
  1241. }
  1242. }
  1243. }
  1244. /************************** STEP 2 ******************************************/
  1245. /* Configure the number of valid bits in last word of the message */
  1246. __HAL_HASH_SET_NBVALIDBITS(Size);
  1247. /* Write input buffer in data register */
  1248. HASH_WriteData(pInBuffer, Size);
  1249. /* Start the digest calculation */
  1250. __HAL_HASH_START_DIGEST();
  1251. /* Get tick */
  1252. tickstart = HAL_GetTick();
  1253. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  1254. {
  1255. /* Check for the Timeout */
  1256. if(Timeout != HAL_MAX_DELAY)
  1257. {
  1258. if((HAL_GetTick() - tickstart ) > Timeout)
  1259. {
  1260. /* Change state */
  1261. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1262. /* Process Unlocked */
  1263. __HAL_UNLOCK(hhash);
  1264. return HAL_TIMEOUT;
  1265. }
  1266. }
  1267. }
  1268. /************************** STEP 3 ******************************************/
  1269. /* Configure the number of valid bits in last word of the message */
  1270. __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
  1271. /* Write input buffer in data register */
  1272. HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
  1273. /* Start the digest calculation */
  1274. __HAL_HASH_START_DIGEST();
  1275. /* Get tick */
  1276. tickstart = HAL_GetTick();
  1277. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  1278. {
  1279. /* Check for the Timeout */
  1280. if(Timeout != HAL_MAX_DELAY)
  1281. {
  1282. if((HAL_GetTick() - tickstart ) > Timeout)
  1283. {
  1284. /* Change state */
  1285. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1286. /* Process Unlocked */
  1287. __HAL_UNLOCK(hhash);
  1288. return HAL_TIMEOUT;
  1289. }
  1290. }
  1291. }
  1292. /* Read the message digest */
  1293. HASH_GetDigest(pOutBuffer, 16U);
  1294. /* Change the HASH state */
  1295. hhash->State = HAL_HASH_STATE_READY;
  1296. /* Process Unlocked */
  1297. __HAL_UNLOCK(hhash);
  1298. /* Return function status */
  1299. return HAL_OK;
  1300. }
  1301. /**
  1302. * @brief Initializes the HASH peripheral in HMAC SHA1 mode
  1303. * then processes pInBuffer. The digest is available in pOutBuffer.
  1304. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  1305. * the configuration information for HASH module
  1306. * @param pInBuffer Pointer to the input buffer (buffer to be hashed).
  1307. * @param Size Length of the input buffer in bytes.
  1308. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  1309. * @param pOutBuffer Pointer to the computed digest. Its size must be 20 bytes.
  1310. * @param Timeout Timeout value
  1311. * @retval HAL status
  1312. */
  1313. HAL_StatusTypeDef HAL_HMAC_SHA1_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
  1314. {
  1315. uint32_t tickstart = 0U;
  1316. /* Process Locked */
  1317. __HAL_LOCK(hhash);
  1318. /* Change the HASH state */
  1319. hhash->State = HAL_HASH_STATE_BUSY;
  1320. /* Check if initialization phase has already been performed */
  1321. if(hhash->Phase == HAL_HASH_PHASE_READY)
  1322. {
  1323. /* Check if key size is greater than 64 bytes */
  1324. if(hhash->Init.KeySize > 64U)
  1325. {
  1326. /* Select the HMAC SHA1 mode */
  1327. HASH->CR |= (HASH_ALGOSELECTION_SHA1 | HASH_ALGOMODE_HMAC | HASH_HMAC_KEYTYPE_LONGKEY | HASH_CR_INIT);
  1328. }
  1329. else
  1330. {
  1331. /* Select the HMAC SHA1 mode */
  1332. HASH->CR |= (HASH_ALGOSELECTION_SHA1 | HASH_ALGOMODE_HMAC | HASH_CR_INIT);
  1333. }
  1334. }
  1335. /* Set the phase */
  1336. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  1337. /************************** STEP 1 ******************************************/
  1338. /* Configure the number of valid bits in last word of the message */
  1339. __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
  1340. /* Write input buffer in data register */
  1341. HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
  1342. /* Start the digest calculation */
  1343. __HAL_HASH_START_DIGEST();
  1344. /* Get tick */
  1345. tickstart = HAL_GetTick();
  1346. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  1347. {
  1348. /* Check for the Timeout */
  1349. if(Timeout != HAL_MAX_DELAY)
  1350. {
  1351. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  1352. {
  1353. /* Change state */
  1354. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1355. /* Process Unlocked */
  1356. __HAL_UNLOCK(hhash);
  1357. return HAL_TIMEOUT;
  1358. }
  1359. }
  1360. }
  1361. /************************** STEP 2 ******************************************/
  1362. /* Configure the number of valid bits in last word of the message */
  1363. __HAL_HASH_SET_NBVALIDBITS(Size);
  1364. /* Write input buffer in data register */
  1365. HASH_WriteData(pInBuffer, Size);
  1366. /* Start the digest calculation */
  1367. __HAL_HASH_START_DIGEST();
  1368. /* Get tick */
  1369. tickstart = HAL_GetTick();
  1370. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  1371. {
  1372. /* Check for the Timeout */
  1373. if(Timeout != HAL_MAX_DELAY)
  1374. {
  1375. if((HAL_GetTick() - tickstart ) > Timeout)
  1376. {
  1377. /* Change state */
  1378. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1379. /* Process Unlocked */
  1380. __HAL_UNLOCK(hhash);
  1381. return HAL_TIMEOUT;
  1382. }
  1383. }
  1384. }
  1385. /************************** STEP 3 ******************************************/
  1386. /* Configure the number of valid bits in last word of the message */
  1387. __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
  1388. /* Write input buffer in data register */
  1389. HASH_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
  1390. /* Start the digest calculation */
  1391. __HAL_HASH_START_DIGEST();
  1392. /* Get tick */
  1393. tickstart = HAL_GetTick();
  1394. while(HAL_IS_BIT_SET(HASH->SR, HASH_FLAG_BUSY))
  1395. {
  1396. /* Check for the Timeout */
  1397. if(Timeout != HAL_MAX_DELAY)
  1398. {
  1399. if((HAL_GetTick() - tickstart ) > Timeout)
  1400. {
  1401. /* Change state */
  1402. hhash->State = HAL_HASH_STATE_TIMEOUT;
  1403. /* Process Unlocked */
  1404. __HAL_UNLOCK(hhash);
  1405. return HAL_TIMEOUT;
  1406. }
  1407. }
  1408. }
  1409. /* Read the message digest */
  1410. HASH_GetDigest(pOutBuffer, 20U);
  1411. /* Change the HASH state */
  1412. hhash->State = HAL_HASH_STATE_READY;
  1413. /* Process Unlocked */
  1414. __HAL_UNLOCK(hhash);
  1415. /* Return function status */
  1416. return HAL_OK;
  1417. }
  1418. /**
  1419. * @}
  1420. */
  1421. /** @defgroup HASH_Exported_Functions_Group6 HASH-MAC (HMAC) processing functions using DMA mode
  1422. * @brief HMAC processing functions using DMA mode .
  1423. *
  1424. @verbatim
  1425. ===============================================================================
  1426. ##### HMAC processing using DMA mode functions #####
  1427. ===============================================================================
  1428. [..] This section provides functions allowing to calculate in DMA mode
  1429. the HMAC value using one of the following algorithms:
  1430. (+) MD5
  1431. (+) SHA1
  1432. @endverbatim
  1433. * @{
  1434. */
  1435. /**
  1436. * @brief Initializes the HASH peripheral in HMAC MD5 mode
  1437. * then enables DMA to control data transfer.
  1438. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  1439. * the configuration information for HASH module
  1440. * @param pInBuffer Pointer to the input buffer (buffer to be hashed).
  1441. * @param Size Length of the input buffer in bytes.
  1442. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  1443. * @retval HAL status
  1444. */
  1445. HAL_StatusTypeDef HAL_HMAC_MD5_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
  1446. {
  1447. uint32_t inputaddr = 0U;
  1448. /* Process Locked */
  1449. __HAL_LOCK(hhash);
  1450. /* Change the HASH state */
  1451. hhash->State = HAL_HASH_STATE_BUSY;
  1452. /* Save buffer pointer and size in handle */
  1453. hhash->pHashInBuffPtr = pInBuffer;
  1454. hhash->HashBuffSize = Size;
  1455. hhash->HashInCount = 0U;
  1456. /* Check if initialization phase has already been performed */
  1457. if(hhash->Phase == HAL_HASH_PHASE_READY)
  1458. {
  1459. /* Check if key size is greater than 64 bytes */
  1460. if(hhash->Init.KeySize > 64U)
  1461. {
  1462. /* Select the HMAC MD5 mode */
  1463. HASH->CR |= (HASH_ALGOSELECTION_MD5 | HASH_ALGOMODE_HMAC | HASH_HMAC_KEYTYPE_LONGKEY | HASH_CR_INIT);
  1464. }
  1465. else
  1466. {
  1467. /* Select the HMAC MD5 mode */
  1468. HASH->CR |= (HASH_ALGOSELECTION_MD5 | HASH_ALGOMODE_HMAC | HASH_CR_INIT);
  1469. }
  1470. }
  1471. /* Set the phase */
  1472. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  1473. /* Configure the number of valid bits in last word of the message */
  1474. __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
  1475. /* Get the key address */
  1476. inputaddr = (uint32_t)(hhash->Init.pKey);
  1477. /* Set the HASH DMA transfer complete callback */
  1478. hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
  1479. /* Set the DMA error callback */
  1480. hhash->hdmain->XferErrorCallback = HASH_DMAError;
  1481. /* Enable the DMA In DMA Stream */
  1482. HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4U ? (hhash->Init.KeySize+3U)/4U:hhash->Init.KeySize/4U));
  1483. /* Enable DMA requests */
  1484. HASH->CR |= (HASH_CR_DMAE);
  1485. /* Process Unlocked */
  1486. __HAL_UNLOCK(hhash);
  1487. /* Return function status */
  1488. return HAL_OK;
  1489. }
  1490. /**
  1491. * @brief Initializes the HASH peripheral in HMAC SHA1 mode
  1492. * then enables DMA to control data transfer.
  1493. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  1494. * the configuration information for HASH module
  1495. * @param pInBuffer Pointer to the input buffer (buffer to be hashed).
  1496. * @param Size Length of the input buffer in bytes.
  1497. * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
  1498. * @retval HAL status
  1499. */
  1500. HAL_StatusTypeDef HAL_HMAC_SHA1_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
  1501. {
  1502. uint32_t inputaddr = 0U;
  1503. /* Process Locked */
  1504. __HAL_LOCK(hhash);
  1505. /* Change the HASH state */
  1506. hhash->State = HAL_HASH_STATE_BUSY;
  1507. /* Save buffer pointer and size in handle */
  1508. hhash->pHashInBuffPtr = pInBuffer;
  1509. hhash->HashBuffSize = Size;
  1510. hhash->HashInCount = 0U;
  1511. /* Check if initialization phase has already been performed */
  1512. if(hhash->Phase == HAL_HASH_PHASE_READY)
  1513. {
  1514. /* Check if key size is greater than 64 bytes */
  1515. if(hhash->Init.KeySize > 64U)
  1516. {
  1517. /* Select the HMAC SHA1 mode */
  1518. HASH->CR |= (HASH_ALGOSELECTION_SHA1 | HASH_ALGOMODE_HMAC | HASH_HMAC_KEYTYPE_LONGKEY | HASH_CR_INIT);
  1519. }
  1520. else
  1521. {
  1522. /* Select the HMAC SHA1 mode */
  1523. HASH->CR |= (HASH_ALGOSELECTION_SHA1 | HASH_ALGOMODE_HMAC | HASH_CR_INIT);
  1524. }
  1525. }
  1526. /* Set the phase */
  1527. hhash->Phase = HAL_HASH_PHASE_PROCESS;
  1528. /* Configure the number of valid bits in last word of the message */
  1529. __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
  1530. /* Get the key address */
  1531. inputaddr = (uint32_t)(hhash->Init.pKey);
  1532. /* Set the HASH DMA transfer complete callback */
  1533. hhash->hdmain->XferCpltCallback = HASH_DMAXferCplt;
  1534. /* Set the DMA error callback */
  1535. hhash->hdmain->XferErrorCallback = HASH_DMAError;
  1536. /* Enable the DMA In DMA Stream */
  1537. HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4U ? (hhash->Init.KeySize+3U)/4U:hhash->Init.KeySize/4U));
  1538. /* Enable DMA requests */
  1539. HASH->CR |= (HASH_CR_DMAE);
  1540. /* Process Unlocked */
  1541. __HAL_UNLOCK(hhash);
  1542. /* Return function status */
  1543. return HAL_OK;
  1544. }
  1545. /**
  1546. * @}
  1547. */
  1548. /** @defgroup HASH_Exported_Functions_Group7 Peripheral State functions
  1549. * @brief Peripheral State functions.
  1550. *
  1551. @verbatim
  1552. ===============================================================================
  1553. ##### Peripheral State functions #####
  1554. ===============================================================================
  1555. [..]
  1556. This subsection permits to get in run-time the status of the peripheral.
  1557. @endverbatim
  1558. * @{
  1559. */
  1560. /**
  1561. * @brief return the HASH state
  1562. * @param hhash pointer to a HASH_HandleTypeDef structure that contains
  1563. * the configuration information for HASH module
  1564. * @retval HAL state
  1565. */
  1566. HAL_HASH_StateTypeDef HAL_HASH_GetState(HASH_HandleTypeDef *hhash)
  1567. {
  1568. return hhash->State;
  1569. }
  1570. /**
  1571. * @}
  1572. */
  1573. /**
  1574. * @}
  1575. */
  1576. #endif /* STM32F415xx || STM32F417xx || STM32F437xx || STM32F439xx || STM32F479xx */
  1577. #endif /* HAL_HASH_MODULE_ENABLED */
  1578. /**
  1579. * @}
  1580. */
  1581. /**
  1582. * @}
  1583. */
  1584. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/