stm32f4xx_ll_dma2d.h 75 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_ll_dma2d.h
  4. * @author MCD Application Team
  5. * @brief Header file of DMA2D LL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32F4xx_LL_DMA2D_H
  37. #define __STM32F4xx_LL_DMA2D_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. /* Includes ------------------------------------------------------------------*/
  42. #include "stm32f4xx.h"
  43. /** @addtogroup STM32F4xx_LL_Driver
  44. * @{
  45. */
  46. #if defined (DMA2D)
  47. /** @defgroup DMA2D_LL DMA2D
  48. * @{
  49. */
  50. /* Private types -------------------------------------------------------------*/
  51. /* Private variables ---------------------------------------------------------*/
  52. /* Private constants ---------------------------------------------------------*/
  53. /* Private macros ------------------------------------------------------------*/
  54. #if defined(USE_FULL_LL_DRIVER)
  55. /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
  56. * @{
  57. */
  58. /**
  59. * @}
  60. */
  61. #endif /*USE_FULL_LL_DRIVER*/
  62. /* Exported types ------------------------------------------------------------*/
  63. #if defined(USE_FULL_LL_DRIVER)
  64. /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
  65. * @{
  66. */
  67. /**
  68. * @brief LL DMA2D Init Structure Definition
  69. */
  70. typedef struct
  71. {
  72. uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
  73. - This parameter can be one value of @ref DMA2D_LL_EC_MODE.
  74. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/
  75. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  76. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  77. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  78. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  79. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  80. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  81. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  82. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  83. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  84. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  85. function @ref LL_DMA2D_ConfigOutputColor(). */
  86. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  87. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  88. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  89. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  90. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  91. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  92. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  93. function @ref LL_DMA2D_ConfigOutputColor(). */
  94. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  95. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  96. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  97. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  98. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  99. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  100. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  101. function @ref LL_DMA2D_ConfigOutputColor(). */
  102. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  103. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  104. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  105. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  106. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  107. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  108. function @ref LL_DMA2D_ConfigOutputColor(). */
  109. uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
  110. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  111. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
  112. uint32_t LineOffset; /*!< Specifies the output line offset value.
  113. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  114. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */
  115. uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
  116. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
  117. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
  118. uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered.
  119. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  120. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
  121. } LL_DMA2D_InitTypeDef;
  122. /**
  123. * @brief LL DMA2D Layer Configuration Structure Definition
  124. */
  125. typedef struct
  126. {
  127. uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
  128. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  129. This parameter can be modified afterwards using unitary functions
  130. - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
  131. - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
  132. uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
  133. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
  134. This parameter can be modified afterwards using unitary functions
  135. - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
  136. - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
  137. uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
  138. - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
  139. This parameter can be modified afterwards using unitary functions
  140. - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
  141. - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
  142. uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
  143. - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
  144. This parameter can be modified afterwards using unitary functions
  145. - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
  146. - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
  147. uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
  148. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  149. This parameter can be modified afterwards using unitary functions
  150. - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
  151. - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
  152. uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
  153. - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
  154. This parameter can be modified afterwards using unitary functions
  155. - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
  156. - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
  157. uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
  158. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  159. This parameter can be modified afterwards using unitary functions
  160. - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
  161. - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
  162. uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
  163. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  164. This parameter can be modified afterwards using unitary functions
  165. - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
  166. - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
  167. uint32_t Green; /*!< Specifies the foreground or background Green color value.
  168. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  169. This parameter can be modified afterwards using unitary functions
  170. - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
  171. - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
  172. uint32_t Red; /*!< Specifies the foreground or background Red color value.
  173. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
  174. This parameter can be modified afterwards using unitary functions
  175. - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
  176. - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
  177. uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
  178. - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
  179. This parameter can be modified afterwards using unitary functions
  180. - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
  181. - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
  182. } LL_DMA2D_LayerCfgTypeDef;
  183. /**
  184. * @brief LL DMA2D Output Color Structure Definition
  185. */
  186. typedef struct
  187. {
  188. uint32_t ColorMode; /*!< Specifies the color format of the output image.
  189. - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
  190. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
  191. uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
  192. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  193. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  194. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  195. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  196. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  197. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  198. function @ref LL_DMA2D_ConfigOutputColor(). */
  199. uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
  200. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  201. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  202. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
  203. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  204. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  205. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  206. function @ref LL_DMA2D_ConfigOutputColor(). */
  207. uint32_t OutputRed; /*!< Specifies the Red value of the output image.
  208. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  209. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
  210. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
  211. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
  212. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  213. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  214. function @ref LL_DMA2D_ConfigOutputColor(). */
  215. uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
  216. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
  217. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
  218. - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
  219. - This parameter is not considered if RGB888 or RGB565 color mode is selected.
  220. This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
  221. function @ref LL_DMA2D_ConfigOutputColor(). */
  222. } LL_DMA2D_ColorTypeDef;
  223. /**
  224. * @}
  225. */
  226. #endif /* USE_FULL_LL_DRIVER */
  227. /* Exported constants --------------------------------------------------------*/
  228. /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
  229. * @{
  230. */
  231. /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
  232. * @brief Flags defines which can be used with LL_DMA2D_ReadReg function
  233. * @{
  234. */
  235. #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */
  236. #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */
  237. #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */
  238. #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */
  239. #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */
  240. #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */
  241. /**
  242. * @}
  243. */
  244. /** @defgroup DMA2D_LL_EC_IT IT Defines
  245. * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
  246. * @{
  247. */
  248. #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */
  249. #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */
  250. #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */
  251. #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */
  252. #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */
  253. #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */
  254. /**
  255. * @}
  256. */
  257. /** @defgroup DMA2D_LL_EC_MODE Mode
  258. * @{
  259. */
  260. #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */
  261. #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */
  262. #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */
  263. #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */
  264. /**
  265. * @}
  266. */
  267. /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
  268. * @{
  269. */
  270. #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  271. #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */
  272. #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */
  273. #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */
  274. #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */
  275. /**
  276. * @}
  277. */
  278. /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
  279. * @{
  280. */
  281. #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  282. #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */
  283. #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */
  284. #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */
  285. #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */
  286. #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */
  287. #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */
  288. #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */
  289. #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */
  290. #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */
  291. #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */
  292. /**
  293. * @}
  294. */
  295. /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
  296. * @{
  297. */
  298. #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */
  299. #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */
  300. #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value
  301. with original alpha channel value */
  302. /**
  303. * @}
  304. */
  305. /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
  306. * @{
  307. */
  308. #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */
  309. #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */
  310. /**
  311. * @}
  312. */
  313. /**
  314. * @}
  315. */
  316. /* Exported macro ------------------------------------------------------------*/
  317. /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
  318. * @{
  319. */
  320. /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
  321. * @{
  322. */
  323. /**
  324. * @brief Write a value in DMA2D register.
  325. * @param __INSTANCE__ DMA2D Instance
  326. * @param __REG__ Register to be written
  327. * @param __VALUE__ Value to be written in the register
  328. * @retval None
  329. */
  330. #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
  331. /**
  332. * @brief Read a value in DMA2D register.
  333. * @param __INSTANCE__ DMA2D Instance
  334. * @param __REG__ Register to be read
  335. * @retval Register value
  336. */
  337. #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
  338. /**
  339. * @}
  340. */
  341. /**
  342. * @}
  343. */
  344. /* Exported functions --------------------------------------------------------*/
  345. /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
  346. * @{
  347. */
  348. /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
  349. * @{
  350. */
  351. /**
  352. * @brief Start a DMA2D transfer.
  353. * @rmtoll CR START LL_DMA2D_Start
  354. * @param DMA2Dx DMA2D Instance
  355. * @retval None
  356. */
  357. __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
  358. {
  359. SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
  360. }
  361. /**
  362. * @brief Indicate if a DMA2D transfer is ongoing.
  363. * @rmtoll CR START LL_DMA2D_IsTransferOngoing
  364. * @param DMA2Dx DMA2D Instance
  365. * @retval State of bit (1 or 0).
  366. */
  367. __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
  368. {
  369. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START));
  370. }
  371. /**
  372. * @brief Suspend DMA2D transfer.
  373. * @note This API can be used to suspend automatic foreground or background CLUT loading.
  374. * @rmtoll CR SUSP LL_DMA2D_Suspend
  375. * @param DMA2Dx DMA2D Instance
  376. * @retval None
  377. */
  378. __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
  379. {
  380. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP);
  381. }
  382. /**
  383. * @brief Resume DMA2D transfer.
  384. * @note This API can be used to resume automatic foreground or background CLUT loading.
  385. * @rmtoll CR SUSP LL_DMA2D_Resume
  386. * @param DMA2Dx DMA2D Instance
  387. * @retval None
  388. */
  389. __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
  390. {
  391. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START);
  392. }
  393. /**
  394. * @brief Indicate if DMA2D transfer is suspended.
  395. * @note This API can be used to indicate whether or not automatic foreground or
  396. * background CLUT loading is suspended.
  397. * @rmtoll CR SUSP LL_DMA2D_IsSuspended
  398. * @param DMA2Dx DMA2D Instance
  399. * @retval State of bit (1 or 0).
  400. */
  401. __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
  402. {
  403. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP));
  404. }
  405. /**
  406. * @brief Abort DMA2D transfer.
  407. * @note This API can be used to abort automatic foreground or background CLUT loading.
  408. * @rmtoll CR ABORT LL_DMA2D_Abort
  409. * @param DMA2Dx DMA2D Instance
  410. * @retval None
  411. */
  412. __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
  413. {
  414. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT);
  415. }
  416. /**
  417. * @brief Indicate if DMA2D transfer is aborted.
  418. * @note This API can be used to indicate whether or not automatic foreground or
  419. * background CLUT loading is aborted.
  420. * @rmtoll CR ABORT LL_DMA2D_IsAborted
  421. * @param DMA2Dx DMA2D Instance
  422. * @retval State of bit (1 or 0).
  423. */
  424. __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
  425. {
  426. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT));
  427. }
  428. /**
  429. * @brief Set DMA2D mode.
  430. * @rmtoll CR MODE LL_DMA2D_SetMode
  431. * @param DMA2Dx DMA2D Instance
  432. * @param Mode This parameter can be one of the following values:
  433. * @arg @ref LL_DMA2D_MODE_M2M
  434. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  435. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  436. * @arg @ref LL_DMA2D_MODE_R2M
  437. * @retval None
  438. */
  439. __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
  440. {
  441. MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
  442. }
  443. /**
  444. * @brief Return DMA2D mode
  445. * @rmtoll CR MODE LL_DMA2D_GetMode
  446. * @param DMA2Dx DMA2D Instance
  447. * @retval Returned value can be one of the following values:
  448. * @arg @ref LL_DMA2D_MODE_M2M
  449. * @arg @ref LL_DMA2D_MODE_M2M_PFC
  450. * @arg @ref LL_DMA2D_MODE_M2M_BLEND
  451. * @arg @ref LL_DMA2D_MODE_R2M
  452. */
  453. __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
  454. {
  455. return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
  456. }
  457. /**
  458. * @brief Set DMA2D output color mode.
  459. * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
  460. * @param DMA2Dx DMA2D Instance
  461. * @param ColorMode This parameter can be one of the following values:
  462. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  463. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  464. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  465. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  466. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  467. * @retval None
  468. */
  469. __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  470. {
  471. MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
  472. }
  473. /**
  474. * @brief Return DMA2D output color mode.
  475. * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
  476. * @param DMA2Dx DMA2D Instance
  477. * @retval Returned value can be one of the following values:
  478. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
  479. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
  480. * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
  481. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
  482. * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
  483. */
  484. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
  485. {
  486. return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
  487. }
  488. /**
  489. * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
  490. * @rmtoll OOR LO LL_DMA2D_SetLineOffset
  491. * @param DMA2Dx DMA2D Instance
  492. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
  493. * @retval None
  494. */
  495. __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  496. {
  497. MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
  498. }
  499. /**
  500. * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
  501. * @rmtoll OOR LO LL_DMA2D_GetLineOffset
  502. * @param DMA2Dx DMA2D Instance
  503. * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
  504. */
  505. __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  506. {
  507. return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
  508. }
  509. /**
  510. * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
  511. * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
  512. * @param DMA2Dx DMA2D Instance
  513. * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
  514. * @retval None
  515. */
  516. __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
  517. {
  518. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
  519. }
  520. /**
  521. * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
  522. * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
  523. * @param DMA2Dx DMA2D Instance
  524. * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
  525. */
  526. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
  527. {
  528. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
  529. }
  530. /**
  531. * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  532. * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
  533. * @param DMA2Dx DMA2D Instance
  534. * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
  535. * @retval None
  536. */
  537. __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
  538. {
  539. MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
  540. }
  541. /**
  542. * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
  543. * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
  544. * @param DMA2Dx DMA2D Instance
  545. * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
  546. */
  547. __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
  548. {
  549. return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
  550. }
  551. /**
  552. * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  553. * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
  554. * @param DMA2Dx DMA2D Instance
  555. * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  556. * @retval None
  557. */
  558. __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
  559. {
  560. LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
  561. }
  562. /**
  563. * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
  564. * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
  565. * @param DMA2Dx DMA2D Instance
  566. * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  567. */
  568. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
  569. {
  570. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
  571. }
  572. /**
  573. * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
  574. * @note Output color format depends on output color mode, ARGB8888, RGB888,
  575. * RGB565, ARGB1555 or ARGB4444.
  576. * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
  577. * with respect to color mode is not done by the user code.
  578. * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
  579. * OCOLR GREEN LL_DMA2D_SetOutputColor\n
  580. * OCOLR RED LL_DMA2D_SetOutputColor\n
  581. * OCOLR ALPHA LL_DMA2D_SetOutputColor
  582. * @param DMA2Dx DMA2D Instance
  583. * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  584. * @retval None
  585. */
  586. __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
  587. {
  588. MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \
  589. OutputColor);
  590. }
  591. /**
  592. * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
  593. * @note Alpha channel and red, green, blue color values must be retrieved from the returned
  594. * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
  595. * as set by @ref LL_DMA2D_SetOutputColorMode.
  596. * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
  597. * OCOLR GREEN LL_DMA2D_GetOutputColor\n
  598. * OCOLR RED LL_DMA2D_GetOutputColor\n
  599. * OCOLR ALPHA LL_DMA2D_GetOutputColor
  600. * @param DMA2Dx DMA2D Instance
  601. * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
  602. */
  603. __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
  604. {
  605. return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
  606. (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1)));
  607. }
  608. /**
  609. * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  610. * @rmtoll LWR LW LL_DMA2D_SetLineWatermark
  611. * @param DMA2Dx DMA2D Instance
  612. * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
  613. * @retval None
  614. */
  615. __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
  616. {
  617. MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
  618. }
  619. /**
  620. * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
  621. * @rmtoll LWR LW LL_DMA2D_GetLineWatermark
  622. * @param DMA2Dx DMA2D Instance
  623. * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
  624. */
  625. __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
  626. {
  627. return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
  628. }
  629. /**
  630. * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
  631. * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
  632. * @param DMA2Dx DMA2D Instance
  633. * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
  634. * @retval None
  635. */
  636. __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
  637. {
  638. MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
  639. }
  640. /**
  641. * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
  642. * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
  643. * @param DMA2Dx DMA2D Instance
  644. * @retval Dead time value between Min_Data=0 and Max_Data=0xFF
  645. */
  646. __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
  647. {
  648. return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
  649. }
  650. /**
  651. * @brief Enable DMA2D dead time functionality.
  652. * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
  653. * @param DMA2Dx DMA2D Instance
  654. * @retval None
  655. */
  656. __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
  657. {
  658. SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  659. }
  660. /**
  661. * @brief Disable DMA2D dead time functionality.
  662. * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
  663. * @param DMA2Dx DMA2D Instance
  664. * @retval None
  665. */
  666. __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
  667. {
  668. CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
  669. }
  670. /**
  671. * @brief Indicate if DMA2D dead time functionality is enabled.
  672. * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
  673. * @param DMA2Dx DMA2D Instance
  674. * @retval State of bit (1 or 0).
  675. */
  676. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
  677. {
  678. return (READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN));
  679. }
  680. /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
  681. * @{
  682. */
  683. /**
  684. * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  685. * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
  686. * @param DMA2Dx DMA2D Instance
  687. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  688. * @retval None
  689. */
  690. __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  691. {
  692. LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
  693. }
  694. /**
  695. * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
  696. * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
  697. * @param DMA2Dx DMA2D Instance
  698. * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  699. */
  700. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  701. {
  702. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
  703. }
  704. /**
  705. * @brief Enable DMA2D foreground CLUT loading.
  706. * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
  707. * @param DMA2Dx DMA2D Instance
  708. * @retval None
  709. */
  710. __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  711. {
  712. SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
  713. }
  714. /**
  715. * @brief Indicate if DMA2D foreground CLUT loading is enabled.
  716. * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
  717. * @param DMA2Dx DMA2D Instance
  718. * @retval State of bit (1 or 0).
  719. */
  720. __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  721. {
  722. return (READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START));
  723. }
  724. /**
  725. * @brief Set DMA2D foreground color mode.
  726. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
  727. * @param DMA2Dx DMA2D Instance
  728. * @param ColorMode This parameter can be one of the following values:
  729. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  730. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  731. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  732. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  733. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  734. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  735. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  736. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  737. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  738. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  739. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  740. * @retval None
  741. */
  742. __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  743. {
  744. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
  745. }
  746. /**
  747. * @brief Return DMA2D foreground color mode.
  748. * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
  749. * @param DMA2Dx DMA2D Instance
  750. * @retval Returned value can be one of the following values:
  751. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  752. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  753. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  754. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  755. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  756. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  757. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  758. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  759. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  760. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  761. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  762. */
  763. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  764. {
  765. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
  766. }
  767. /**
  768. * @brief Set DMA2D foreground alpha mode.
  769. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
  770. * @param DMA2Dx DMA2D Instance
  771. * @param AphaMode This parameter can be one of the following values:
  772. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  773. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  774. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  775. * @retval None
  776. */
  777. __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  778. {
  779. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
  780. }
  781. /**
  782. * @brief Return DMA2D foreground alpha mode.
  783. * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
  784. * @param DMA2Dx DMA2D Instance
  785. * @retval Returned value can be one of the following values:
  786. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  787. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  788. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  789. */
  790. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  791. {
  792. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
  793. }
  794. /**
  795. * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  796. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
  797. * @param DMA2Dx DMA2D Instance
  798. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  799. * @retval None
  800. */
  801. __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  802. {
  803. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
  804. }
  805. /**
  806. * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
  807. * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
  808. * @param DMA2Dx DMA2D Instance
  809. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  810. */
  811. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  812. {
  813. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
  814. }
  815. /**
  816. * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  817. * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
  818. * @param DMA2Dx DMA2D Instance
  819. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  820. * @retval None
  821. */
  822. __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  823. {
  824. MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
  825. }
  826. /**
  827. * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
  828. * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
  829. * @param DMA2Dx DMA2D Instance
  830. * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
  831. */
  832. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  833. {
  834. return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
  835. }
  836. /**
  837. * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
  838. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
  839. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
  840. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
  841. * @param DMA2Dx DMA2D Instance
  842. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  843. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  844. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  845. * @retval None
  846. */
  847. __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  848. {
  849. MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \
  850. ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue));
  851. }
  852. /**
  853. * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  854. * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
  855. * @param DMA2Dx DMA2D Instance
  856. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  857. * @retval None
  858. */
  859. __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  860. {
  861. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
  862. }
  863. /**
  864. * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
  865. * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
  866. * @param DMA2Dx DMA2D Instance
  867. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  868. */
  869. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  870. {
  871. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
  872. }
  873. /**
  874. * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  875. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
  876. * @param DMA2Dx DMA2D Instance
  877. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  878. * @retval None
  879. */
  880. __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  881. {
  882. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
  883. }
  884. /**
  885. * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
  886. * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
  887. * @param DMA2Dx DMA2D Instance
  888. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  889. */
  890. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  891. {
  892. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
  893. }
  894. /**
  895. * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  896. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
  897. * @param DMA2Dx DMA2D Instance
  898. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  899. * @retval None
  900. */
  901. __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  902. {
  903. MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
  904. }
  905. /**
  906. * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
  907. * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
  908. * @param DMA2Dx DMA2D Instance
  909. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  910. */
  911. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  912. {
  913. return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
  914. }
  915. /**
  916. * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  917. * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
  918. * @param DMA2Dx DMA2D Instance
  919. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  920. * @retval None
  921. */
  922. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  923. {
  924. LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
  925. }
  926. /**
  927. * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
  928. * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
  929. * @param DMA2Dx DMA2D Instance
  930. * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  931. */
  932. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  933. {
  934. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
  935. }
  936. /**
  937. * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  938. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
  939. * @param DMA2Dx DMA2D Instance
  940. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  941. * @retval None
  942. */
  943. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  944. {
  945. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
  946. }
  947. /**
  948. * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
  949. * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
  950. * @param DMA2Dx DMA2D Instance
  951. * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
  952. */
  953. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  954. {
  955. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
  956. }
  957. /**
  958. * @brief Set DMA2D foreground CLUT color mode.
  959. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
  960. * @param DMA2Dx DMA2D Instance
  961. * @param CLUTColorMode This parameter can be one of the following values:
  962. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  963. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  964. * @retval None
  965. */
  966. __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  967. {
  968. MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
  969. }
  970. /**
  971. * @brief Return DMA2D foreground CLUT color mode.
  972. * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
  973. * @param DMA2Dx DMA2D Instance
  974. * @retval Returned value can be one of the following values:
  975. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  976. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  977. */
  978. __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  979. {
  980. return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
  981. }
  982. /**
  983. * @}
  984. */
  985. /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
  986. * @{
  987. */
  988. /**
  989. * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  990. * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
  991. * @param DMA2Dx DMA2D Instance
  992. * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  993. * @retval None
  994. */
  995. __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
  996. {
  997. LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
  998. }
  999. /**
  1000. * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
  1001. * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
  1002. * @param DMA2Dx DMA2D Instance
  1003. * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1004. */
  1005. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
  1006. {
  1007. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
  1008. }
  1009. /**
  1010. * @brief Enable DMA2D background CLUT loading.
  1011. * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
  1012. * @param DMA2Dx DMA2D Instance
  1013. * @retval None
  1014. */
  1015. __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1016. {
  1017. SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
  1018. }
  1019. /**
  1020. * @brief Indicate if DMA2D background CLUT loading is enabled.
  1021. * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
  1022. * @param DMA2Dx DMA2D Instance
  1023. * @retval State of bit (1 or 0).
  1024. */
  1025. __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
  1026. {
  1027. return (READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START));
  1028. }
  1029. /**
  1030. * @brief Set DMA2D background color mode.
  1031. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
  1032. * @param DMA2Dx DMA2D Instance
  1033. * @param ColorMode This parameter can be one of the following values:
  1034. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1035. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1036. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1037. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1038. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1039. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1040. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1041. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1042. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1043. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1044. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1045. * @retval None
  1046. */
  1047. __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
  1048. {
  1049. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
  1050. }
  1051. /**
  1052. * @brief Return DMA2D background color mode.
  1053. * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
  1054. * @param DMA2Dx DMA2D Instance
  1055. * @retval Returned value can be one of the following values:
  1056. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
  1057. * @arg @ref LL_DMA2D_INPUT_MODE_RGB888
  1058. * @arg @ref LL_DMA2D_INPUT_MODE_RGB565
  1059. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
  1060. * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
  1061. * @arg @ref LL_DMA2D_INPUT_MODE_L8
  1062. * @arg @ref LL_DMA2D_INPUT_MODE_AL44
  1063. * @arg @ref LL_DMA2D_INPUT_MODE_AL88
  1064. * @arg @ref LL_DMA2D_INPUT_MODE_L4
  1065. * @arg @ref LL_DMA2D_INPUT_MODE_A8
  1066. * @arg @ref LL_DMA2D_INPUT_MODE_A4
  1067. */
  1068. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
  1069. {
  1070. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
  1071. }
  1072. /**
  1073. * @brief Set DMA2D background alpha mode.
  1074. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
  1075. * @param DMA2Dx DMA2D Instance
  1076. * @param AphaMode This parameter can be one of the following values:
  1077. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1078. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1079. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1080. * @retval None
  1081. */
  1082. __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
  1083. {
  1084. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
  1085. }
  1086. /**
  1087. * @brief Return DMA2D background alpha mode.
  1088. * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
  1089. * @param DMA2Dx DMA2D Instance
  1090. * @retval Returned value can be one of the following values:
  1091. * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
  1092. * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
  1093. * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
  1094. */
  1095. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
  1096. {
  1097. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
  1098. }
  1099. /**
  1100. * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1101. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
  1102. * @param DMA2Dx DMA2D Instance
  1103. * @param Alpha Value between Min_Data=0 and Max_Data=0xFF
  1104. * @retval None
  1105. */
  1106. __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
  1107. {
  1108. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
  1109. }
  1110. /**
  1111. * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
  1112. * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
  1113. * @param DMA2Dx DMA2D Instance
  1114. * @retval Alpha value between Min_Data=0 and Max_Data=0xFF
  1115. */
  1116. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
  1117. {
  1118. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
  1119. }
  1120. /**
  1121. * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1122. * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
  1123. * @param DMA2Dx DMA2D Instance
  1124. * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
  1125. * @retval None
  1126. */
  1127. __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
  1128. {
  1129. MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
  1130. }
  1131. /**
  1132. * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
  1133. * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
  1134. * @param DMA2Dx DMA2D Instance
  1135. * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
  1136. */
  1137. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
  1138. {
  1139. return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
  1140. }
  1141. /**
  1142. * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
  1143. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
  1144. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
  1145. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
  1146. * @param DMA2Dx DMA2D Instance
  1147. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1148. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1149. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1150. * @retval None
  1151. */
  1152. __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
  1153. {
  1154. MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \
  1155. ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue));
  1156. }
  1157. /**
  1158. * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1159. * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
  1160. * @param DMA2Dx DMA2D Instance
  1161. * @param Red Value between Min_Data=0 and Max_Data=0xFF
  1162. * @retval None
  1163. */
  1164. __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
  1165. {
  1166. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
  1167. }
  1168. /**
  1169. * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
  1170. * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
  1171. * @param DMA2Dx DMA2D Instance
  1172. * @retval Red color value between Min_Data=0 and Max_Data=0xFF
  1173. */
  1174. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
  1175. {
  1176. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
  1177. }
  1178. /**
  1179. * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1180. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
  1181. * @param DMA2Dx DMA2D Instance
  1182. * @param Green Value between Min_Data=0 and Max_Data=0xFF
  1183. * @retval None
  1184. */
  1185. __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
  1186. {
  1187. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
  1188. }
  1189. /**
  1190. * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
  1191. * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
  1192. * @param DMA2Dx DMA2D Instance
  1193. * @retval Green color value between Min_Data=0 and Max_Data=0xFF
  1194. */
  1195. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
  1196. {
  1197. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
  1198. }
  1199. /**
  1200. * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1201. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
  1202. * @param DMA2Dx DMA2D Instance
  1203. * @param Blue Value between Min_Data=0 and Max_Data=0xFF
  1204. * @retval None
  1205. */
  1206. __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
  1207. {
  1208. MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
  1209. }
  1210. /**
  1211. * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
  1212. * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
  1213. * @param DMA2Dx DMA2D Instance
  1214. * @retval Blue color value between Min_Data=0 and Max_Data=0xFF
  1215. */
  1216. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
  1217. {
  1218. return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
  1219. }
  1220. /**
  1221. * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1222. * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
  1223. * @param DMA2Dx DMA2D Instance
  1224. * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1225. * @retval None
  1226. */
  1227. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
  1228. {
  1229. LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
  1230. }
  1231. /**
  1232. * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
  1233. * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
  1234. * @param DMA2Dx DMA2D Instance
  1235. * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
  1236. */
  1237. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
  1238. {
  1239. return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
  1240. }
  1241. /**
  1242. * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1243. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
  1244. * @param DMA2Dx DMA2D Instance
  1245. * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
  1246. * @retval None
  1247. */
  1248. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
  1249. {
  1250. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
  1251. }
  1252. /**
  1253. * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
  1254. * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
  1255. * @param DMA2Dx DMA2D Instance
  1256. * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
  1257. */
  1258. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
  1259. {
  1260. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
  1261. }
  1262. /**
  1263. * @brief Set DMA2D background CLUT color mode.
  1264. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
  1265. * @param DMA2Dx DMA2D Instance
  1266. * @param CLUTColorMode This parameter can be one of the following values:
  1267. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1268. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1269. * @retval None
  1270. */
  1271. __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
  1272. {
  1273. MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
  1274. }
  1275. /**
  1276. * @brief Return DMA2D background CLUT color mode.
  1277. * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
  1278. * @param DMA2Dx DMA2D Instance
  1279. * @retval Returned value can be one of the following values:
  1280. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
  1281. * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
  1282. */
  1283. __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
  1284. {
  1285. return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
  1286. }
  1287. /**
  1288. * @}
  1289. */
  1290. /**
  1291. * @}
  1292. */
  1293. /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
  1294. * @{
  1295. */
  1296. /**
  1297. * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
  1298. * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
  1299. * @param DMA2Dx DMA2D Instance
  1300. * @retval State of bit (1 or 0).
  1301. */
  1302. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1303. {
  1304. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF));
  1305. }
  1306. /**
  1307. * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
  1308. * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
  1309. * @param DMA2Dx DMA2D Instance
  1310. * @retval State of bit (1 or 0).
  1311. */
  1312. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1313. {
  1314. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF));
  1315. }
  1316. /**
  1317. * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
  1318. * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
  1319. * @param DMA2Dx DMA2D Instance
  1320. * @retval State of bit (1 or 0).
  1321. */
  1322. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1323. {
  1324. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF));
  1325. }
  1326. /**
  1327. * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
  1328. * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
  1329. * @param DMA2Dx DMA2D Instance
  1330. * @retval State of bit (1 or 0).
  1331. */
  1332. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1333. {
  1334. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF));
  1335. }
  1336. /**
  1337. * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
  1338. * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
  1339. * @param DMA2Dx DMA2D Instance
  1340. * @retval State of bit (1 or 0).
  1341. */
  1342. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1343. {
  1344. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF));
  1345. }
  1346. /**
  1347. * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
  1348. * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
  1349. * @param DMA2Dx DMA2D Instance
  1350. * @retval State of bit (1 or 0).
  1351. */
  1352. __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1353. {
  1354. return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF));
  1355. }
  1356. /**
  1357. * @brief Clear DMA2D Configuration Error Interrupt Flag
  1358. * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
  1359. * @param DMA2Dx DMA2D Instance
  1360. * @retval None
  1361. */
  1362. __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
  1363. {
  1364. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
  1365. }
  1366. /**
  1367. * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
  1368. * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
  1369. * @param DMA2Dx DMA2D Instance
  1370. * @retval None
  1371. */
  1372. __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
  1373. {
  1374. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
  1375. }
  1376. /**
  1377. * @brief Clear DMA2D CLUT Access Error Interrupt Flag
  1378. * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
  1379. * @param DMA2Dx DMA2D Instance
  1380. * @retval None
  1381. */
  1382. __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
  1383. {
  1384. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
  1385. }
  1386. /**
  1387. * @brief Clear DMA2D Transfer Watermark Interrupt Flag
  1388. * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
  1389. * @param DMA2Dx DMA2D Instance
  1390. * @retval None
  1391. */
  1392. __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
  1393. {
  1394. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
  1395. }
  1396. /**
  1397. * @brief Clear DMA2D Transfer Complete Interrupt Flag
  1398. * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
  1399. * @param DMA2Dx DMA2D Instance
  1400. * @retval None
  1401. */
  1402. __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
  1403. {
  1404. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
  1405. }
  1406. /**
  1407. * @brief Clear DMA2D Transfer Error Interrupt Flag
  1408. * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
  1409. * @param DMA2Dx DMA2D Instance
  1410. * @retval None
  1411. */
  1412. __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
  1413. {
  1414. WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
  1415. }
  1416. /**
  1417. * @}
  1418. */
  1419. /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
  1420. * @{
  1421. */
  1422. /**
  1423. * @brief Enable Configuration Error Interrupt
  1424. * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
  1425. * @param DMA2Dx DMA2D Instance
  1426. * @retval None
  1427. */
  1428. __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1429. {
  1430. SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1431. }
  1432. /**
  1433. * @brief Enable CLUT Transfer Complete Interrupt
  1434. * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
  1435. * @param DMA2Dx DMA2D Instance
  1436. * @retval None
  1437. */
  1438. __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1439. {
  1440. SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1441. }
  1442. /**
  1443. * @brief Enable CLUT Access Error Interrupt
  1444. * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
  1445. * @param DMA2Dx DMA2D Instance
  1446. * @retval None
  1447. */
  1448. __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1449. {
  1450. SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1451. }
  1452. /**
  1453. * @brief Enable Transfer Watermark Interrupt
  1454. * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
  1455. * @param DMA2Dx DMA2D Instance
  1456. * @retval None
  1457. */
  1458. __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1459. {
  1460. SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1461. }
  1462. /**
  1463. * @brief Enable Transfer Complete Interrupt
  1464. * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
  1465. * @param DMA2Dx DMA2D Instance
  1466. * @retval None
  1467. */
  1468. __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1469. {
  1470. SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1471. }
  1472. /**
  1473. * @brief Enable Transfer Error Interrupt
  1474. * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
  1475. * @param DMA2Dx DMA2D Instance
  1476. * @retval None
  1477. */
  1478. __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1479. {
  1480. SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1481. }
  1482. /**
  1483. * @brief Disable Configuration Error Interrupt
  1484. * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
  1485. * @param DMA2Dx DMA2D Instance
  1486. * @retval None
  1487. */
  1488. __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
  1489. {
  1490. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
  1491. }
  1492. /**
  1493. * @brief Disable CLUT Transfer Complete Interrupt
  1494. * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
  1495. * @param DMA2Dx DMA2D Instance
  1496. * @retval None
  1497. */
  1498. __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1499. {
  1500. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
  1501. }
  1502. /**
  1503. * @brief Disable CLUT Access Error Interrupt
  1504. * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
  1505. * @param DMA2Dx DMA2D Instance
  1506. * @retval None
  1507. */
  1508. __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1509. {
  1510. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
  1511. }
  1512. /**
  1513. * @brief Disable Transfer Watermark Interrupt
  1514. * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
  1515. * @param DMA2Dx DMA2D Instance
  1516. * @retval None
  1517. */
  1518. __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
  1519. {
  1520. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
  1521. }
  1522. /**
  1523. * @brief Disable Transfer Complete Interrupt
  1524. * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
  1525. * @param DMA2Dx DMA2D Instance
  1526. * @retval None
  1527. */
  1528. __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
  1529. {
  1530. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
  1531. }
  1532. /**
  1533. * @brief Disable Transfer Error Interrupt
  1534. * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
  1535. * @param DMA2Dx DMA2D Instance
  1536. * @retval None
  1537. */
  1538. __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
  1539. {
  1540. CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
  1541. }
  1542. /**
  1543. * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
  1544. * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
  1545. * @param DMA2Dx DMA2D Instance
  1546. * @retval State of bit (1 or 0).
  1547. */
  1548. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
  1549. {
  1550. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE));
  1551. }
  1552. /**
  1553. * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
  1554. * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
  1555. * @param DMA2Dx DMA2D Instance
  1556. * @retval State of bit (1 or 0).
  1557. */
  1558. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
  1559. {
  1560. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE));
  1561. }
  1562. /**
  1563. * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
  1564. * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
  1565. * @param DMA2Dx DMA2D Instance
  1566. * @retval State of bit (1 or 0).
  1567. */
  1568. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
  1569. {
  1570. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE));
  1571. }
  1572. /**
  1573. * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
  1574. * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
  1575. * @param DMA2Dx DMA2D Instance
  1576. * @retval State of bit (1 or 0).
  1577. */
  1578. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
  1579. {
  1580. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE));
  1581. }
  1582. /**
  1583. * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
  1584. * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
  1585. * @param DMA2Dx DMA2D Instance
  1586. * @retval State of bit (1 or 0).
  1587. */
  1588. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
  1589. {
  1590. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE));
  1591. }
  1592. /**
  1593. * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
  1594. * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
  1595. * @param DMA2Dx DMA2D Instance
  1596. * @retval State of bit (1 or 0).
  1597. */
  1598. __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
  1599. {
  1600. return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE));
  1601. }
  1602. /**
  1603. * @}
  1604. */
  1605. #if defined(USE_FULL_LL_DRIVER)
  1606. /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
  1607. * @{
  1608. */
  1609. ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
  1610. ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1611. void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
  1612. void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx);
  1613. void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
  1614. void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct);
  1615. uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1616. uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1617. uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1618. uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
  1619. void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
  1620. /**
  1621. * @}
  1622. */
  1623. #endif /* USE_FULL_LL_DRIVER */
  1624. /**
  1625. * @}
  1626. */
  1627. /**
  1628. * @}
  1629. */
  1630. #endif /* defined (DMA2D) */
  1631. /**
  1632. * @}
  1633. */
  1634. #ifdef __cplusplus
  1635. }
  1636. #endif
  1637. #endif /* __STM32F4xx_LL_DMA2D_H */
  1638. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/