stm32f4xx_hal_pwr.h 16 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_pwr.h
  4. * @author MCD Application Team
  5. * @brief Header file of PWR HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  10. *
  11. * Redistribution and use in source and binary forms, with or without modification,
  12. * are permitted provided that the following conditions are met:
  13. * 1. Redistributions of source code must retain the above copyright notice,
  14. * this list of conditions and the following disclaimer.
  15. * 2. Redistributions in binary form must reproduce the above copyright notice,
  16. * this list of conditions and the following disclaimer in the documentation
  17. * and/or other materials provided with the distribution.
  18. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  19. * may be used to endorse or promote products derived from this software
  20. * without specific prior written permission.
  21. *
  22. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. ******************************************************************************
  34. */
  35. /* Define to prevent recursive inclusion -------------------------------------*/
  36. #ifndef __STM32F4xx_HAL_PWR_H
  37. #define __STM32F4xx_HAL_PWR_H
  38. #ifdef __cplusplus
  39. extern "C" {
  40. #endif
  41. /* Includes ------------------------------------------------------------------*/
  42. #include "stm32f4xx_hal_def.h"
  43. /** @addtogroup STM32F4xx_HAL_Driver
  44. * @{
  45. */
  46. /** @addtogroup PWR
  47. * @{
  48. */
  49. /* Exported types ------------------------------------------------------------*/
  50. /** @defgroup PWR_Exported_Types PWR Exported Types
  51. * @{
  52. */
  53. /**
  54. * @brief PWR PVD configuration structure definition
  55. */
  56. typedef struct
  57. {
  58. uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
  59. This parameter can be a value of @ref PWR_PVD_detection_level */
  60. uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
  61. This parameter can be a value of @ref PWR_PVD_Mode */
  62. }PWR_PVDTypeDef;
  63. /**
  64. * @}
  65. */
  66. /* Exported constants --------------------------------------------------------*/
  67. /** @defgroup PWR_Exported_Constants PWR Exported Constants
  68. * @{
  69. */
  70. /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
  71. * @{
  72. */
  73. #define PWR_WAKEUP_PIN1 0x00000100U
  74. /**
  75. * @}
  76. */
  77. /** @defgroup PWR_PVD_detection_level PWR PVD detection level
  78. * @{
  79. */
  80. #define PWR_PVDLEVEL_0 PWR_CR_PLS_LEV0
  81. #define PWR_PVDLEVEL_1 PWR_CR_PLS_LEV1
  82. #define PWR_PVDLEVEL_2 PWR_CR_PLS_LEV2
  83. #define PWR_PVDLEVEL_3 PWR_CR_PLS_LEV3
  84. #define PWR_PVDLEVEL_4 PWR_CR_PLS_LEV4
  85. #define PWR_PVDLEVEL_5 PWR_CR_PLS_LEV5
  86. #define PWR_PVDLEVEL_6 PWR_CR_PLS_LEV6
  87. #define PWR_PVDLEVEL_7 PWR_CR_PLS_LEV7/* External input analog voltage
  88. (Compare internally to VREFINT) */
  89. /**
  90. * @}
  91. */
  92. /** @defgroup PWR_PVD_Mode PWR PVD Mode
  93. * @{
  94. */
  95. #define PWR_PVD_MODE_NORMAL 0x00000000U /*!< basic mode is used */
  96. #define PWR_PVD_MODE_IT_RISING 0x00010001U /*!< External Interrupt Mode with Rising edge trigger detection */
  97. #define PWR_PVD_MODE_IT_FALLING 0x00010002U /*!< External Interrupt Mode with Falling edge trigger detection */
  98. #define PWR_PVD_MODE_IT_RISING_FALLING 0x00010003U /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
  99. #define PWR_PVD_MODE_EVENT_RISING 0x00020001U /*!< Event Mode with Rising edge trigger detection */
  100. #define PWR_PVD_MODE_EVENT_FALLING 0x00020002U /*!< Event Mode with Falling edge trigger detection */
  101. #define PWR_PVD_MODE_EVENT_RISING_FALLING 0x00020003U /*!< Event Mode with Rising/Falling edge trigger detection */
  102. /**
  103. * @}
  104. */
  105. /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
  106. * @{
  107. */
  108. #define PWR_MAINREGULATOR_ON 0x00000000U
  109. #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
  110. /**
  111. * @}
  112. */
  113. /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
  114. * @{
  115. */
  116. #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01)
  117. #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02)
  118. /**
  119. * @}
  120. */
  121. /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
  122. * @{
  123. */
  124. #define PWR_STOPENTRY_WFI ((uint8_t)0x01)
  125. #define PWR_STOPENTRY_WFE ((uint8_t)0x02)
  126. /**
  127. * @}
  128. */
  129. /** @defgroup PWR_Flag PWR Flag
  130. * @{
  131. */
  132. #define PWR_FLAG_WU PWR_CSR_WUF
  133. #define PWR_FLAG_SB PWR_CSR_SBF
  134. #define PWR_FLAG_PVDO PWR_CSR_PVDO
  135. #define PWR_FLAG_BRR PWR_CSR_BRR
  136. #define PWR_FLAG_VOSRDY PWR_CSR_VOSRDY
  137. /**
  138. * @}
  139. */
  140. /**
  141. * @}
  142. */
  143. /* Exported macro ------------------------------------------------------------*/
  144. /** @defgroup PWR_Exported_Macro PWR Exported Macro
  145. * @{
  146. */
  147. /** @brief Check PWR flag is set or not.
  148. * @param __FLAG__ specifies the flag to check.
  149. * This parameter can be one of the following values:
  150. * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
  151. * was received from the WKUP pin or from the RTC alarm (Alarm A
  152. * or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
  153. * An additional wakeup event is detected if the WKUP pin is enabled
  154. * (by setting the EWUP bit) when the WKUP pin level is already high.
  155. * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
  156. * resumed from StandBy mode.
  157. * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
  158. * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
  159. * For this reason, this bit is equal to 0 after Standby or reset
  160. * until the PVDE bit is set.
  161. * @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
  162. * when the device wakes up from Standby mode or by a system reset
  163. * or power reset.
  164. * @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
  165. * scaling output selection is ready.
  166. * @retval The new state of __FLAG__ (TRUE or FALSE).
  167. */
  168. #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
  169. /** @brief Clear the PWR's pending flags.
  170. * @param __FLAG__ specifies the flag to clear.
  171. * This parameter can be one of the following values:
  172. * @arg PWR_FLAG_WU: Wake Up flag
  173. * @arg PWR_FLAG_SB: StandBy flag
  174. */
  175. #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U)
  176. /**
  177. * @brief Enable the PVD Exti Line 16.
  178. * @retval None.
  179. */
  180. #define __HAL_PWR_PVD_EXTI_ENABLE_IT() (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
  181. /**
  182. * @brief Disable the PVD EXTI Line 16.
  183. * @retval None.
  184. */
  185. #define __HAL_PWR_PVD_EXTI_DISABLE_IT() (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
  186. /**
  187. * @brief Enable event on PVD Exti Line 16.
  188. * @retval None.
  189. */
  190. #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
  191. /**
  192. * @brief Disable event on PVD Exti Line 16.
  193. * @retval None.
  194. */
  195. #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
  196. /**
  197. * @brief Enable the PVD Extended Interrupt Rising Trigger.
  198. * @retval None.
  199. */
  200. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
  201. /**
  202. * @brief Disable the PVD Extended Interrupt Rising Trigger.
  203. * @retval None.
  204. */
  205. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
  206. /**
  207. * @brief Enable the PVD Extended Interrupt Falling Trigger.
  208. * @retval None.
  209. */
  210. #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
  211. /**
  212. * @brief Disable the PVD Extended Interrupt Falling Trigger.
  213. * @retval None.
  214. */
  215. #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
  216. /**
  217. * @brief PVD EXTI line configuration: set rising & falling edge trigger.
  218. * @retval None.
  219. */
  220. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\
  221. __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\
  222. }while(0U)
  223. /**
  224. * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
  225. * This parameter can be:
  226. * @retval None.
  227. */
  228. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\
  229. __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\
  230. }while(0U)
  231. /**
  232. * @brief checks whether the specified PVD Exti interrupt flag is set or not.
  233. * @retval EXTI PVD Line Status.
  234. */
  235. #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR & (PWR_EXTI_LINE_PVD))
  236. /**
  237. * @brief Clear the PVD Exti flag.
  238. * @retval None.
  239. */
  240. #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() (EXTI->PR = (PWR_EXTI_LINE_PVD))
  241. /**
  242. * @brief Generates a Software interrupt on PVD EXTI line.
  243. * @retval None
  244. */
  245. #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
  246. /**
  247. * @}
  248. */
  249. /* Include PWR HAL Extension module */
  250. #include "stm32f4xx_hal_pwr_ex.h"
  251. /* Exported functions --------------------------------------------------------*/
  252. /** @addtogroup PWR_Exported_Functions PWR Exported Functions
  253. * @{
  254. */
  255. /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
  256. * @{
  257. */
  258. /* Initialization and de-initialization functions *****************************/
  259. void HAL_PWR_DeInit(void);
  260. void HAL_PWR_EnableBkUpAccess(void);
  261. void HAL_PWR_DisableBkUpAccess(void);
  262. /**
  263. * @}
  264. */
  265. /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
  266. * @{
  267. */
  268. /* Peripheral Control functions **********************************************/
  269. /* PVD configuration */
  270. void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
  271. void HAL_PWR_EnablePVD(void);
  272. void HAL_PWR_DisablePVD(void);
  273. /* WakeUp pins configuration */
  274. void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
  275. void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
  276. /* Low Power modes entry */
  277. void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
  278. void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
  279. void HAL_PWR_EnterSTANDBYMode(void);
  280. /* Power PVD IRQ Handler */
  281. void HAL_PWR_PVD_IRQHandler(void);
  282. void HAL_PWR_PVDCallback(void);
  283. /* Cortex System Control functions *******************************************/
  284. void HAL_PWR_EnableSleepOnExit(void);
  285. void HAL_PWR_DisableSleepOnExit(void);
  286. void HAL_PWR_EnableSEVOnPend(void);
  287. void HAL_PWR_DisableSEVOnPend(void);
  288. /**
  289. * @}
  290. */
  291. /**
  292. * @}
  293. */
  294. /* Private types -------------------------------------------------------------*/
  295. /* Private variables ---------------------------------------------------------*/
  296. /* Private constants ---------------------------------------------------------*/
  297. /** @defgroup PWR_Private_Constants PWR Private Constants
  298. * @{
  299. */
  300. /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
  301. * @{
  302. */
  303. #define PWR_EXTI_LINE_PVD ((uint32_t)EXTI_IMR_MR16) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
  304. /**
  305. * @}
  306. */
  307. /** @defgroup PWR_register_alias_address PWR Register alias address
  308. * @{
  309. */
  310. /* ------------- PWR registers bit address in the alias region ---------------*/
  311. #define PWR_OFFSET (PWR_BASE - PERIPH_BASE)
  312. #define PWR_CR_OFFSET 0x00U
  313. #define PWR_CSR_OFFSET 0x04U
  314. #define PWR_CR_OFFSET_BB (PWR_OFFSET + PWR_CR_OFFSET)
  315. #define PWR_CSR_OFFSET_BB (PWR_OFFSET + PWR_CSR_OFFSET)
  316. /**
  317. * @}
  318. */
  319. /** @defgroup PWR_CR_register_alias PWR CR Register alias address
  320. * @{
  321. */
  322. /* --- CR Register ---*/
  323. /* Alias word address of DBP bit */
  324. #define DBP_BIT_NUMBER PWR_CR_DBP_Pos
  325. #define CR_DBP_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U))
  326. /* Alias word address of PVDE bit */
  327. #define PVDE_BIT_NUMBER PWR_CR_PVDE_Pos
  328. #define CR_PVDE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U))
  329. /* Alias word address of VOS bit */
  330. #define VOS_BIT_NUMBER PWR_CR_VOS_Pos
  331. #define CR_VOS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (VOS_BIT_NUMBER * 4U))
  332. /**
  333. * @}
  334. */
  335. /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
  336. * @{
  337. */
  338. /* --- CSR Register ---*/
  339. /* Alias word address of EWUP bit */
  340. #define EWUP_BIT_NUMBER PWR_CSR_EWUP_Pos
  341. #define CSR_EWUP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U))
  342. /**
  343. * @}
  344. */
  345. /**
  346. * @}
  347. */
  348. /* Private macros ------------------------------------------------------------*/
  349. /** @defgroup PWR_Private_Macros PWR Private Macros
  350. * @{
  351. */
  352. /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
  353. * @{
  354. */
  355. #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
  356. ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
  357. ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
  358. ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
  359. #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
  360. ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
  361. ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
  362. ((MODE) == PWR_PVD_MODE_NORMAL))
  363. #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
  364. ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
  365. #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
  366. #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
  367. /**
  368. * @}
  369. */
  370. /**
  371. * @}
  372. */
  373. /**
  374. * @}
  375. */
  376. /**
  377. * @}
  378. */
  379. #ifdef __cplusplus
  380. }
  381. #endif
  382. #endif /* __STM32F4xx_HAL_PWR_H */
  383. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/