ChassisDevice.c 42 KB

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  1. /*****************************************************************
  2. *****************************************************************
  3. *** **
  4. *** (C)Copyright 2005-2006, American Megatrends Inc. **
  5. *** **
  6. *** All Rights Reserved. **
  7. *** **
  8. *** 6145-F, Northbelt Parkway, Norcross, **
  9. *** **
  10. *** Georgia - 30071, USA. Phone-(770)-246-8600. **
  11. *** **
  12. *****************************************************************
  13. *****************************************************************
  14. ******************************************************************
  15. *
  16. * ChassisDevice.c
  17. * Chassis commands
  18. *
  19. * Author: Rama Bisa <ramab@ami.com>
  20. *
  21. ******************************************************************/
  22. #include <string.h>
  23. #include "com_IPMI_ChassisDevice.h"
  24. #include "ChassisDevice.h"
  25. #include "ChassisTimerTask.h"
  26. #include "Support.h"
  27. #include "main.h"
  28. #include "message.h"
  29. /* Reserved bit macro definitions */
  30. #define RESERVED_BITS_CHASSISCONTROL 0xF0 //(BIT7 | BIT6 | BIT5 |BIT4)
  31. #define RESERVED_BITS_GETCHASSISIDENTIFY 0xFE //(BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)
  32. #define RESERVED_BITS_SETCHASSISCAPS 0xFC //(BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2)
  33. #define RESERVED_BITS_SETPOWERRESTOREPOLICY 0xFC //(BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2)
  34. #define RESERVED_BITS_SETFPBUTTONENABLES 0xF0 //(BIT7 | BIT6 | BIT5 | BIT4)
  35. #if CHASSIS_DEVICE == 1
  36. /*** Local Definitions ***/
  37. #define PRP_ALWAYS_POWEROFF_SUPPORT 0x01
  38. #define PRP_LAST_STATE_SUPPORT 0x02
  39. #define PRP_ALWAYS_POWERON_SUPPORT 0x04
  40. #define CHASSIS_AMI_OEM_PARAM 96
  41. #define CHASSIS_SET_INPROG 0x00
  42. #define CHASSIS_SERVICE_PART_SEL 0x01
  43. #define CHASSIS_SERVICE_PART_SCAN 0x02
  44. #define CHASSIS_BOOT_FLAG_VALID_BIT_CLEAR 0x03
  45. #define CHASSIS_BOOT_INFO_ACK 0x04
  46. #define CHASSIS_BOOT_FLAGS 0x05
  47. #define CHASSIS_BOOT_INITIATOR_INFO 0x06
  48. #define CHASSIS_BOOT_INITIATOR_MBOX 0x07
  49. #define CHASSIS_AMI_OEM_PARAM 96
  50. #define SSICB_OEM_PARAM_BLK_SIZE_TBL 0x78
  51. #define SSICB_BOOT_ORDER_TBL 0x7D
  52. #define SSICB_BOOT_DEV_SELECTOR 0x7E
  53. #define SSICB_SLOT_CONFIG_TBL 0x7F
  54. #define ROLLBACK_OPTION 0x00
  55. /* Mask Bits */
  56. #define BIT5_BIT2_MASK 0x3C
  57. #define BIT6_BIT5_MASK 0x60
  58. #define BIT1_BIT0_MASK 0x03
  59. /* Reserved Bits */
  60. #define RESERVED_VALUE_03 0x03
  61. #define RESERVED_VALUE_10 0x10
  62. #define RESERVED_VALUE_20 0x20
  63. #define RESERVED_VALUE_28 0x28
  64. #define RESERVED_VALUE_30 0x30
  65. #define RESERVED_VALUE_34 0x34
  66. #define RESERVED_VALUE_38 0x38
  67. #define RESERVED_VALUE_40 0x40
  68. #define RESERVED_VALUE_60 0x60
  69. #define RESERVED_VALUE_80 0x80
  70. ///*** Module Varibales ***/
  71. //static const uint8_t m_BootOptParamLen [] = /**< Boot Options parameter length */
  72. //{
  73. // 0x01, /**< Set in progress byte length */
  74. // 0x01, /**< Service Partition selector length */
  75. // 0x01, /**< Service Partition scan length */
  76. // 0x01, /**< Boot flag valid bit length */
  77. // sizeof(BootInfoAck_T), /**< Boot info ack length */
  78. // sizeof(BootFlags_T), /**< Boot Flags valid length */
  79. // sizeof(BootInitiatorInfo_T), /**< Boot init info length */
  80. // sizeof(BootInitiatorMboxReq_T), /**< Boot init info length */
  81. //};
  82. //static const uint8_t m_SSIBootOptParamLen [] = /**< SSI Boot Options parameter length */
  83. //{
  84. // sizeof(OemParamBlkSizeTbl_T), /* OEM Parameter Block Size Table length */
  85. // 0x0, /* Reserved */
  86. // 0x0, /* Reserved */
  87. // 0x0, /* Reserved */
  88. // 0x0, /* Reserved */
  89. // sizeof(BootOrderTblReq_T), /* Boot Order Table length */
  90. // sizeof(uint8_t), /* SSI Boot Device Selector length*/
  91. // sizeof(SlotConfigTbl_T) /* Slot Configuration Table length */
  92. //};
  93. #define MAX_BOOT_PARAMS_DATA 20
  94. typedef struct
  95. {
  96. uint8_t Params;
  97. uint8_t ReservedBits [MAX_BOOT_PARAMS_DATA];
  98. uint8_t DataLen;
  99. } BootCfgRsvdBits_T;
  100. //static BootCfgRsvdBits_T m_RsvdBitsCheck [] = {
  101. // /* Param Reserved Bits Data Size */
  102. // { 0, { 0xFC }, 0x1 }, /* Set In progress */
  103. // { 2, { 0xFC }, 0x1 },
  104. // { 3, { 0xE0 }, 0x1 },
  105. // { 5, { 0x1F,0x00,0x00,0xF0,0xE0}, 0x5 },
  106. // { 6, { 0xF0 }, 0x1 }
  107. //};
  108. /*-------------------------------------
  109. * GetChassisCaps
  110. *-------------------------------------*/
  111. int
  112. GetChassisCaps ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  113. {
  114. GetChassisCapabilitiesRes_T* pGetChassisCapsRes = ( GetChassisCapabilitiesRes_T*) pRes;
  115. printf("GetChassisCaps not implement\r\n");
  116. pGetChassisCapsRes->CompletionCode = CC_NORMAL;
  117. memcpy ( ( uint8_t*)&pGetChassisCapsRes->ChassisCapabilities,
  118. ( uint8_t*)&g_BMCInfo.IpmiConfig.ChassisCapabilities,
  119. sizeof(ChassisCapabilities_T) );
  120. return sizeof(GetChassisCapabilitiesRes_T);
  121. }
  122. /*-------------------------------------
  123. * GetChassisStatus
  124. *-------------------------------------*/
  125. int
  126. GetChassisStatus ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  127. {
  128. GetChassisStatusRes_T* pGetChassisStatusRes =
  129. ( GetChassisStatusRes_T*) pRes;
  130. pGetChassisStatusRes->CompletionCode = CC_NORMAL;
  131. memcpy ( ( uint8_t*)&pGetChassisStatusRes->ChassisPowerState,
  132. ( uint8_t*)&g_BMCInfo.IpmiConfig.ChassisPowerState,
  133. sizeof(ChassisPowerState_T));
  134. return sizeof (GetChassisStatusRes_T) ;
  135. }
  136. /*-------------------------------------
  137. * ChassisControl
  138. *-------------------------------------*/
  139. int
  140. ChassisControl ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes )
  141. {
  142. ChassisControlReq_T* pChassisControlReq =
  143. ( ChassisControlReq_T*) pReq;
  144. ChassisControlRes_T* pChassisControlRes =
  145. ( ChassisControlRes_T*) pRes;
  146. MsgPkt_T MsgPkt;
  147. pChassisControlRes->CompletionCode = CC_NORMAL;
  148. /* Check for the reserved bytes should b zero */
  149. if ( 0 != (pChassisControlReq->ChassisControl & RESERVED_BITS_CHASSISCONTROL ) )
  150. {
  151. pChassisControlRes->CompletionCode = CC_INV_DATA_FIELD;
  152. return sizeof(uint8_t);
  153. }
  154. switch (pChassisControlReq->ChassisControl & 0x0F )
  155. {
  156. case CHASSIS_POWER_DOWN:
  157. //printf ("Chassis IS GOING FOR POWER_DOWN\n");
  158. MsgPkt.Param = PARAM_CHASSIS;
  159. MsgPkt.NetFnLUN = 0x00<<2;
  160. MsgPkt.Cmd = 0x02;
  161. MsgPkt.Data[0] = CHASSIS_POWER_DOWN;
  162. PostMsg(gFd_ChassisPwrHndlrQue, &MsgPkt);
  163. // g_BMCInfo.HostOFFStopWDT = TRUE ;
  164. g_BMCInfo.IpmiConfig.SysRestartCause = RESTART_CAUSE_CHASSIS_CTRL;
  165. // OnSetRestartCause(g_BMCInfo.ChassisConfig.SysRestartCause, TRUE,BMCInst);
  166. // g_BMCInfo.Msghndlr.ChassisControl= CHASSIS_POWER_DOWN;
  167. break;
  168. case CHASSIS_POWER_UP:
  169. //printf ("Chassis IS GOING FOR POWER UP\n");
  170. MsgPkt.Param = PARAM_CHASSIS;
  171. MsgPkt.NetFnLUN = 0x00<<2;
  172. MsgPkt.Cmd = 0x02;
  173. MsgPkt.Data[0] = CHASSIS_POWER_UP;
  174. PostMsg(gFd_ChassisPwrHndlrQue, &MsgPkt);
  175. g_BMCInfo.IpmiConfig.SysRestartCause = RESTART_CAUSE_CHASSIS_CTRL;
  176. // OnSetRestartCause(g_BMCInfo.ChassisConfig.SysRestartCause, TRUE,BMCInst);
  177. // g_BMCInfo.Msghndlr.ChassisControl = CHASSIS_POWER_UP;
  178. // /* Set Last Power Event through IPMI Command */
  179. // if(g_PDKHandle[PDK_SETLASTPOWEREVENT] != NULL)
  180. // {
  181. // ((void(*)(uint8_t,int))g_PDKHandle[PDK_SETLASTPOWEREVENT]) (PDK_LAST_POWER_ON_VIA_IPMI,BMCInst);
  182. // }
  183. break;
  184. case CHASSIS_POWER_CYCLE:
  185. //printf ("Chassis IS GOING FOR POWER CYCLE\n");
  186. MsgPkt.Param = PARAM_CHASSIS;
  187. MsgPkt.NetFnLUN = 0x00<<2;
  188. MsgPkt.Cmd = 0x02;
  189. MsgPkt.Data[0] = CHASSIS_POWER_CYCLE;
  190. PostMsg(gFd_ChassisPwrHndlrQue, &MsgPkt);
  191. g_BMCInfo.IpmiConfig.SysRestartCause = RESTART_CAUSE_CHASSIS_CTRL;
  192. // OnSetRestartCause(g_BMCInfo.ChassisConfig.SysRestartCause, TRUE,BMCInst);
  193. // g_BMCInfo.Msghndlr.ChassisControl = CHASSIS_POWER_CYCLE;
  194. // /* Set Last Power Event through IPMI Command */
  195. // if(g_PDKHandle[PDK_SETLASTPOWEREVENT] != NULL)
  196. // {
  197. // ((void(*)(uint8_t,int))g_PDKHandle[PDK_SETLASTPOWEREVENT]) (PDK_LAST_POWER_ON_VIA_IPMI,BMCInst);
  198. // }
  199. break;
  200. case CHASSIS_HARD_RESET:
  201. //printf ("Chassis IS GOING FOR HARD RESET");
  202. MsgPkt.Param = PARAM_CHASSIS;
  203. MsgPkt.NetFnLUN = 0x00<<2;
  204. MsgPkt.Cmd = 0x02;
  205. MsgPkt.Data[0] = CHASSIS_HARD_RESET;
  206. PostMsg(gFd_ChassisPwrHndlrQue, &MsgPkt);
  207. g_BMCInfo.IpmiConfig.SysRestartCause = RESTART_CAUSE_CHASSIS_CTRL;
  208. // OnSetRestartCause(g_BMCInfo.ChassisConfig.SysRestartCause, TRUE,BMCInst);
  209. // g_BMCInfo.Msghndlr.ChassisControl = CHASSIS_HARD_RESET;
  210. break;
  211. case CHASSIS_PULSE_DIAGNOSTIC_INTERRUPT:
  212. //printf ("Chassis IS GOING FOR DIAG INT\n");
  213. MsgPkt.Param = PARAM_CHASSIS;
  214. MsgPkt.NetFnLUN = 0x00<<2;
  215. MsgPkt.Cmd = 0x02;
  216. MsgPkt.Data[0] = CHASSIS_PULSE_DIAGNOSTIC_INTERRUPT;
  217. PostMsg(gFd_ChassisPwrHndlrQue, &MsgPkt);
  218. //Platform_HostDiagInt ();
  219. break;
  220. case CHASSIS_SOFT_SHUTDOWN:
  221. //printf ("Chassis IS GOING FOR SOFT SHUTDOWN\n");
  222. MsgPkt.Param = PARAM_CHASSIS;
  223. MsgPkt.NetFnLUN = 0x00<<2;
  224. MsgPkt.Cmd = 0x02;
  225. MsgPkt.Data[0] = CHASSIS_SOFT_SHUTDOWN;
  226. PostMsg(gFd_ChassisPwrHndlrQue, &MsgPkt);
  227. //Platform_HostSoftShutDown (BMCInst);
  228. break;
  229. default:
  230. printf ("UNKNOWN Chassis CONTROL REQUEST \r\n");
  231. pChassisControlRes->CompletionCode = CC_INV_DATA_FIELD;
  232. break;
  233. }
  234. UpdateFlash();
  235. return sizeof (ChassisControlRes_T);
  236. }
  237. /*-------------------------------------
  238. * GetChassisIdentify
  239. *-------------------------------------*/
  240. int
  241. GetChassisIdentify ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  242. {
  243. ChassisIdentifyReq_T* pChassisIdentifyReq =
  244. ( ChassisIdentifyReq_T*) pReq;
  245. ChassisIdentifyRes_T* pChassisIdentifyRes =
  246. ( ChassisIdentifyRes_T*) pRes;
  247. if (ReqLen <= sizeof(ChassisIdentifyReq_T))
  248. {
  249. if (0 != ReqLen)
  250. {
  251. g_BMCInfo.ChassisIdentifyForce = 0;
  252. g_BMCInfo.ChassisIdentifyTimeout = pChassisIdentifyReq->IdentifyInterval;
  253. }
  254. else
  255. {
  256. g_BMCInfo.ChassisIdentifyForce = 0;
  257. g_BMCInfo.ChassisIdentifyTimeout = 15;
  258. }
  259. if (ReqLen == 2)
  260. {
  261. /* Check for the reserved bytes should b zero */
  262. if ( 0 != (pChassisIdentifyReq->ForceIdentify & RESERVED_BITS_GETCHASSISIDENTIFY ) )
  263. {
  264. pChassisIdentifyRes->CompletionCode = CC_INV_DATA_FIELD;
  265. return sizeof(uint8_t);
  266. }
  267. if(pChassisIdentifyReq->ForceIdentify & 1)
  268. {
  269. g_BMCInfo.ChassisIdentifyTimeout = 0;
  270. g_BMCInfo.ChassisIdentifyForce = 1;
  271. }
  272. else
  273. {
  274. g_BMCInfo.ChassisIdentifyForce = 0;
  275. }
  276. }
  277. g_BMCInfo.ChassisIdentify = TRUE;
  278. pChassisIdentifyRes->CompletionCode = CC_NORMAL;
  279. }
  280. else
  281. {
  282. pChassisIdentifyRes->CompletionCode = CC_REQ_INV_LEN;
  283. }
  284. return sizeof(ChassisIdentifyRes_T);
  285. }
  286. /*-------------------------------------
  287. * SetChassisCaps
  288. *-------------------------------------*/
  289. int
  290. SetChassisCaps ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  291. {
  292. SetChassisCapabilitiesReq_T* pSetChassisCapsReq =
  293. ( SetChassisCapabilitiesReq_T*) pReq;
  294. SetChassisCapabilitiesRes_T* pSetChassisCapsRes =
  295. ( SetChassisCapabilitiesRes_T*) pRes;
  296. //printf ("SET Chassis CAPABILITIES\n");
  297. /* Check for the reserved bytes should b zero */
  298. if ( 0 != (pSetChassisCapsReq->ChassisCaps.CapabilitiesFlags & RESERVED_BITS_SETCHASSISCAPS ) )
  299. {
  300. pSetChassisCapsRes->CompletionCode = CC_INV_DATA_FIELD;
  301. return sizeof(uint8_t);
  302. }
  303. if ((ReqLen != 5) &&
  304. (ReqLen != sizeof(SetChassisCapabilitiesReq_T)))
  305. {
  306. pSetChassisCapsRes->CompletionCode= CC_REQ_INV_LEN;
  307. return sizeof(SetChassisCapabilitiesRes_T);
  308. }
  309. if((pSetChassisCapsReq->ChassisCaps.CapabilitiesFlags & 0xFC ) != 0)
  310. {
  311. pSetChassisCapsRes->CompletionCode= CC_INV_DATA_FIELD;
  312. return sizeof(SetChassisCapabilitiesRes_T);
  313. }
  314. memcpy (( uint8_t*) &g_BMCInfo.IpmiConfig.ChassisCapabilities,
  315. ( uint8_t*) &pSetChassisCapsReq->ChassisCaps,
  316. sizeof(ChassisCapabilities_T));
  317. UpdateFlash();
  318. pSetChassisCapsRes->CompletionCode = CC_NORMAL;
  319. return sizeof (SetChassisCapabilitiesRes_T);
  320. }
  321. /*-------------------------------------
  322. * SetPowerRestorePolicy
  323. *-------------------------------------*/
  324. int
  325. SetPowerRestorePolicy ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  326. {
  327. SetPowerRestorePolicyReq_T* pSetPowerRestorePolicyReq =
  328. ( SetPowerRestorePolicyReq_T*) pReq;
  329. SetPowerRestorePolicyRes_T* pSetPowerRestorePolicyRes =
  330. ( SetPowerRestorePolicyRes_T*) pRes;
  331. printf ("\nSET POWER RESORE POLICY\r\n");
  332. /* Check for the reserved bytes should b zero */
  333. if ( 0 != ( pSetPowerRestorePolicyReq->PowerRestorePolicy & RESERVED_BITS_SETPOWERRESTOREPOLICY ))
  334. {
  335. pSetPowerRestorePolicyRes->CompletionCode = CC_INV_DATA_FIELD;
  336. return sizeof (uint8_t);
  337. }
  338. // 011b = no change to the current power restore policy
  339. if (pSetPowerRestorePolicyReq->PowerRestorePolicy != 0x03)
  340. {
  341. g_BMCInfo.IpmiConfig.PowerRestorePolicy =
  342. pSetPowerRestorePolicyReq->PowerRestorePolicy & 0x07;
  343. g_BMCInfo.IpmiConfig.ChassisPowerState.PowerState &= ~0x60;
  344. g_BMCInfo.IpmiConfig.ChassisPowerState.PowerState |= (pSetPowerRestorePolicyReq->PowerRestorePolicy << 5);
  345. UpdateFlash();
  346. }
  347. pSetPowerRestorePolicyRes->CompletionCode = CC_NORMAL;
  348. pSetPowerRestorePolicyRes->PowerRestorePolicy = PRP_ALWAYS_POWEROFF_SUPPORT |
  349. PRP_LAST_STATE_SUPPORT |
  350. PRP_ALWAYS_POWERON_SUPPORT;
  351. return sizeof(SetPowerRestorePolicyRes_T);
  352. }
  353. /*-------------------------------------
  354. * GetSysRestartCause
  355. *-------------------------------------*/
  356. int
  357. GetSysRestartCause ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  358. {
  359. GetSystemRestartCauseRes_T* pGetSysRestartCauseRes =
  360. ( GetSystemRestartCauseRes_T*) pRes;
  361. uint8_t *curchannel = 0;
  362. //printf ("GET SYSTEM RESTART CAUSE\n");
  363. pGetSysRestartCauseRes->CompletionCode = CC_NORMAL;
  364. pGetSysRestartCauseRes->SysRestartCause = g_BMCInfo.IpmiConfig.SysRestartCause;
  365. pGetSysRestartCauseRes->ChannelID = *curchannel & 0xF;
  366. return sizeof(GetSystemRestartCauseRes_T);
  367. }
  368. /*-------------------------------------
  369. * GetPOHCounter
  370. *-------------------------------------*/
  371. int
  372. GetPOHCounter ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  373. {
  374. //TODO: POHCounterReading unit is hour or minutes or second?
  375. GetPOHCounterRes_T* pGetPOHCounterRes = ( GetPOHCounterRes_T*) pRes;
  376. //printf ("GET POH COUNTER\r\n");
  377. pGetPOHCounterRes->CompletionCode = CC_NORMAL;
  378. pGetPOHCounterRes->MinutesPerCount = POH_MINS_PER_COUNT;
  379. pGetPOHCounterRes->POHCounterReading = (g_BMCInfo.BootValidMinutes/60);
  380. return sizeof(GetPOHCounterRes_T);
  381. }
  382. /*-------------------------------------
  383. * SetSysBOOTOptions
  384. *-------------------------------------*/
  385. int
  386. SetSysBOOTOptions ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  387. {
  388. printf("SetSysBOOTOptions not implement\r\n");
  389. // SetBootOptionsReq_T* pBootOptReq = ( SetBootOptionsReq_T*) pReq;
  390. // SetBootOptionsRes_T* pBootOptRes = ( SetBootOptionsRes_T*) pRes;
  391. // BMCInfo_t *pBMCInfo = &g_BMCInfo;
  392. // uint8_t Parameter;
  393. // BootOptions_T* pBootOptions;
  394. // uint8_t u8SetInProgress;
  395. // uint8_t u8TempData,SSIComputeBladeSupport;
  396. // int i,j=0;
  397. // Parameter = pBootOptReq->ParamValidCumParam & 0x7F;
  398. // SSIComputeBladeSupport = g_corefeatures.ssi_support;
  399. // /*Check for validity of parameter */
  400. // if(SSIComputeBladeSupport)
  401. // {
  402. // if ((Parameter >= sizeof (m_BootOptParamLen)) && (Parameter != CHASSIS_AMI_OEM_PARAM) &&
  403. // (Parameter != SSICB_OEM_PARAM_BLK_SIZE_TBL) && (Parameter < SSICB_BOOT_ORDER_TBL || Parameter > SSICB_SLOT_CONFIG_TBL))
  404. // {
  405. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  406. // return sizeof (SetBootOptionsRes_T);
  407. // }
  408. // }
  409. // else
  410. // {
  411. // if ((Parameter >= sizeof (m_BootOptParamLen)) && (Parameter != CHASSIS_AMI_OEM_PARAM))
  412. // {
  413. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  414. // return sizeof (SetBootOptionsRes_T);
  415. // }
  416. // }
  417. // /*Check if ReqLen valid for OEM Parameter */
  418. // if (CHASSIS_AMI_OEM_PARAM == Parameter)
  419. // {
  420. // if ((ReqLen - 1) != sizeof (AMI_BootOpt_T))
  421. // {
  422. // pBootOptRes->CompletionCode= CC_REQ_INV_LEN;
  423. // return sizeof (uint8_t);
  424. // }
  425. // }
  426. // else if (Parameter >= SSICB_OEM_PARAM_BLK_SIZE_TBL && Parameter <= SSICB_SLOT_CONFIG_TBL)
  427. // {
  428. // if(SSIComputeBladeSupport)
  429. // {
  430. // if ((ReqLen - 1) != m_SSIBootOptParamLen[Parameter-SSICB_OEM_PARAM_BLK_SIZE_TBL])
  431. // {
  432. // pBootOptRes->CompletionCode= CC_REQ_INV_LEN;
  433. // return sizeof (uint8_t);
  434. // }
  435. // }
  436. // }
  437. // else
  438. // {
  439. // /*Check if valid message length */
  440. // //if ( ((ReqLen - 1) != m_BootOptParamLen[Parameter]) && (ReqLen != sizeof (Parameter)))
  441. // if ((ReqLen - 1) != m_BootOptParamLen[Parameter])
  442. // {
  443. // pBootOptRes->CompletionCode= CC_REQ_INV_LEN;
  444. // return sizeof (uint8_t);
  445. // }
  446. // }
  447. //#if 0
  448. // Bit is 1 - Parameter is locked
  449. // Bit is 0 - Parameter is unlocked
  450. //if locked
  451. // if no req to unlock then return invalid
  452. // if req to unlock then unlock and procced
  453. //else
  454. // Proceed
  455. //#endif
  456. // /* Check for Reserved Bits */
  457. // for (i = 0; i < sizeof (m_RsvdBitsCheck)/ sizeof (m_RsvdBitsCheck[0]); i++)
  458. // {
  459. // /* Check if this Parameter Selector needs Reserved bit checking !! */
  460. // if (m_RsvdBitsCheck[i].Params == Parameter)
  461. // {
  462. // //IPMI_DBG_PRINT_2 ("Param - %x, DataLen - %x\n", pSetLanReq->ParameterSelect, m_RsvdBitsCheck[i].DataLen);
  463. // for (j = 0; j < m_RsvdBitsCheck[i].DataLen; j++)
  464. // {
  465. // // IPMI_DBG_PRINT_2 ("Cmp %x, %x\n", pReq[2+j], m_RsvdBitsCheck[i].ReservedBits[j]);
  466. // if ( 0 != (pReq[1+j] & m_RsvdBitsCheck[i].ReservedBits[j]))
  467. // {
  468. // /* Alarm !!! Somebody is trying to set Reseved Bits */
  469. // *pRes = CC_INV_DATA_FIELD;
  470. // return sizeof (*pRes);
  471. // }
  472. // }
  473. // }
  474. // }
  475. // OS_THREAD_MUTEX_ACQUIRE(&g_BMCInfo.ChassisMutex, WAIT_INFINITE);
  476. // pBootOptions = &(BMC_GET_SHARED_MEM(BMCInst)->sBootOptions);
  477. // u8SetInProgress = pBootOptions->u8SetInProgress;
  478. // /* if locked */
  479. // if (pBootOptions->ParameterValid & (1 << Parameter) )
  480. // {
  481. // /*if not req to unlock */
  482. // if (0 != (pBootOptReq->ParamValidCumParam & 0x80))
  483. // {
  484. // pBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  485. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  486. // return sizeof (uint8_t);
  487. // }
  488. // }
  489. //
  490. // /*Check for valid bit settings */
  491. // if (0 != (pBootOptReq->ParamValidCumParam & 0x80))
  492. // {
  493. // /* The valid bit for parameters 0 - 7 are SET/RESET to
  494. // * corresponding bits 0-7 in ParameterValid field
  495. // */
  496. // pBootOptions->ParameterValid |= (1 << Parameter);
  497. // }
  498. // else
  499. // {
  500. // pBootOptions->ParameterValid &= ~(1 << Parameter);
  501. // }
  502. // /*if only the parameter byte is provided then exit */
  503. // if (ReqLen == sizeof (Parameter))
  504. // {
  505. // pBootOptRes->CompletionCode = CC_NORMAL;
  506. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  507. // return sizeof (SetBootOptionsRes_T);
  508. // }
  509. // switch (Parameter)
  510. // {
  511. // case CHASSIS_SET_INPROG:
  512. // /* Commit Write is optional and supported
  513. // * only if rollback is supported */
  514. // if ( (BMC_BOOT_OPTION_SET_IN_PROGRESS != pBootOptReq->BootParam.SetInProgress) &&
  515. // (BMC_BOOT_OPTION_SET_COMPLETE != pBootOptReq->BootParam.SetInProgress) )
  516. // {
  517. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  518. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  519. // return sizeof(SetBootOptionsRes_T);
  520. // }
  521. // else if ((BMC_BOOT_OPTION_SET_IN_PROGRESS == (u8SetInProgress & 0x03)) &&
  522. // (BMC_BOOT_OPTION_SET_IN_PROGRESS == pBootOptReq->BootParam.SetInProgress))
  523. // {
  524. // IPMI_DBG_PRINT ("\nSET IN PROGRESS ALREADY SET \n");
  525. // pBootOptRes->CompletionCode = CC_SET_IN_PROGRESS;
  526. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  527. // return sizeof(SetBootOptionsRes_T);
  528. // }
  529. // /*Set the new setinpogress byte */
  530. // pBootOptions->u8SetInProgress = pBootOptReq->BootParam.SetInProgress;
  531. // break;
  532. //
  533. // case CHASSIS_SERVICE_PART_SEL:
  534. // pBootOptions->ServicePartitionSelector =
  535. // pBootOptReq->BootParam.ServicePartitionSelector;
  536. // break;
  537. //
  538. // case CHASSIS_SERVICE_PART_SCAN:
  539. // pBootOptions->ServicePartitionScan =
  540. // pBootOptReq->BootParam.ServicePartitionScan;
  541. // /*Update in NVRAM*/
  542. // g_BMCInfo.ChassisConfig.SysPartitionScan = pBootOptReq->BootParam.ServicePartitionScan;
  543. // FlushIPMI((uint8_t*)&g_BMCInfo.ChassisConfig,(uint8_t*)&g_BMCInfo.ChassisConfig.SysPartitionScan,g_BMCInfo.IPMIConfLoc.ChassisConfigAddr,sizeof(uint8_t),BMCInst);
  544. // break;
  545. //
  546. // case CHASSIS_BOOT_FLAG_VALID_BIT_CLEAR:
  547. // pBootOptions->BootFlagValidBitClearing =
  548. // pBootOptReq->BootParam.BootFlagValidBitClearing;
  549. // break;
  550. // case CHASSIS_BOOT_INFO_ACK:
  551. // _fmemcpy (( uint8_t*)&pBootOptions->BootInfoAck,
  552. // ( uint8_t*)&pBootOptReq->BootParam.BootInfoAck,
  553. // sizeof (BootInfoAck_T));
  554. // break;
  555. // case CHASSIS_BOOT_FLAGS:
  556. // u8TempData = (pBootOptReq->BootParam.BootFlags.Data2 & BIT5_BIT2_MASK);
  557. // if((u8TempData == RESERVED_VALUE_28) ||(u8TempData == RESERVED_VALUE_30) ||(u8TempData == RESERVED_VALUE_34)||(u8TempData == RESERVED_VALUE_38))
  558. // {
  559. // /* Alarm !!! Somebody is trying to set Reseved Bits */
  560. // *pRes = CC_INV_DATA_FIELD;
  561. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  562. // return sizeof (*pRes);
  563. // }
  564. // u8TempData = (pBootOptReq->BootParam.BootFlags.Data3 & BIT6_BIT5_MASK);
  565. // if((u8TempData == RESERVED_VALUE_60))
  566. // {
  567. // /* Alarm !!! Somebody is trying to set Reseved Bits */
  568. // *pRes = CC_INV_DATA_FIELD;
  569. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  570. // return sizeof (*pRes);
  571. // }
  572. // u8TempData = (pBootOptReq->BootParam.BootFlags.Data3 & BIT1_BIT0_MASK);
  573. // if((u8TempData == RESERVED_VALUE_03))
  574. // {
  575. // /* Alarm !!! Somebody is trying to set Reseved Bits */
  576. // *pRes = CC_INV_DATA_FIELD;
  577. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  578. // return sizeof (*pRes);
  579. // }
  580. // if((pBootOptReq->BootParam.BootFlags.Data5 == RESERVED_VALUE_20)||(pBootOptReq->BootParam.BootFlags.Data5 == RESERVED_VALUE_40)||(pBootOptReq->BootParam.BootFlags.Data5 == RESERVED_VALUE_80))
  581. // {
  582. // /* Alarm !!! Somebody is trying to set Reseved Bits */
  583. // *pRes = CC_INV_DATA_FIELD;
  584. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  585. // return sizeof (*pRes);
  586. // }
  587. // _fmemcpy (( uint8_t*)&pBootOptions->BootFlags,
  588. // ( uint8_t*)&pBootOptReq->BootParam.BootFlags,
  589. // sizeof (BootFlags_T));
  590. // break;
  591. // case CHASSIS_BOOT_INITIATOR_INFO:
  592. // _fmemcpy (( uint8_t*)&pBootOptions->BootInitiatorInfo,
  593. // ( uint8_t*)&pBootOptReq->BootParam.BootInitiatorInfo,
  594. // sizeof (BootInitiatorInfo_T));
  595. // break;
  596. //
  597. // case CHASSIS_BOOT_INITIATOR_MBOX:
  598. // if (pBootOptReq->BootParam.BootMailBox.BlockSel >= MAX_BOOT_INIT_MAILBOX_BLOCKS)
  599. // {
  600. // IPMI_DBG_PRINT ("\n ONLY FIVE BLOCKS ARE USED \n");
  601. // pBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  602. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  603. // return sizeof(SetBootOptionsRes_T);
  604. //
  605. // }
  606. // _fmemcpy (( uint8_t*)&pBootOptions->BootMailBox[pBootOptReq->BootParam.BootMailBox.BlockSel],
  607. // ( uint8_t*) &pBootOptReq->BootParam.BootMailBox.BootMBox,
  608. // sizeof (BootInitiatorMailbox_T));
  609. // break;
  610. // case CHASSIS_AMI_OEM_PARAM:
  611. // _fmemcpy (( uint8_t*)&g_BMCInfo.ChassisConfig.OemBootOpt,
  612. // ( uint8_t*) &pBootOptReq->BootParam.Oem,
  613. // sizeof (AMI_BootOpt_T));
  614. // FlushIPMI((uint8_t*)&g_BMCInfo.ChassisConfig,(uint8_t*)&g_BMCInfo.ChassisConfig,g_BMCInfo.IPMIConfLoc.ChassisConfigAddr,sizeof(ChassisConfig_T),BMCInst);
  615. // break;
  616. // case SSICB_OEM_PARAM_BLK_SIZE_TBL:
  617. // if(SSIComputeBladeSupport)
  618. // {
  619. // _fmemcpy (( uint8_t*)&pBootOptions->OemParamBlkSizeTbl,
  620. // ( uint8_t*)&pBootOptReq->BootParam.OemParamBlkSizeTbl,
  621. // sizeof(OemParamBlkSizeTbl_T));
  622. // break;
  623. // }
  624. // else
  625. // {
  626. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  627. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  628. // return sizeof (SetBootOptionsRes_T);
  629. // }
  630. // case SSICB_BOOT_ORDER_TBL:
  631. // if(SSIComputeBladeSupport)
  632. // {
  633. // if (pBootOptReq->BootParam.BootOrderTbl.BlockSel >= g_coremacros.ssi_bot_dev_num)
  634. // {
  635. // pBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  636. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  637. // return sizeof(uint8_t);
  638. // }
  639. // _fmemcpy (( uint8_t*)&pBootOptions->BootOrderTbl[(pBootOptReq->BootParam.BootOrderTbl.BlockSel) * sizeof(BootOrderTbl_T)],
  640. // ( uint8_t*)&pBootOptReq->BootParam.BootOrderTbl,
  641. // sizeof(BootOrderTbl_T));
  642. // break;
  643. // }
  644. // else
  645. // {
  646. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  647. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  648. // return sizeof (SetBootOptionsRes_T);
  649. // }
  650. // case SSICB_BOOT_DEV_SELECTOR:
  651. // if(SSIComputeBladeSupport)
  652. // {
  653. // pBootOptions->BootDevSelector = pBootOptReq->BootParam.BootDevSelector;
  654. // break;
  655. // }
  656. // else
  657. // {
  658. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  659. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  660. // return sizeof (SetBootOptionsRes_T);
  661. // }
  662. // case SSICB_SLOT_CONFIG_TBL:
  663. // if(SSIComputeBladeSupport)
  664. // {
  665. // _fmemcpy (( uint8_t*)&pBootOptions->SlotConfigTbl,
  666. // ( uint8_t*)&pBootOptReq->BootParam.SlotConfigTbl,
  667. // sizeof(SlotConfigTbl_T));
  668. // break;
  669. // }
  670. // else
  671. // {
  672. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  673. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  674. // return sizeof (SetBootOptionsRes_T);
  675. // }
  676. // default:
  677. // pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  678. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  679. // return sizeof (SetBootOptionsRes_T);
  680. // }
  681. // if (0 != ROLLBACK_OPTION)
  682. // {
  683. // if (BMC_BOOT_OPTION_COMMIT_WRITE == (u8SetInProgress & 0x03))
  684. // {
  685. // /* Writing to nvRAM when "commit write" is given */
  686. // FlushIPMI((uint8_t*)&g_BMCInfo.ChassisConfig,(uint8_t*)&g_BMCInfo.ChassisConfig,g_BMCInfo.IPMIConfLoc.ChassisConfigAddr,sizeof(ChassisConfig_T),BMCInst);
  687. // /* Setting this to "set complete", don't need mutex protection */
  688. // pBootOptions->u8SetInProgress = BMC_BOOT_OPTION_SET_COMPLETE;
  689. // }
  690. //
  691. // }
  692. // else
  693. // {
  694. // /* Since roll back feature is not provided
  695. // the data is written to nvram */
  696. // FlushIPMI((uint8_t*)&g_BMCInfo.ChassisConfig,(uint8_t*)&g_BMCInfo.ChassisConfig,g_BMCInfo.IPMIConfLoc.ChassisConfigAddr,sizeof(ChassisConfig_T),BMCInst);
  697. // }
  698. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  699. // pBootOptRes->CompletionCode = CC_NORMAL;
  700. return sizeof(SetBootOptionsRes_T);
  701. }
  702. /*-------------------------------------
  703. * GetSysBOOTOptions
  704. *-------------------------------------*/
  705. int
  706. GetSysBOOTOptions ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  707. {
  708. printf("GetSysBOOTOptions not implement\r\n");
  709. // GetBootOptionsReq_T* pGetBootOptReq = ( GetBootOptionsReq_T*) pReq;
  710. // GetBootOptionsRes_T* pGetBootOptRes = ( GetBootOptionsRes_T*) pRes;
  711. // BMCInfo_t *pBMCInfo = &g_BMCInfo[BMCInst];
  712. // uint8_t ParamSel,SSIComputeBladeSupport;
  713. // int ResponseLength;
  714. // BootOptions_T sBootOptions;
  715. // IPMI_DBG_PRINT ("GET SYSTEM BOOT OPTIONS\n");
  716. // if(pGetBootOptReq->ParamSel & RESERVED_VALUE_80)
  717. // {
  718. // /* Alarm !!! Somebody is trying to set Reseved Bits */
  719. // *pRes = CC_INV_DATA_FIELD;
  720. // return sizeof (*pRes);
  721. // }
  722. // ParamSel = pGetBootOptReq->ParamSel & 0x7F;
  723. // SSIComputeBladeSupport = g_corefeatures.ssi_support;
  724. // /*Check for validity of parameter */
  725. // if(SSIComputeBladeSupport)
  726. // {
  727. // if ((ParamSel >= sizeof (m_BootOptParamLen)) && (ParamSel != CHASSIS_AMI_OEM_PARAM) &&
  728. // (ParamSel != SSICB_OEM_PARAM_BLK_SIZE_TBL) && (ParamSel < SSICB_BOOT_ORDER_TBL || ParamSel > SSICB_SLOT_CONFIG_TBL))
  729. // {
  730. // pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  731. // return sizeof(uint8_t);
  732. // }
  733. // }
  734. // else
  735. // {
  736. // if ((ParamSel >= sizeof (m_BootOptParamLen)) && (ParamSel != CHASSIS_AMI_OEM_PARAM))
  737. // {
  738. // pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  739. // return sizeof(uint8_t);
  740. // }
  741. // }
  742. // /*Check the validity of Setselector & Blockselector */
  743. // if(SSIComputeBladeSupport)
  744. // {
  745. // if (((0 != pGetBootOptReq->SetSel) && (ParamSel != CHASSIS_BOOT_INITIATOR_MBOX || ParamSel != SSICB_BOOT_ORDER_TBL)) ||
  746. // (ParamSel == CHASSIS_BOOT_INITIATOR_MBOX && pGetBootOptReq->SetSel >= MAX_BOOT_INIT_MAILBOX_BLOCKS) ||
  747. // (ParamSel == SSICB_BOOT_ORDER_TBL && pGetBootOptReq->SetSel >= g_coremacros.ssi_bot_dev_num) ||
  748. // (0 != pGetBootOptReq->BlockSel))
  749. // {
  750. // IPMI_DBG_PRINT ("Set Selector or Block Selector is invalid\n") ;
  751. // pGetBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  752. // return sizeof(uint8_t);
  753. // }
  754. // }
  755. // else
  756. // {
  757. // if (((0 != pGetBootOptReq->SetSel) && (ParamSel != CHASSIS_BOOT_INITIATOR_MBOX)) ||
  758. // (pGetBootOptReq->SetSel >= MAX_BOOT_INIT_MAILBOX_BLOCKS) ||
  759. // (0 != pGetBootOptReq->BlockSel))
  760. // {
  761. // IPMI_DBG_PRINT ("Set Selector or Block Selector is invalid\n") ;
  762. // pGetBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  763. // return sizeof(uint8_t);
  764. // }
  765. // }
  766. // pGetBootOptRes->CompletionCode = CC_NORMAL;
  767. // pGetBootOptRes->ParamVersion = CHASSIS_PARAMETER_VERSION;
  768. // pGetBootOptRes->ParameterValid = ParamSel;
  769. // OS_THREAD_MUTEX_ACQUIRE(&g_BMCInfo.ChassisMutex, WAIT_INFINITE);
  770. // // get a local copy of the boot option from the shared memory
  771. // sBootOptions = BMC_GET_SHARED_MEM(BMCInst)->sBootOptions;
  772. // /*Set the Parameter valid bit if needed */
  773. // if (sBootOptions.ParameterValid & (1 << ParamSel))
  774. // {
  775. // pGetBootOptRes->ParameterValid |= 0x80;
  776. // }
  777. // /*Set initial length of Completion code,Param revision & Paramvalid */
  778. // ResponseLength = 0x03;
  779. // /*Load the specific parameter */
  780. // switch (ParamSel)
  781. // {
  782. // case CHASSIS_SET_INPROG :
  783. // pGetBootOptRes->BootParams.SetInProgress = sBootOptions.u8SetInProgress;
  784. // ResponseLength += sizeof (sBootOptions.u8SetInProgress);
  785. // break;
  786. // case CHASSIS_SERVICE_PART_SEL:
  787. // pGetBootOptRes->BootParams.ServicePartitionSelector =
  788. // sBootOptions.ServicePartitionSelector;
  789. // ResponseLength += sizeof (sBootOptions.ServicePartitionScan);
  790. // break;
  791. //
  792. // case CHASSIS_SERVICE_PART_SCAN:
  793. // pGetBootOptRes->BootParams.ServicePartitionScan = g_BMCInfo.ChassisConfig.SysPartitionScan;
  794. // ResponseLength += sizeof (sBootOptions.ServicePartitionScan);
  795. // break;
  796. //
  797. // case CHASSIS_BOOT_FLAG_VALID_BIT_CLEAR:
  798. // pGetBootOptRes->BootParams.BootFlagValidBitClearing =
  799. // sBootOptions.BootFlagValidBitClearing;
  800. // ResponseLength += sizeof (sBootOptions.BootFlagValidBitClearing);
  801. // break;
  802. //
  803. // case CHASSIS_BOOT_INFO_ACK:
  804. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.BootInfoAck,
  805. // ( uint8_t*)&sBootOptions.BootInfoAck,
  806. // sizeof (BootInfoAck_T));
  807. // pGetBootOptRes->BootParams.BootInfoAck.WriteMask = 0;
  808. // ResponseLength += sizeof (BootInfoAck_T);
  809. // break;
  810. //
  811. // case CHASSIS_BOOT_FLAGS:
  812. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.BootFlags,
  813. // ( uint8_t*)&sBootOptions.BootFlags,
  814. // sizeof (BootFlags_T));
  815. // ResponseLength += sizeof (BootFlags_T);
  816. // break;
  817. // case CHASSIS_BOOT_INITIATOR_INFO:
  818. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.BootInitiatorInfo,
  819. // ( uint8_t*)&sBootOptions.BootInitiatorInfo,
  820. // sizeof (BootInitiatorInfo_T));
  821. // ResponseLength += sizeof (BootInitiatorInfo_T);
  822. // break;
  823. //
  824. // case CHASSIS_BOOT_INITIATOR_MBOX:
  825. // pGetBootOptRes->BootParams.BootMailBox.BlockSel = pGetBootOptReq->SetSel;
  826. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.BootMailBox.BootMBox,
  827. // ( uint8_t*)&sBootOptions.BootMailBox[pGetBootOptReq->SetSel],
  828. // sizeof (BootInitiatorMailbox_T));
  829. // ResponseLength += sizeof (BootInitiatorMboxReq_T);
  830. // break;
  831. // case CHASSIS_AMI_OEM_PARAM:
  832. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.Oem,
  833. // ( uint8_t*)&g_BMCInfo.ChassisConfig.OemBootOpt,
  834. // sizeof (AMI_BootOpt_T));
  835. // ResponseLength += sizeof (AMI_BootOpt_T);
  836. // break;
  837. // case SSICB_OEM_PARAM_BLK_SIZE_TBL:
  838. // if(SSIComputeBladeSupport)
  839. // {
  840. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.OemParamBlkSizeTbl,
  841. // ( uint8_t*)&sBootOptions.OemParamBlkSizeTbl,
  842. // sizeof(OemParamBlkSizeTbl_T));
  843. // ResponseLength += sizeof(OemParamBlkSizeTbl_T);
  844. // break;
  845. // }
  846. // else
  847. // {
  848. // pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  849. // ResponseLength = 1 ;
  850. // break;
  851. // }
  852. // case SSICB_BOOT_ORDER_TBL:
  853. // if(SSIComputeBladeSupport)
  854. // {
  855. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.BootOrderTbl,
  856. // ( uint8_t*)&sBootOptions.BootOrderTbl[pGetBootOptReq->SetSel * sizeof(BootOrderTbl_T)],
  857. // sizeof(BootOrderTbl_T));
  858. // ResponseLength += sizeof(BootOrderTbl_T);
  859. // break;
  860. // }
  861. // else
  862. // {
  863. // pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  864. // ResponseLength = 1 ;
  865. // break;
  866. // }
  867. // case SSICB_BOOT_DEV_SELECTOR:
  868. // if(SSIComputeBladeSupport)
  869. // {
  870. // pGetBootOptRes->BootParams.BootDevSelector = sBootOptions.BootDevSelector;
  871. // ResponseLength += sizeof(sBootOptions.BootDevSelector);
  872. // break;
  873. // }
  874. // else
  875. // {
  876. // pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  877. // ResponseLength = 1 ;
  878. // break;
  879. // }
  880. // case SSICB_SLOT_CONFIG_TBL:
  881. // if(SSIComputeBladeSupport)
  882. // {
  883. // _fmemcpy (( uint8_t*)&pGetBootOptRes->BootParams.SlotConfigTbl,
  884. // ( uint8_t*)&sBootOptions.SlotConfigTbl,
  885. // sizeof(SlotConfigTbl_T));
  886. // ResponseLength += sizeof(SlotConfigTbl_T);
  887. // break;
  888. // }
  889. // else
  890. // {
  891. // pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  892. // ResponseLength = 1 ;
  893. // break;
  894. // }
  895. // default :
  896. // pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  897. // ResponseLength = 1 ;
  898. // }
  899. // OS_THREAD_MUTEX_RELEASE(&g_BMCInfo.ChassisMutex);
  900. // return ResponseLength;
  901. return 1;
  902. }
  903. /*-------------------------------------
  904. * SetFPButtonEnables
  905. *-------------------------------------*/
  906. int
  907. SetFPButtonEnables ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  908. {
  909. printf("SetFPButtonEnables not implement\r\n");
  910. //#if 0 //FQLI
  911. // PMConfig_T* pPMConfig;
  912. // bool bRet;
  913. // SetFPBtnEnablesRes_T* pFPBtnEnablesRes = (SetFPBtnEnablesRes_T*)pRes;
  914. // SetFPBtnEnablesReq_T* pFPBtnEnablesReq = (SetFPBtnEnablesReq_T*)pReq;
  915. // IPMI_DBG_PRINT ("PwrCtrl - SetFrontPanelEnables\n");
  916. // pFPBtnEnablesRes->CompletionCode = CC_INV_CMD;
  917. // if (pReq)
  918. // {
  919. // pFPBtnEnablesRes->CompletionCode = CC_NORMAL;
  920. // // retrieve chassis status from the NVStore
  921. // pPMConfig = ( PMConfig_T*)GetNVRAddr(NVRH_PMCONFIG);
  922. // // store the front panel enables to the NVStore
  923. // pPMConfig->ChassisConfig.ChassisPowerState.FPBtnEnables = pFPBtnEnablesReq->ButtonEnables;
  924. // // enable / disable front panel buttons. do the set before store the value in case the
  925. // // action fails. if failed to set the passthrough buttons, the current reading will be
  926. // // used to be the current settings.
  927. // bRet = PDK_SetFPEnable(&pFPBtnEnablesReq->ButtonEnables);
  928. // if (bRet != TRUE)
  929. // {
  930. // pFPBtnEnablesRes->CompletionCode = CC_UNSPECIFIED_ERR;
  931. // }
  932. // FlushPMC(&pPMConfig->ChassisConfig.ChassisPowerState.sFrontPanelButton, sizeof(ChassisPowerState_T));
  933. // }
  934. // return sizeof (SetFPBtnEnablesRes_T);
  935. //#else //AMI
  936. // SetFPBtnEnablesReq_T* pFPBtnEnablesReq = ( SetFPBtnEnablesReq_T*)pReq;
  937. // SetFPBtnEnablesRes_T* pFPBtnEnablesRes = ( SetFPBtnEnablesRes_T*)pRes;
  938. // BMCInfo_t *pBMCInfo = &g_BMCInfo[BMCInst];
  939. // IPMI_DBG_PRINT ("Set FP Button Enables\n");
  940. // /* Check for the reserved bytes should b zero */
  941. // if ( 0 != (pFPBtnEnablesReq->ButtonEnables & RESERVED_BITS_SETFPBUTTONENABLES ) )
  942. // {
  943. // pFPBtnEnablesRes->CompletionCode = CC_INV_DATA_FIELD;
  944. // return sizeof(uint8_t);
  945. // }
  946. // OS_THREAD_MUTEX_ACQUIRE(&g_BMCInfo.ChassisMutex, WAIT_INFINITE);
  947. // g_BMCInfo.ChassisConfig.ChassisPowerState.FPBtnEnables = pFPBtnEnablesReq->ButtonEnables;
  948. // if(g_PDKHandle[PDK_FPENABLE] != NULL)
  949. // {
  950. // ((int(*)(uint8_t,int))g_PDKHandle[PDK_FPENABLE]) (pFPBtnEnablesReq->ButtonEnables,BMCInst);
  951. // }
  952. // /* Save in NVR */
  953. // FlushIPMI((uint8_t*)&g_BMCInfo.IpmiConfig,sizeof(IPMIConfig_T));
  954. // pFPBtnEnablesRes->CompletionCode = 0x00;
  955. // return sizeof (SetFPBtnEnablesRes_T);
  956. //#endif //FQLI
  957. return 1;
  958. }
  959. /*-------------------------------------
  960. * SetPowerCycleInterval
  961. *-------------------------------------*/
  962. int
  963. SetPowerCycleInterval ( uint8_t* pReq, uint8_t ReqLen, uint8_t* pRes)
  964. {
  965. SetPowerCycleIntervalReq_T* pSetPowerCycleInterval = (SetPowerCycleIntervalReq_T*) pReq;
  966. SetPowerCycleIntervalRes_T* pSetPowerCycleIntervalRes = (SetPowerCycleIntervalRes_T*) pRes;
  967. g_BMCInfo.IpmiConfig.PowerCycleInterval = pSetPowerCycleInterval->PowerCycleInterval;
  968. pSetPowerCycleIntervalRes->CompletionCode = CC_NORMAL;
  969. UpdateFlash();
  970. return sizeof(SetPowerCycleIntervalRes_T);
  971. }
  972. #endif /* CHASSIS_DEVICE */