main.h 3.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112
  1. #ifndef __MAIN_H__
  2. #define __MAIN_H__
  3. #include <stdint.h>
  4. #include <pthread.h>
  5. #include <unistd.h>
  6. #include <sys/types.h>
  7. #include <sys/stat.h>
  8. #include <sys/socket.h>
  9. #include "com_BmcType.h"
  10. #include "com_IPMIDefs.h"
  11. #include "BmcType.h"
  12. #include "com_IPMI_SDRRecord.h"
  13. #include "Session.h"
  14. #include "sensor_tbl.h"
  15. #include "MsgHndlr.h"
  16. #include "hal_interface_api.h"
  17. #include "com_BMCCfg.h"
  18. /* Declare global variable */
  19. /*---------------------------------------------------------------------------*
  20. * Interface SUPPORTED
  21. *---------------------------------------------------------------------------*/
  22. #define LAN_IFC_SUPPORT 1
  23. #define SERIAL_IFC_SUPPORT 0
  24. #define SERIAL_TERMINAL_SUPPORT 0
  25. #define SYS_IFC_SUPPORT 0
  26. #define PRIMARY_IPMB_SUPPORT 1
  27. #define SECONDARY_IPMB_SUPPORT 1
  28. #define GROUP_EXTERN_SUPPORT 1
  29. #define UDS_IFC_SUPPORT 1
  30. #define SENSOR_NUMBERS (11)
  31. #define FW_VERSION_MAJOR (1)
  32. #define FW_VERSION_MINOR (0)
  33. #define PWR_CYCLE_INTERVAL (3) //unit: 1s
  34. #define REARM_SET_SENSOR_THRESHOLD (0) //whether rearm sensor event when change sensor threshold
  35. #define CHASSIS_TIMER_INTERVAL (1) //1 second
  36. #define FAN_CONTROL_INTERVAL (5) //5 second
  37. //IPMB
  38. #define PRIMARY_IPMB_BUS 2 // /dev/i2c2
  39. #define SECONDARY_IPMB_BUS 1 // /dev/i2c1
  40. #define PRIMARY_IPMB_ADDR 0x44
  41. #define SECONDARY_IPMB_ADDR 0x44
  42. //RACK-ID
  43. #define RACKID0_PORT GPIOI
  44. #define RACKID1_PORT GPIOI
  45. #define RACKID2_PORT GPIOH
  46. #define RACKID3_PORT GPIOI
  47. #define RACKID4_PORT GPIOI
  48. #define RACKID5_PORT GPIOI
  49. #define RACKID0_PIN GPIO_PIN_6
  50. #define RACKID1_PIN GPIO_PIN_7
  51. #define RACKID2_PIN GPIO_PIN_15
  52. #define RACKID3_PIN GPIO_PIN_9
  53. #define RACKID4_PIN GPIO_PIN_10
  54. #define RACKID5_PIN GPIO_PIN_11
  55. //SLOT-ID
  56. #define GA0_PORT GPIOH
  57. #define GA1_PORT GPIOH
  58. #define GA2_PORT GPIOH
  59. #define GA3_PORT GPIOH
  60. #define GA4_PORT GPIOH
  61. #define GAP_PORT GPIOI
  62. #define GA0_PIN GPIO_PIN_10
  63. #define GA1_PIN GPIO_PIN_11
  64. #define GA2_PIN GPIO_PIN_12
  65. #define GA3_PIN GPIO_PIN_13
  66. #define GA4_PIN GPIO_PIN_14
  67. #define GAP_PIN GPIO_PIN_5
  68. extern sensor_tbl_t sensor_tbl[];
  69. extern const OemFRUData_T Default_FRUData;
  70. //extern OEM_SENSOR_CAPABILITY_T g_sensorList[SENSOR_NUMBERS];
  71. extern const MgmtCtrlrDevLocator_T bmc_sdr;
  72. extern const FullSensorRec_T full_sdr_tbl[];
  73. extern const CompactSensorRec_T Compact_sdr_tbl[];
  74. #define RESTORE_IPMI 0x01
  75. #define RESTORE_FRU 0x02
  76. #define RESTORE_SDR 0x04
  77. #define RESTORE_SEL 0x08
  78. #define RESTORE_ALL (RESTORE_IPMI | RESTORE_FRU | RESTORE_SDR | RESTORE_SEL)
  79. extern pthread_t gThreadIDs[256];
  80. extern uint8_t gThreadIndex;
  81. extern int gFd_LanIfcQ, gFd_LanResQ;
  82. extern int gFdUdsIfc, gFdUdsRes;
  83. extern int gFd_MsgHndlrIfc;
  84. extern int gFd_ChassisPwrHndlrQue;
  85. extern int gFd_PrimaryIpmbIfcQ, gFd_PrimaryIpmbResQ;
  86. extern int gFd_SecondaryIpmbIfcQ, gFd_SecondaryIpmbResQ;
  87. extern TLS_T g_tls;
  88. extern PendingBridgedResTbl_T m_PendingBridgedResTbl[MAX_PENDING_BRIDGE_TBL][MAX_PENDING_BRIDGE_RES];
  89. extern PendingSeqNoTbl_T m_PendingSeqNoTbl[16][MAX_PENDING_SEQ_NO];
  90. extern KCSBridgeResInfo_T m_KCSBridgeResInfo;
  91. extern TimerTaskTbl_T m_TimerTaskTbl [20];
  92. extern BMCInfo_t g_BMCInfo;
  93. extern SensorHistoryInfo_T gSensorHistoryInfo[SENSOR_NUMBERS];
  94. extern FanInfo_T gFanInfo[FAN_NUMBERS];
  95. extern BladeStatus_T gBladeStatus[BLADE_NUMBERS];
  96. #endif /* __MAIN_H__ */