stm32f4xx_hal_i2c.c 170 KB

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  1. /**
  2. ******************************************************************************
  3. * @file stm32f4xx_hal_i2c.c
  4. * @author MCD Application Team
  5. * @brief I2C HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Inter Integrated Circuit (I2C) peripheral:
  8. * + Initialization and de-initialization functions
  9. * + IO operation functions
  10. * + Peripheral State, Mode and Error functions
  11. *
  12. @verbatim
  13. ==============================================================================
  14. ##### How to use this driver #####
  15. ==============================================================================
  16. [..]
  17. The I2C HAL driver can be used as follows:
  18. (#) Declare a I2C_HandleTypeDef handle structure, for example:
  19. I2C_HandleTypeDef hi2c;
  20. (#)Initialize the I2C low level resources by implementing the HAL_I2C_MspInit() API:
  21. (##) Enable the I2Cx interface clock
  22. (##) I2C pins configuration
  23. (+++) Enable the clock for the I2C GPIOs
  24. (+++) Configure I2C pins as alternate function open-drain
  25. (##) NVIC configuration if you need to use interrupt process
  26. (+++) Configure the I2Cx interrupt priority
  27. (+++) Enable the NVIC I2C IRQ Channel
  28. (##) DMA Configuration if you need to use DMA process
  29. (+++) Declare a DMA_HandleTypeDef handle structure for the transmit or receive stream
  30. (+++) Enable the DMAx interface clock using
  31. (+++) Configure the DMA handle parameters
  32. (+++) Configure the DMA Tx or Rx Stream
  33. (+++) Associate the initialized DMA handle to the hi2c DMA Tx or Rx handle
  34. (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on
  35. the DMA Tx or Rx Stream
  36. (#) Configure the Communication Speed, Duty cycle, Addressing mode, Own Address1,
  37. Dual Addressing mode, Own Address2, General call and Nostretch mode in the hi2c Init structure.
  38. (#) Initialize the I2C registers by calling the HAL_I2C_Init(), configures also the low level Hardware
  39. (GPIO, CLOCK, NVIC...etc) by calling the customized HAL_I2C_MspInit(&hi2c) API.
  40. (#) To check if target device is ready for communication, use the function HAL_I2C_IsDeviceReady()
  41. (#) For I2C IO and IO MEM operations, three operation modes are available within this driver :
  42. *** Polling mode IO operation ***
  43. =================================
  44. [..]
  45. (+) Transmit in master mode an amount of data in blocking mode using HAL_I2C_Master_Transmit()
  46. (+) Receive in master mode an amount of data in blocking mode using HAL_I2C_Master_Receive()
  47. (+) Transmit in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Transmit()
  48. (+) Receive in slave mode an amount of data in blocking mode using HAL_I2C_Slave_Receive()
  49. *** Polling mode IO MEM operation ***
  50. =====================================
  51. [..]
  52. (+) Write an amount of data in blocking mode to a specific memory address using HAL_I2C_Mem_Write()
  53. (+) Read an amount of data in blocking mode from a specific memory address using HAL_I2C_Mem_Read()
  54. *** Interrupt mode IO operation ***
  55. ===================================
  56. [..]
  57. (+) Transmit in master mode an amount of data in non blocking mode using HAL_I2C_Master_Transmit_IT()
  58. (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
  59. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
  60. (+) Receive in master mode an amount of data in non blocking mode using HAL_I2C_Master_Receive_IT()
  61. (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
  62. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
  63. (+) Transmit in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Transmit_IT()
  64. (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
  65. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
  66. (+) Receive in slave mode an amount of data in non blocking mode using HAL_I2C_Slave_Receive_IT()
  67. (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
  68. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
  69. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  70. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  71. (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  72. (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  73. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  74. *** Interrupt mode IO sequential operation ***
  75. ==============================================
  76. [..]
  77. (@) These interfaces allow to manage a sequential transfer with a repeated start condition
  78. when a direction change during transfer
  79. [..]
  80. (+) A specific option field manage the different steps of a sequential transfer
  81. (+) Option field values are defined through @ref I2C_XFEROPTIONS and are listed below:
  82. (++) I2C_FIRST_AND_LAST_FRAME: No sequential usage, functionnal is same as associated interfaces in no sequential mode
  83. (++) I2C_FIRST_FRAME: Sequential usage, this option allow to manage a sequence with start condition, address
  84. and data to transfer without a final stop condition
  85. (++) I2C_NEXT_FRAME: Sequential usage, this option allow to manage a sequence with a restart condition, address
  86. and with new data to transfer if the direction change or manage only the new data to transfer
  87. if no direction change and without a final stop condition in both cases
  88. (++) I2C_LAST_FRAME: Sequential usage, this option allow to manage a sequance with a restart condition, address
  89. and with new data to transfer if the direction change or manage only the new data to transfer
  90. if no direction change and with a final stop condition in both cases
  91. (+) Differents sequential I2C interfaces are listed below:
  92. (++) Sequential transmit in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Transmit_IT()
  93. (+++) At transmission end of current frame transfer, HAL_I2C_MasterTxCpltCallback() is executed and user can
  94. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
  95. (++) Sequential receive in master I2C mode an amount of data in non-blocking mode using HAL_I2C_Master_Sequential_Receive_IT()
  96. (+++) At reception end of current frame transfer, HAL_I2C_MasterRxCpltCallback() is executed and user can
  97. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback()
  98. (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  99. (+++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  100. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  101. (++) Enable/disable the Address listen mode in slave I2C mode using HAL_I2C_EnableListen_IT() HAL_I2C_DisableListen_IT()
  102. (+++) When address slave I2C match, HAL_I2C_AddrCallback() is executed and user can
  103. add his own code to check the Address Match Code and the transmission direction request by master (Write/Read).
  104. (+++) At Listen mode end HAL_I2C_ListenCpltCallback() is executed and user can
  105. add his own code by customization of function pointer HAL_I2C_ListenCpltCallback()
  106. (++) Sequential transmit in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Transmit_IT()
  107. (+++) At transmission end of current frame transfer, HAL_I2C_SlaveTxCpltCallback() is executed and user can
  108. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
  109. (++) Sequential receive in slave I2C mode an amount of data in non-blocking mode using HAL_I2C_Slave_Sequential_Receive_IT()
  110. (+++) At reception end of current frame transfer, HAL_I2C_SlaveRxCpltCallback() is executed and user can
  111. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback()
  112. (++) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  113. add his own code by customization of function pointer HAL_I2C_ErrorCallback()
  114. (++) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  115. (++) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  116. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  117. *** Interrupt mode IO MEM operation ***
  118. =======================================
  119. [..]
  120. (+) Write an amount of data in no-blocking mode with Interrupt to a specific memory address using
  121. HAL_I2C_Mem_Write_IT()
  122. (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
  123. add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
  124. (+) Read an amount of data in no-blocking mode with Interrupt from a specific memory address using
  125. HAL_I2C_Mem_Read_IT()
  126. (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
  127. add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
  128. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  129. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  130. *** DMA mode IO operation ***
  131. ==============================
  132. [..]
  133. (+) Transmit in master mode an amount of data in non blocking mode (DMA) using
  134. HAL_I2C_Master_Transmit_DMA()
  135. (+) At transmission end of transfer HAL_I2C_MasterTxCpltCallback is executed and user can
  136. add his own code by customization of function pointer HAL_I2C_MasterTxCpltCallback
  137. (+) Receive in master mode an amount of data in non blocking mode (DMA) using
  138. HAL_I2C_Master_Receive_DMA()
  139. (+) At reception end of transfer HAL_I2C_MasterRxCpltCallback is executed and user can
  140. add his own code by customization of function pointer HAL_I2C_MasterRxCpltCallback
  141. (+) Transmit in slave mode an amount of data in non blocking mode (DMA) using
  142. HAL_I2C_Slave_Transmit_DMA()
  143. (+) At transmission end of transfer HAL_I2C_SlaveTxCpltCallback is executed and user can
  144. add his own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback
  145. (+) Receive in slave mode an amount of data in non blocking mode (DMA) using
  146. HAL_I2C_Slave_Receive_DMA()
  147. (+) At reception end of transfer HAL_I2C_SlaveRxCpltCallback is executed and user can
  148. add his own code by customization of function pointer HAL_I2C_SlaveRxCpltCallback
  149. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  150. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  151. (+) Abort a master I2C process communication with Interrupt using HAL_I2C_Master_Abort_IT()
  152. (+) End of abort process, HAL_I2C_AbortCpltCallback() is executed and user can
  153. add his own code by customization of function pointer HAL_I2C_AbortCpltCallback()
  154. *** DMA mode IO MEM operation ***
  155. =================================
  156. [..]
  157. (+) Write an amount of data in no-blocking mode with DMA to a specific memory address using
  158. HAL_I2C_Mem_Write_DMA()
  159. (+) At MEM end of write transfer HAL_I2C_MemTxCpltCallback is executed and user can
  160. add his own code by customization of function pointer HAL_I2C_MemTxCpltCallback
  161. (+) Read an amount of data in no-blocking mode with DMA from a specific memory address using
  162. HAL_I2C_Mem_Read_DMA()
  163. (+) At MEM end of read transfer HAL_I2C_MemRxCpltCallback is executed and user can
  164. add his own code by customization of function pointer HAL_I2C_MemRxCpltCallback
  165. (+) In case of transfer Error, HAL_I2C_ErrorCallback() function is executed and user can
  166. add his own code by customization of function pointer HAL_I2C_ErrorCallback
  167. *** I2C HAL driver macros list ***
  168. ==================================
  169. [..]
  170. Below the list of most used macros in I2C HAL driver.
  171. (+) __HAL_I2C_ENABLE: Enable the I2C peripheral
  172. (+) __HAL_I2C_DISABLE: Disable the I2C peripheral
  173. (+) __HAL_I2C_GET_FLAG : Checks whether the specified I2C flag is set or not
  174. (+) __HAL_I2C_CLEAR_FLAG : Clear the specified I2C pending flag
  175. (+) __HAL_I2C_ENABLE_IT: Enable the specified I2C interrupt
  176. (+) __HAL_I2C_DISABLE_IT: Disable the specified I2C interrupt
  177. [..]
  178. (@) You can refer to the I2C HAL driver header file for more useful macros
  179. @endverbatim
  180. ******************************************************************************
  181. * @attention
  182. *
  183. * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  184. *
  185. * Redistribution and use in source and binary forms, with or without modification,
  186. * are permitted provided that the following conditions are met:
  187. * 1. Redistributions of source code must retain the above copyright notice,
  188. * this list of conditions and the following disclaimer.
  189. * 2. Redistributions in binary form must reproduce the above copyright notice,
  190. * this list of conditions and the following disclaimer in the documentation
  191. * and/or other materials provided with the distribution.
  192. * 3. Neither the name of STMicroelectronics nor the names of its contributors
  193. * may be used to endorse or promote products derived from this software
  194. * without specific prior written permission.
  195. *
  196. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  197. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  198. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  199. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  200. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  201. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  202. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  203. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  204. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  205. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  206. *
  207. ******************************************************************************
  208. */
  209. /* Includes ------------------------------------------------------------------*/
  210. #include "stm32f4xx_hal.h"
  211. #include "stm32f4xx.h"
  212. /** @addtogroup STM32F4xx_HAL_Driver
  213. * @{
  214. */
  215. /** @defgroup I2C I2C
  216. * @brief I2C HAL module driver
  217. * @{
  218. */
  219. #ifdef HAL_I2C_MODULE_ENABLED
  220. /* Private typedef -----------------------------------------------------------*/
  221. /* Private define ------------------------------------------------------------*/
  222. /** @addtogroup I2C_Private_Define
  223. * @{
  224. */
  225. #define I2C_TIMEOUT_FLAG 35U /*!< Timeout 35 ms */
  226. #define I2C_TIMEOUT_BUSY_FLAG 25U /*!< Timeout 25 ms */
  227. #define I2C_NO_OPTION_FRAME 0xFFFF0000U /*!< XferOptions default value */
  228. /* Private define for @ref PreviousState usage */
  229. #define I2C_STATE_MSK ((uint32_t)((HAL_I2C_STATE_BUSY_TX | HAL_I2C_STATE_BUSY_RX) & (~(uint32_t)HAL_I2C_STATE_READY))) /*!< Mask State define, keep only RX and TX bits */
  230. #define I2C_STATE_NONE ((uint32_t)(HAL_I2C_MODE_NONE)) /*!< Default Value */
  231. #define I2C_STATE_MASTER_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy TX, combinaison of State LSB and Mode enum */
  232. #define I2C_STATE_MASTER_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_MASTER)) /*!< Master Busy RX, combinaison of State LSB and Mode enum */
  233. #define I2C_STATE_SLAVE_BUSY_TX ((uint32_t)((HAL_I2C_STATE_BUSY_TX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy TX, combinaison of State LSB and Mode enum */
  234. #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)((HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | HAL_I2C_MODE_SLAVE)) /*!< Slave Busy RX, combinaison of State LSB and Mode enum */
  235. /**
  236. * @}
  237. */
  238. /* Private macro -------------------------------------------------------------*/
  239. /* Private variables ---------------------------------------------------------*/
  240. /* Private function prototypes -----------------------------------------------*/
  241. /** @addtogroup I2C_Private_Functions
  242. * @{
  243. */
  244. /* Private functions to handle DMA transfer */
  245. static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma);
  246. static void I2C_DMAError(DMA_HandleTypeDef *hdma);
  247. static void I2C_DMAAbort(DMA_HandleTypeDef *hdma);
  248. static void I2C_ITError(I2C_HandleTypeDef *hi2c);
  249. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  250. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart);
  251. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  252. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart);
  253. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart);
  254. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart);
  255. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  256. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  257. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  258. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart);
  259. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c);
  260. /* Private functions for I2C transfer IRQ handler */
  261. static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c);
  262. static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c);
  263. static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c);
  264. static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c);
  265. static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c);
  266. static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c);
  267. static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c);
  268. static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c);
  269. static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c);
  270. static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c);
  271. static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c);
  272. static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c);
  273. static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c);
  274. static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c);
  275. /**
  276. * @}
  277. */
  278. /* Exported functions --------------------------------------------------------*/
  279. /** @defgroup I2C_Exported_Functions I2C Exported Functions
  280. * @{
  281. */
  282. /** @defgroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions
  283. * @brief Initialization and Configuration functions
  284. *
  285. @verbatim
  286. ===============================================================================
  287. ##### Initialization and de-initialization functions #####
  288. ===============================================================================
  289. [..] This subsection provides a set of functions allowing to initialize and
  290. de-initialize the I2Cx peripheral:
  291. (+) User must Implement HAL_I2C_MspInit() function in which he configures
  292. all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC).
  293. (+) Call the function HAL_I2C_Init() to configure the selected device with
  294. the selected configuration:
  295. (++) Communication Speed
  296. (++) Duty cycle
  297. (++) Addressing mode
  298. (++) Own Address 1
  299. (++) Dual Addressing mode
  300. (++) Own Address 2
  301. (++) General call mode
  302. (++) Nostretch mode
  303. (+) Call the function HAL_I2C_DeInit() to restore the default configuration
  304. of the selected I2Cx peripheral.
  305. @endverbatim
  306. * @{
  307. */
  308. /**
  309. * @brief Initializes the I2C according to the specified parameters
  310. * in the I2C_InitTypeDef and create the associated handle.
  311. * @param hi2c pointer to a I2C_HandleTypeDef structure that contains
  312. * the configuration information for I2C module
  313. * @retval HAL status
  314. */
  315. HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c)
  316. {
  317. uint32_t freqrange = 0U;
  318. uint32_t pclk1 = 0U;
  319. /* Check the I2C handle allocation */
  320. if(hi2c == NULL)
  321. {
  322. return HAL_ERROR;
  323. }
  324. /* Check the parameters */
  325. assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  326. assert_param(IS_I2C_CLOCK_SPEED(hi2c->Init.ClockSpeed));
  327. assert_param(IS_I2C_DUTY_CYCLE(hi2c->Init.DutyCycle));
  328. assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
  329. assert_param(IS_I2C_ADDRESSING_MODE(hi2c->Init.AddressingMode));
  330. assert_param(IS_I2C_DUAL_ADDRESS(hi2c->Init.DualAddressMode));
  331. assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2));
  332. assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode));
  333. assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode));
  334. if(hi2c->State == HAL_I2C_STATE_RESET)
  335. {
  336. /* Allocate lock resource and initialize it */
  337. hi2c->Lock = HAL_UNLOCKED;
  338. /* Init the low level hardware : GPIO, CLOCK, NVIC */
  339. HAL_I2C_MspInit(hi2c);
  340. }
  341. hi2c->State = HAL_I2C_STATE_BUSY;
  342. /* Disable the selected I2C peripheral */
  343. __HAL_I2C_DISABLE(hi2c);
  344. /* Get PCLK1 frequency */
  345. pclk1 = HAL_RCC_GetPCLK1Freq();
  346. /* Calculate frequency range */
  347. freqrange = I2C_FREQRANGE(pclk1);
  348. /*---------------------------- I2Cx CR2 Configuration ----------------------*/
  349. /* Configure I2Cx: Frequency range */
  350. hi2c->Instance->CR2 = freqrange;
  351. /*---------------------------- I2Cx TRISE Configuration --------------------*/
  352. /* Configure I2Cx: Rise Time */
  353. hi2c->Instance->TRISE = I2C_RISE_TIME(freqrange, hi2c->Init.ClockSpeed);
  354. /*---------------------------- I2Cx CCR Configuration ----------------------*/
  355. /* Configure I2Cx: Speed */
  356. hi2c->Instance->CCR = I2C_SPEED(pclk1, hi2c->Init.ClockSpeed, hi2c->Init.DutyCycle);
  357. /*---------------------------- I2Cx CR1 Configuration ----------------------*/
  358. /* Configure I2Cx: Generalcall and NoStretch mode */
  359. hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode);
  360. /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
  361. /* Configure I2Cx: Own Address1 and addressing mode */
  362. hi2c->Instance->OAR1 = (hi2c->Init.AddressingMode | hi2c->Init.OwnAddress1);
  363. /*---------------------------- I2Cx OAR2 Configuration ---------------------*/
  364. /* Configure I2Cx: Dual mode and Own Address2 */
  365. hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2);
  366. /* Enable the selected I2C peripheral */
  367. __HAL_I2C_ENABLE(hi2c);
  368. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  369. hi2c->State = HAL_I2C_STATE_READY;
  370. hi2c->PreviousState = I2C_STATE_NONE;
  371. hi2c->Mode = HAL_I2C_MODE_NONE;
  372. return HAL_OK;
  373. }
  374. /**
  375. * @brief DeInitializes the I2C peripheral.
  376. * @param hi2c pointer to a I2C_HandleTypeDef structure that contains
  377. * the configuration information for I2C module
  378. * @retval HAL status
  379. */
  380. HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c)
  381. {
  382. /* Check the I2C handle allocation */
  383. if(hi2c == NULL)
  384. {
  385. return HAL_ERROR;
  386. }
  387. /* Check the parameters */
  388. assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
  389. hi2c->State = HAL_I2C_STATE_BUSY;
  390. /* Disable the I2C Peripheral Clock */
  391. __HAL_I2C_DISABLE(hi2c);
  392. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  393. HAL_I2C_MspDeInit(hi2c);
  394. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  395. hi2c->State = HAL_I2C_STATE_RESET;
  396. hi2c->PreviousState = I2C_STATE_NONE;
  397. hi2c->Mode = HAL_I2C_MODE_NONE;
  398. /* Release Lock */
  399. __HAL_UNLOCK(hi2c);
  400. return HAL_OK;
  401. }
  402. /**
  403. * @brief I2C MSP Init.
  404. * @param hi2c pointer to a I2C_HandleTypeDef structure that contains
  405. * the configuration information for I2C module
  406. * @retval None
  407. */
  408. __weak void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c)
  409. {
  410. /* Prevent unused argument(s) compilation warning */
  411. UNUSED(hi2c);
  412. /* NOTE : This function Should not be modified, when the callback is needed,
  413. the HAL_I2C_MspInit could be implemented in the user file
  414. */
  415. }
  416. /**
  417. * @brief I2C MSP DeInit
  418. * @param hi2c pointer to a I2C_HandleTypeDef structure that contains
  419. * the configuration information for I2C module
  420. * @retval None
  421. */
  422. __weak void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c)
  423. {
  424. /* Prevent unused argument(s) compilation warning */
  425. UNUSED(hi2c);
  426. /* NOTE : This function Should not be modified, when the callback is needed,
  427. the HAL_I2C_MspDeInit could be implemented in the user file
  428. */
  429. }
  430. /**
  431. * @}
  432. */
  433. /** @defgroup I2C_Exported_Functions_Group2 IO operation functions
  434. * @brief Data transfers functions
  435. *
  436. @verbatim
  437. ===============================================================================
  438. ##### IO operation functions #####
  439. ===============================================================================
  440. [..]
  441. This subsection provides a set of functions allowing to manage the I2C data
  442. transfers.
  443. (#) There are two modes of transfer:
  444. (++) Blocking mode : The communication is performed in the polling mode.
  445. The status of all data processing is returned by the same function
  446. after finishing transfer.
  447. (++) No-Blocking mode : The communication is performed using Interrupts
  448. or DMA. These functions return the status of the transfer startup.
  449. The end of the data processing will be indicated through the
  450. dedicated I2C IRQ when using Interrupt mode or the DMA IRQ when
  451. using DMA mode.
  452. (#) Blocking mode functions are :
  453. (++) HAL_I2C_Master_Transmit()
  454. (++) HAL_I2C_Master_Receive()
  455. (++) HAL_I2C_Slave_Transmit()
  456. (++) HAL_I2C_Slave_Receive()
  457. (++) HAL_I2C_Mem_Write()
  458. (++) HAL_I2C_Mem_Read()
  459. (++) HAL_I2C_IsDeviceReady()
  460. (#) No-Blocking mode functions with Interrupt are :
  461. (++) HAL_I2C_Master_Transmit_IT()
  462. (++) HAL_I2C_Master_Receive_IT()
  463. (++) HAL_I2C_Slave_Transmit_IT()
  464. (++) HAL_I2C_Slave_Receive_IT()
  465. (++) HAL_I2C_Master_Sequential_Transmit_IT()
  466. (++) HAL_I2C_Master_Sequential_Receive_IT()
  467. (++) HAL_I2C_Slave_Sequential_Transmit_IT()
  468. (++) HAL_I2C_Slave_Sequential_Receive_IT()
  469. (++) HAL_I2C_Mem_Write_IT()
  470. (++) HAL_I2C_Mem_Read_IT()
  471. (#) No-Blocking mode functions with DMA are :
  472. (++) HAL_I2C_Master_Transmit_DMA()
  473. (++) HAL_I2C_Master_Receive_DMA()
  474. (++) HAL_I2C_Slave_Transmit_DMA()
  475. (++) HAL_I2C_Slave_Receive_DMA()
  476. (++) HAL_I2C_Mem_Write_DMA()
  477. (++) HAL_I2C_Mem_Read_DMA()
  478. (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
  479. (++) HAL_I2C_MemTxCpltCallback()
  480. (++) HAL_I2C_MemRxCpltCallback()
  481. (++) HAL_I2C_MasterTxCpltCallback()
  482. (++) HAL_I2C_MasterRxCpltCallback()
  483. (++) HAL_I2C_SlaveTxCpltCallback()
  484. (++) HAL_I2C_SlaveRxCpltCallback()
  485. (++) HAL_I2C_ErrorCallback()
  486. (++) HAL_I2C_AbortCpltCallback()
  487. @endverbatim
  488. * @{
  489. */
  490. /**
  491. * @brief Transmits in master mode an amount of data in blocking mode.
  492. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  493. * the configuration information for the specified I2C.
  494. * @param DevAddress Target device address The device 7 bits address value
  495. * in datasheet must be shifted to the left before calling the interface
  496. * @param pData Pointer to data buffer
  497. * @param Size Amount of data to be sent
  498. * @param Timeout Timeout duration
  499. * @retval HAL status
  500. */
  501. HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  502. {
  503. uint32_t tickstart = 0x00U;
  504. /* Init tickstart for timeout management*/
  505. tickstart = HAL_GetTick();
  506. if(hi2c->State == HAL_I2C_STATE_READY)
  507. {
  508. /* Wait until BUSY flag is reset */
  509. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  510. {
  511. return HAL_BUSY;
  512. }
  513. /* Process Locked */
  514. __HAL_LOCK(hi2c);
  515. /* Check if the I2C is already enabled */
  516. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  517. {
  518. /* Enable I2C peripheral */
  519. __HAL_I2C_ENABLE(hi2c);
  520. }
  521. /* Disable Pos */
  522. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  523. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  524. hi2c->Mode = HAL_I2C_MODE_MASTER;
  525. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  526. /* Prepare transfer parameters */
  527. hi2c->pBuffPtr = pData;
  528. hi2c->XferCount = Size;
  529. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  530. hi2c->XferSize = hi2c->XferCount;
  531. /* Send Slave Address */
  532. if(I2C_MasterRequestWrite(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  533. {
  534. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  535. {
  536. /* Process Unlocked */
  537. __HAL_UNLOCK(hi2c);
  538. return HAL_ERROR;
  539. }
  540. else
  541. {
  542. /* Process Unlocked */
  543. __HAL_UNLOCK(hi2c);
  544. return HAL_TIMEOUT;
  545. }
  546. }
  547. /* Clear ADDR flag */
  548. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  549. while(hi2c->XferSize > 0U)
  550. {
  551. /* Wait until TXE flag is set */
  552. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  553. {
  554. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  555. {
  556. /* Generate Stop */
  557. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  558. return HAL_ERROR;
  559. }
  560. else
  561. {
  562. return HAL_TIMEOUT;
  563. }
  564. }
  565. /* Write data to DR */
  566. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  567. hi2c->XferCount--;
  568. hi2c->XferSize--;
  569. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  570. {
  571. /* Write data to DR */
  572. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  573. hi2c->XferCount--;
  574. hi2c->XferSize--;
  575. }
  576. /* Wait until BTF flag is set */
  577. if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  578. {
  579. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  580. {
  581. /* Generate Stop */
  582. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  583. return HAL_ERROR;
  584. }
  585. else
  586. {
  587. return HAL_TIMEOUT;
  588. }
  589. }
  590. }
  591. /* Generate Stop */
  592. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  593. hi2c->State = HAL_I2C_STATE_READY;
  594. hi2c->Mode = HAL_I2C_MODE_NONE;
  595. /* Process Unlocked */
  596. __HAL_UNLOCK(hi2c);
  597. return HAL_OK;
  598. }
  599. else
  600. {
  601. return HAL_BUSY;
  602. }
  603. }
  604. /**
  605. * @brief Receives in master mode an amount of data in blocking mode.
  606. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  607. * the configuration information for the specified I2C.
  608. * @param DevAddress Target device address The device 7 bits address value
  609. * in datasheet must be shifted to the left before calling the interface
  610. * @param pData Pointer to data buffer
  611. * @param Size Amount of data to be sent
  612. * @param Timeout Timeout duration
  613. * @retval HAL status
  614. */
  615. HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  616. {
  617. uint32_t tickstart = 0x00U;
  618. /* Init tickstart for timeout management*/
  619. tickstart = HAL_GetTick();
  620. if(hi2c->State == HAL_I2C_STATE_READY)
  621. {
  622. /* Wait until BUSY flag is reset */
  623. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  624. {
  625. return HAL_BUSY;
  626. }
  627. /* Process Locked */
  628. __HAL_LOCK(hi2c);
  629. /* Check if the I2C is already enabled */
  630. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  631. {
  632. /* Enable I2C peripheral */
  633. __HAL_I2C_ENABLE(hi2c);
  634. }
  635. /* Disable Pos */
  636. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  637. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  638. hi2c->Mode = HAL_I2C_MODE_MASTER;
  639. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  640. /* Prepare transfer parameters */
  641. hi2c->pBuffPtr = pData;
  642. hi2c->XferCount = Size;
  643. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  644. hi2c->XferSize = hi2c->XferCount;
  645. /* Send Slave Address */
  646. if(I2C_MasterRequestRead(hi2c, DevAddress, Timeout, tickstart) != HAL_OK)
  647. {
  648. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  649. {
  650. /* Process Unlocked */
  651. __HAL_UNLOCK(hi2c);
  652. return HAL_ERROR;
  653. }
  654. else
  655. {
  656. /* Process Unlocked */
  657. __HAL_UNLOCK(hi2c);
  658. return HAL_TIMEOUT;
  659. }
  660. }
  661. if(hi2c->XferSize == 0U)
  662. {
  663. /* Clear ADDR flag */
  664. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  665. /* Generate Stop */
  666. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  667. }
  668. else if(hi2c->XferSize == 1U)
  669. {
  670. /* Disable Acknowledge */
  671. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  672. /* Clear ADDR flag */
  673. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  674. /* Generate Stop */
  675. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  676. }
  677. else if(hi2c->XferSize == 2U)
  678. {
  679. /* Disable Acknowledge */
  680. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  681. /* Enable Pos */
  682. hi2c->Instance->CR1 |= I2C_CR1_POS;
  683. /* Clear ADDR flag */
  684. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  685. }
  686. else
  687. {
  688. /* Enable Acknowledge */
  689. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  690. /* Clear ADDR flag */
  691. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  692. }
  693. while(hi2c->XferSize > 0U)
  694. {
  695. if(hi2c->XferSize <= 3U)
  696. {
  697. /* One byte */
  698. if(hi2c->XferSize == 1U)
  699. {
  700. /* Wait until RXNE flag is set */
  701. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  702. {
  703. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  704. {
  705. return HAL_TIMEOUT;
  706. }
  707. else
  708. {
  709. return HAL_ERROR;
  710. }
  711. }
  712. /* Read data from DR */
  713. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  714. hi2c->XferSize--;
  715. hi2c->XferCount--;
  716. }
  717. /* Two bytes */
  718. else if(hi2c->XferSize == 2U)
  719. {
  720. /* Wait until BTF flag is set */
  721. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  722. {
  723. return HAL_TIMEOUT;
  724. }
  725. /* Generate Stop */
  726. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  727. /* Read data from DR */
  728. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  729. hi2c->XferSize--;
  730. hi2c->XferCount--;
  731. /* Read data from DR */
  732. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  733. hi2c->XferSize--;
  734. hi2c->XferCount--;
  735. }
  736. /* 3 Last bytes */
  737. else
  738. {
  739. /* Wait until BTF flag is set */
  740. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  741. {
  742. return HAL_TIMEOUT;
  743. }
  744. /* Disable Acknowledge */
  745. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  746. /* Read data from DR */
  747. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  748. hi2c->XferSize--;
  749. hi2c->XferCount--;
  750. /* Wait until BTF flag is set */
  751. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  752. {
  753. return HAL_TIMEOUT;
  754. }
  755. /* Generate Stop */
  756. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  757. /* Read data from DR */
  758. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  759. hi2c->XferSize--;
  760. hi2c->XferCount--;
  761. /* Read data from DR */
  762. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  763. hi2c->XferSize--;
  764. hi2c->XferCount--;
  765. }
  766. }
  767. else
  768. {
  769. /* Wait until RXNE flag is set */
  770. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  771. {
  772. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  773. {
  774. return HAL_TIMEOUT;
  775. }
  776. else
  777. {
  778. return HAL_ERROR;
  779. }
  780. }
  781. /* Read data from DR */
  782. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  783. hi2c->XferSize--;
  784. hi2c->XferCount--;
  785. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  786. {
  787. /* Read data from DR */
  788. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  789. hi2c->XferSize--;
  790. hi2c->XferCount--;
  791. }
  792. }
  793. }
  794. hi2c->State = HAL_I2C_STATE_READY;
  795. hi2c->Mode = HAL_I2C_MODE_NONE;
  796. /* Process Unlocked */
  797. __HAL_UNLOCK(hi2c);
  798. return HAL_OK;
  799. }
  800. else
  801. {
  802. return HAL_BUSY;
  803. }
  804. }
  805. /**
  806. * @brief Transmits in slave mode an amount of data in blocking mode.
  807. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  808. * the configuration information for the specified I2C.
  809. * @param pData Pointer to data buffer
  810. * @param Size Amount of data to be sent
  811. * @param Timeout Timeout duration
  812. * @retval HAL status
  813. */
  814. HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  815. {
  816. uint32_t tickstart = 0x00U;
  817. /* Init tickstart for timeout management*/
  818. tickstart = HAL_GetTick();
  819. if(hi2c->State == HAL_I2C_STATE_READY)
  820. {
  821. if((pData == NULL) || (Size == 0U))
  822. {
  823. return HAL_ERROR;
  824. }
  825. /* Process Locked */
  826. __HAL_LOCK(hi2c);
  827. /* Check if the I2C is already enabled */
  828. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  829. {
  830. /* Enable I2C peripheral */
  831. __HAL_I2C_ENABLE(hi2c);
  832. }
  833. /* Disable Pos */
  834. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  835. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  836. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  837. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  838. /* Prepare transfer parameters */
  839. hi2c->pBuffPtr = pData;
  840. hi2c->XferCount = Size;
  841. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  842. hi2c->XferSize = hi2c->XferCount;
  843. /* Enable Address Acknowledge */
  844. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  845. /* Wait until ADDR flag is set */
  846. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  847. {
  848. return HAL_TIMEOUT;
  849. }
  850. /* Clear ADDR flag */
  851. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  852. /* If 10bit addressing mode is selected */
  853. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT)
  854. {
  855. /* Wait until ADDR flag is set */
  856. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  857. {
  858. return HAL_TIMEOUT;
  859. }
  860. /* Clear ADDR flag */
  861. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  862. }
  863. while(hi2c->XferSize > 0U)
  864. {
  865. /* Wait until TXE flag is set */
  866. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  867. {
  868. /* Disable Address Acknowledge */
  869. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  870. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  871. {
  872. return HAL_ERROR;
  873. }
  874. else
  875. {
  876. return HAL_TIMEOUT;
  877. }
  878. }
  879. /* Write data to DR */
  880. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  881. hi2c->XferCount--;
  882. hi2c->XferSize--;
  883. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  884. {
  885. /* Write data to DR */
  886. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  887. hi2c->XferCount--;
  888. hi2c->XferSize--;
  889. }
  890. }
  891. /* Wait until AF flag is set */
  892. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_AF, RESET, Timeout, tickstart) != HAL_OK)
  893. {
  894. return HAL_TIMEOUT;
  895. }
  896. /* Clear AF flag */
  897. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  898. /* Disable Address Acknowledge */
  899. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  900. hi2c->State = HAL_I2C_STATE_READY;
  901. hi2c->Mode = HAL_I2C_MODE_NONE;
  902. /* Process Unlocked */
  903. __HAL_UNLOCK(hi2c);
  904. return HAL_OK;
  905. }
  906. else
  907. {
  908. return HAL_BUSY;
  909. }
  910. }
  911. /**
  912. * @brief Receive in slave mode an amount of data in blocking mode
  913. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  914. * the configuration information for the specified I2C.
  915. * @param pData Pointer to data buffer
  916. * @param Size Amount of data to be sent
  917. * @param Timeout Timeout duration
  918. * @retval HAL status
  919. */
  920. HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  921. {
  922. uint32_t tickstart = 0x00U;
  923. /* Init tickstart for timeout management*/
  924. tickstart = HAL_GetTick();
  925. if(hi2c->State == HAL_I2C_STATE_READY)
  926. {
  927. if((pData == NULL) || (Size == 0))
  928. {
  929. return HAL_ERROR;
  930. }
  931. /* Process Locked */
  932. __HAL_LOCK(hi2c);
  933. /* Check if the I2C is already enabled */
  934. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  935. {
  936. /* Enable I2C peripheral */
  937. __HAL_I2C_ENABLE(hi2c);
  938. }
  939. /* Disable Pos */
  940. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  941. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  942. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  943. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  944. /* Prepare transfer parameters */
  945. hi2c->pBuffPtr = pData;
  946. hi2c->XferCount = Size;
  947. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  948. hi2c->XferSize = hi2c->XferCount;
  949. /* Enable Address Acknowledge */
  950. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  951. /* Wait until ADDR flag is set */
  952. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, RESET, Timeout, tickstart) != HAL_OK)
  953. {
  954. return HAL_TIMEOUT;
  955. }
  956. /* Clear ADDR flag */
  957. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  958. while(hi2c->XferSize > 0U)
  959. {
  960. /* Wait until RXNE flag is set */
  961. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  962. {
  963. /* Disable Address Acknowledge */
  964. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  965. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  966. {
  967. return HAL_TIMEOUT;
  968. }
  969. else
  970. {
  971. return HAL_ERROR;
  972. }
  973. }
  974. /* Read data from DR */
  975. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  976. hi2c->XferSize--;
  977. hi2c->XferCount--;
  978. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (Size != 0U))
  979. {
  980. /* Read data from DR */
  981. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  982. hi2c->XferSize--;
  983. hi2c->XferCount--;
  984. }
  985. }
  986. /* Wait until STOP flag is set */
  987. if(I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  988. {
  989. /* Disable Address Acknowledge */
  990. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  991. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  992. {
  993. return HAL_ERROR;
  994. }
  995. else
  996. {
  997. return HAL_TIMEOUT;
  998. }
  999. }
  1000. /* Clear STOP flag */
  1001. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  1002. /* Disable Address Acknowledge */
  1003. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1004. hi2c->State = HAL_I2C_STATE_READY;
  1005. hi2c->Mode = HAL_I2C_MODE_NONE;
  1006. /* Process Unlocked */
  1007. __HAL_UNLOCK(hi2c);
  1008. return HAL_OK;
  1009. }
  1010. else
  1011. {
  1012. return HAL_BUSY;
  1013. }
  1014. }
  1015. /**
  1016. * @brief Transmit in master mode an amount of data in non-blocking mode with Interrupt
  1017. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1018. * the configuration information for the specified I2C.
  1019. * @param DevAddress Target device address The device 7 bits address value
  1020. * in datasheet must be shifted to the left before calling the interface
  1021. * @param pData Pointer to data buffer
  1022. * @param Size Amount of data to be sent
  1023. * @retval HAL status
  1024. */
  1025. HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1026. {
  1027. __IO uint32_t count = 0U;
  1028. if(hi2c->State == HAL_I2C_STATE_READY)
  1029. {
  1030. /* Wait until BUSY flag is reset */
  1031. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1032. do
  1033. {
  1034. if(count-- == 0U)
  1035. {
  1036. hi2c->PreviousState = I2C_STATE_NONE;
  1037. hi2c->State= HAL_I2C_STATE_READY;
  1038. /* Process Unlocked */
  1039. __HAL_UNLOCK(hi2c);
  1040. return HAL_TIMEOUT;
  1041. }
  1042. }
  1043. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1044. /* Process Locked */
  1045. __HAL_LOCK(hi2c);
  1046. /* Check if the I2C is already enabled */
  1047. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1048. {
  1049. /* Enable I2C peripheral */
  1050. __HAL_I2C_ENABLE(hi2c);
  1051. }
  1052. /* Disable Pos */
  1053. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1054. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1055. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1056. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1057. /* Prepare transfer parameters */
  1058. hi2c->pBuffPtr = pData;
  1059. hi2c->XferCount = Size;
  1060. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1061. hi2c->XferSize = hi2c->XferCount;
  1062. hi2c->Devaddress = DevAddress;
  1063. /* Generate Start */
  1064. hi2c->Instance->CR1 |= I2C_CR1_START;
  1065. /* Process Unlocked */
  1066. __HAL_UNLOCK(hi2c);
  1067. /* Note : The I2C interrupts must be enabled after unlocking current process
  1068. to avoid the risk of I2C interrupt handle execution before current
  1069. process unlock */
  1070. /* Enable EVT, BUF and ERR interrupt */
  1071. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1072. return HAL_OK;
  1073. }
  1074. else
  1075. {
  1076. return HAL_BUSY;
  1077. }
  1078. }
  1079. /**
  1080. * @brief Receive in master mode an amount of data in non-blocking mode with Interrupt
  1081. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1082. * the configuration information for the specified I2C.
  1083. * @param DevAddress Target device address The device 7 bits address value
  1084. * in datasheet must be shifted to the left before calling the interface
  1085. * @param pData Pointer to data buffer
  1086. * @param Size Amount of data to be sent
  1087. * @retval HAL status
  1088. */
  1089. HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1090. {
  1091. __IO uint32_t count = 0U;
  1092. if(hi2c->State == HAL_I2C_STATE_READY)
  1093. {
  1094. /* Wait until BUSY flag is reset */
  1095. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1096. do
  1097. {
  1098. if(count-- == 0U)
  1099. {
  1100. hi2c->PreviousState = I2C_STATE_NONE;
  1101. hi2c->State= HAL_I2C_STATE_READY;
  1102. /* Process Unlocked */
  1103. __HAL_UNLOCK(hi2c);
  1104. return HAL_TIMEOUT;
  1105. }
  1106. }
  1107. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1108. /* Process Locked */
  1109. __HAL_LOCK(hi2c);
  1110. /* Check if the I2C is already enabled */
  1111. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1112. {
  1113. /* Enable I2C peripheral */
  1114. __HAL_I2C_ENABLE(hi2c);
  1115. }
  1116. /* Disable Pos */
  1117. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1118. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1119. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1120. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1121. /* Prepare transfer parameters */
  1122. hi2c->pBuffPtr = pData;
  1123. hi2c->XferCount = Size;
  1124. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1125. hi2c->XferSize = hi2c->XferCount;
  1126. hi2c->Devaddress = DevAddress;
  1127. /* Enable Acknowledge */
  1128. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1129. /* Generate Start */
  1130. hi2c->Instance->CR1 |= I2C_CR1_START;
  1131. /* Process Unlocked */
  1132. __HAL_UNLOCK(hi2c);
  1133. /* Note : The I2C interrupts must be enabled after unlocking current process
  1134. to avoid the risk of I2C interrupt handle execution before current
  1135. process unlock */
  1136. /* Enable EVT, BUF and ERR interrupt */
  1137. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1138. return HAL_OK;
  1139. }
  1140. else
  1141. {
  1142. return HAL_BUSY;
  1143. }
  1144. }
  1145. /**
  1146. * @brief Sequential transmit in master mode an amount of data in non-blocking mode with Interrupt
  1147. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1148. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1149. * the configuration information for the specified I2C.
  1150. * @param DevAddress Target device address The device 7 bits address value
  1151. * in datasheet must be shifted to the left before calling the interface
  1152. * @param pData Pointer to data buffer
  1153. * @param Size Amount of data to be sent
  1154. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1155. * @retval HAL status
  1156. */
  1157. HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1158. {
  1159. __IO uint32_t Prev_State = 0x00U;
  1160. __IO uint32_t count = 0x00U;
  1161. /* Check the parameters */
  1162. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1163. if(hi2c->State == HAL_I2C_STATE_READY)
  1164. {
  1165. /* Check Busy Flag only if FIRST call of Master interface */
  1166. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1167. {
  1168. /* Wait until BUSY flag is reset */
  1169. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1170. do
  1171. {
  1172. if(count-- == 0U)
  1173. {
  1174. hi2c->PreviousState = I2C_STATE_NONE;
  1175. hi2c->State= HAL_I2C_STATE_READY;
  1176. /* Process Unlocked */
  1177. __HAL_UNLOCK(hi2c);
  1178. return HAL_TIMEOUT;
  1179. }
  1180. }
  1181. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1182. }
  1183. /* Process Locked */
  1184. __HAL_LOCK(hi2c);
  1185. /* Check if the I2C is already enabled */
  1186. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1187. {
  1188. /* Enable I2C peripheral */
  1189. __HAL_I2C_ENABLE(hi2c);
  1190. }
  1191. /* Disable Pos */
  1192. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1193. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1194. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1195. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1196. /* Prepare transfer parameters */
  1197. hi2c->pBuffPtr = pData;
  1198. hi2c->XferCount = Size;
  1199. hi2c->XferOptions = XferOptions;
  1200. hi2c->XferSize = hi2c->XferCount;
  1201. hi2c->Devaddress = DevAddress;
  1202. Prev_State = hi2c->PreviousState;
  1203. /* Generate Start */
  1204. if((Prev_State == I2C_STATE_MASTER_BUSY_RX) || (Prev_State == I2C_STATE_NONE))
  1205. {
  1206. /* Generate Start condition if first transfer */
  1207. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1208. {
  1209. /* Generate Start */
  1210. hi2c->Instance->CR1 |= I2C_CR1_START;
  1211. }
  1212. else
  1213. {
  1214. /* Generate ReStart */
  1215. hi2c->Instance->CR1 |= I2C_CR1_START;
  1216. }
  1217. }
  1218. /* Process Unlocked */
  1219. __HAL_UNLOCK(hi2c);
  1220. /* Note : The I2C interrupts must be enabled after unlocking current process
  1221. to avoid the risk of I2C interrupt handle execution before current
  1222. process unlock */
  1223. /* Enable EVT, BUF and ERR interrupt */
  1224. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1225. return HAL_OK;
  1226. }
  1227. else
  1228. {
  1229. return HAL_BUSY;
  1230. }
  1231. }
  1232. /**
  1233. * @brief Sequential receive in master mode an amount of data in non-blocking mode with Interrupt
  1234. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1235. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1236. * the configuration information for the specified I2C.
  1237. * @param DevAddress Target device address The device 7 bits address value
  1238. * in datasheet must be shifted to the left before calling the interface
  1239. * @param pData Pointer to data buffer
  1240. * @param Size Amount of data to be sent
  1241. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1242. * @retval HAL status
  1243. */
  1244. HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1245. {
  1246. __IO uint32_t count = 0U;
  1247. /* Check the parameters */
  1248. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1249. if(hi2c->State == HAL_I2C_STATE_READY)
  1250. {
  1251. /* Check Busy Flag only if FIRST call of Master interface */
  1252. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
  1253. {
  1254. /* Wait until BUSY flag is reset */
  1255. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1256. do
  1257. {
  1258. if(count-- == 0U)
  1259. {
  1260. hi2c->PreviousState = I2C_STATE_NONE;
  1261. hi2c->State= HAL_I2C_STATE_READY;
  1262. /* Process Unlocked */
  1263. __HAL_UNLOCK(hi2c);
  1264. return HAL_TIMEOUT;
  1265. }
  1266. }
  1267. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1268. }
  1269. /* Process Locked */
  1270. __HAL_LOCK(hi2c);
  1271. /* Check if the I2C is already enabled */
  1272. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1273. {
  1274. /* Enable I2C peripheral */
  1275. __HAL_I2C_ENABLE(hi2c);
  1276. }
  1277. /* Disable Pos */
  1278. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1279. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1280. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1281. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1282. /* Prepare transfer parameters */
  1283. hi2c->pBuffPtr = pData;
  1284. hi2c->XferCount = Size;
  1285. hi2c->XferOptions = XferOptions;
  1286. hi2c->XferSize = hi2c->XferCount;
  1287. hi2c->Devaddress = DevAddress;
  1288. if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
  1289. {
  1290. /* Generate Start condition if first transfer */
  1291. if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
  1292. {
  1293. /* Enable Acknowledge */
  1294. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1295. /* Generate Start */
  1296. hi2c->Instance->CR1 |= I2C_CR1_START;
  1297. }
  1298. else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
  1299. {
  1300. /* Enable Acknowledge */
  1301. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1302. /* Generate ReStart */
  1303. hi2c->Instance->CR1 |= I2C_CR1_START;
  1304. }
  1305. }
  1306. /* Process Unlocked */
  1307. __HAL_UNLOCK(hi2c);
  1308. /* Note : The I2C interrupts must be enabled after unlocking current process
  1309. to avoid the risk of I2C interrupt handle execution before current
  1310. process unlock */
  1311. /* Enable EVT, BUF and ERR interrupt */
  1312. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1313. return HAL_OK;
  1314. }
  1315. else
  1316. {
  1317. return HAL_BUSY;
  1318. }
  1319. }
  1320. /**
  1321. * @brief Transmit in slave mode an amount of data in non-blocking mode with Interrupt
  1322. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1323. * the configuration information for the specified I2C.
  1324. * @param pData Pointer to data buffer
  1325. * @param Size Amount of data to be sent
  1326. * @retval HAL status
  1327. */
  1328. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1329. {
  1330. __IO uint32_t count = 0U;
  1331. if(hi2c->State == HAL_I2C_STATE_READY)
  1332. {
  1333. if((pData == NULL) || (Size == 0U))
  1334. {
  1335. return HAL_ERROR;
  1336. }
  1337. /* Wait until BUSY flag is reset */
  1338. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1339. do
  1340. {
  1341. if(count-- == 0U)
  1342. {
  1343. hi2c->PreviousState = I2C_STATE_NONE;
  1344. hi2c->State= HAL_I2C_STATE_READY;
  1345. /* Process Unlocked */
  1346. __HAL_UNLOCK(hi2c);
  1347. return HAL_TIMEOUT;
  1348. }
  1349. }
  1350. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1351. /* Process Locked */
  1352. __HAL_LOCK(hi2c);
  1353. /* Check if the I2C is already enabled */
  1354. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1355. {
  1356. /* Enable I2C peripheral */
  1357. __HAL_I2C_ENABLE(hi2c);
  1358. }
  1359. /* Disable Pos */
  1360. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1361. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1362. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1363. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1364. /* Prepare transfer parameters */
  1365. hi2c->pBuffPtr = pData;
  1366. hi2c->XferCount = Size;
  1367. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1368. hi2c->XferSize = hi2c->XferCount;
  1369. /* Enable Address Acknowledge */
  1370. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1371. /* Process Unlocked */
  1372. __HAL_UNLOCK(hi2c);
  1373. /* Note : The I2C interrupts must be enabled after unlocking current process
  1374. to avoid the risk of I2C interrupt handle execution before current
  1375. process unlock */
  1376. /* Enable EVT, BUF and ERR interrupt */
  1377. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1378. return HAL_OK;
  1379. }
  1380. else
  1381. {
  1382. return HAL_BUSY;
  1383. }
  1384. }
  1385. /**
  1386. * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
  1387. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1388. * the configuration information for the specified I2C.
  1389. * @param pData Pointer to data buffer
  1390. * @param Size Amount of data to be sent
  1391. * @retval HAL status
  1392. */
  1393. HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1394. {
  1395. __IO uint32_t count = 0U;
  1396. if(hi2c->State == HAL_I2C_STATE_READY)
  1397. {
  1398. if((pData == NULL) || (Size == 0U))
  1399. {
  1400. return HAL_ERROR;
  1401. }
  1402. /* Wait until BUSY flag is reset */
  1403. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1404. do
  1405. {
  1406. if(count-- == 0U)
  1407. {
  1408. hi2c->PreviousState = I2C_STATE_NONE;
  1409. hi2c->State= HAL_I2C_STATE_READY;
  1410. /* Process Unlocked */
  1411. __HAL_UNLOCK(hi2c);
  1412. return HAL_TIMEOUT;
  1413. }
  1414. }
  1415. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1416. /* Process Locked */
  1417. __HAL_LOCK(hi2c);
  1418. /* Check if the I2C is already enabled */
  1419. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1420. {
  1421. /* Enable I2C peripheral */
  1422. __HAL_I2C_ENABLE(hi2c);
  1423. }
  1424. /* Disable Pos */
  1425. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1426. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1427. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1428. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1429. /* Prepare transfer parameters */
  1430. hi2c->pBuffPtr = pData;
  1431. hi2c->XferSize = Size;
  1432. hi2c->XferCount = Size;
  1433. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1434. /* Enable Address Acknowledge */
  1435. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1436. /* Process Unlocked */
  1437. __HAL_UNLOCK(hi2c);
  1438. /* Note : The I2C interrupts must be enabled after unlocking current process
  1439. to avoid the risk of I2C interrupt handle execution before current
  1440. process unlock */
  1441. /* Enable EVT, BUF and ERR interrupt */
  1442. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1443. return HAL_OK;
  1444. }
  1445. else
  1446. {
  1447. return HAL_BUSY;
  1448. }
  1449. }
  1450. /**
  1451. * @brief Sequential transmit in slave mode an amount of data in no-blocking mode with Interrupt
  1452. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1453. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1454. * the configuration information for I2C module
  1455. * @param pData Pointer to data buffer
  1456. * @param Size Amount of data to be sent
  1457. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1458. * @retval HAL status
  1459. */
  1460. HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1461. {
  1462. /* Check the parameters */
  1463. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1464. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1465. {
  1466. if((pData == NULL) || (Size == 0U))
  1467. {
  1468. return HAL_ERROR;
  1469. }
  1470. /* Process Locked */
  1471. __HAL_LOCK(hi2c);
  1472. /* Check if the I2C is already enabled */
  1473. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1474. {
  1475. /* Enable I2C peripheral */
  1476. __HAL_I2C_ENABLE(hi2c);
  1477. }
  1478. /* Disable Pos */
  1479. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1480. hi2c->State = HAL_I2C_STATE_BUSY_TX_LISTEN;
  1481. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1482. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1483. /* Prepare transfer parameters */
  1484. hi2c->pBuffPtr = pData;
  1485. hi2c->XferCount = Size;
  1486. hi2c->XferOptions = XferOptions;
  1487. hi2c->XferSize = hi2c->XferCount;
  1488. /* Clear ADDR flag */
  1489. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1490. /* Process Unlocked */
  1491. __HAL_UNLOCK(hi2c);
  1492. /* Note : The I2C interrupts must be enabled after unlocking current process
  1493. to avoid the risk of I2C interrupt handle execution before current
  1494. process unlock */
  1495. /* Enable EVT, BUF and ERR interrupt */
  1496. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1497. return HAL_OK;
  1498. }
  1499. else
  1500. {
  1501. return HAL_BUSY;
  1502. }
  1503. }
  1504. /**
  1505. * @brief Sequential receive in slave mode an amount of data in non-blocking mode with Interrupt
  1506. * @note This interface allow to manage repeated start condition when a direction change during transfer
  1507. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1508. * the configuration information for the specified I2C.
  1509. * @param pData Pointer to data buffer
  1510. * @param Size Amount of data to be sent
  1511. * @param XferOptions Options of Transfer, value of @ref I2C_XferOptions_definition
  1512. * @retval HAL status
  1513. */
  1514. HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
  1515. {
  1516. /* Check the parameters */
  1517. assert_param(IS_I2C_TRANSFER_OPTIONS_REQUEST(XferOptions));
  1518. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1519. {
  1520. if((pData == NULL) || (Size == 0U))
  1521. {
  1522. return HAL_ERROR;
  1523. }
  1524. /* Process Locked */
  1525. __HAL_LOCK(hi2c);
  1526. /* Check if the I2C is already enabled */
  1527. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1528. {
  1529. /* Enable I2C peripheral */
  1530. __HAL_I2C_ENABLE(hi2c);
  1531. }
  1532. /* Disable Pos */
  1533. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1534. hi2c->State = HAL_I2C_STATE_BUSY_RX_LISTEN;
  1535. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1536. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1537. /* Prepare transfer parameters */
  1538. hi2c->pBuffPtr = pData;
  1539. hi2c->XferCount = Size;
  1540. hi2c->XferOptions = XferOptions;
  1541. hi2c->XferSize = hi2c->XferCount;
  1542. /* Clear ADDR flag */
  1543. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  1544. /* Process Unlocked */
  1545. __HAL_UNLOCK(hi2c);
  1546. /* Note : The I2C interrupts must be enabled after unlocking current process
  1547. to avoid the risk of I2C interrupt handle execution before current
  1548. process unlock */
  1549. /* Enable EVT, BUF and ERR interrupt */
  1550. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1551. return HAL_OK;
  1552. }
  1553. else
  1554. {
  1555. return HAL_BUSY;
  1556. }
  1557. }
  1558. /**
  1559. * @brief Enable the Address listen mode with Interrupt.
  1560. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1561. * the configuration information for the specified I2C.
  1562. * @retval HAL status
  1563. */
  1564. HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c)
  1565. {
  1566. if(hi2c->State == HAL_I2C_STATE_READY)
  1567. {
  1568. hi2c->State = HAL_I2C_STATE_LISTEN;
  1569. /* Check if the I2C is already enabled */
  1570. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1571. {
  1572. /* Enable I2C peripheral */
  1573. __HAL_I2C_ENABLE(hi2c);
  1574. }
  1575. /* Enable Address Acknowledge */
  1576. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1577. /* Enable EVT and ERR interrupt */
  1578. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1579. return HAL_OK;
  1580. }
  1581. else
  1582. {
  1583. return HAL_BUSY;
  1584. }
  1585. }
  1586. /**
  1587. * @brief Disable the Address listen mode with Interrupt.
  1588. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1589. * the configuration information for the specified I2C.
  1590. * @retval HAL status
  1591. */
  1592. HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c)
  1593. {
  1594. /* Declaration of tmp to prevent undefined behavior of volatile usage */
  1595. uint32_t tmp;
  1596. /* Disable Address listen mode only if a transfer is not ongoing */
  1597. if(hi2c->State == HAL_I2C_STATE_LISTEN)
  1598. {
  1599. tmp = (uint32_t)(hi2c->State) & I2C_STATE_MSK;
  1600. hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
  1601. hi2c->State = HAL_I2C_STATE_READY;
  1602. hi2c->Mode = HAL_I2C_MODE_NONE;
  1603. /* Disable Address Acknowledge */
  1604. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1605. /* Disable EVT and ERR interrupt */
  1606. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1607. return HAL_OK;
  1608. }
  1609. else
  1610. {
  1611. return HAL_BUSY;
  1612. }
  1613. }
  1614. /**
  1615. * @brief Transmit in master mode an amount of data in non-blocking mode with DMA
  1616. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1617. * the configuration information for the specified I2C.
  1618. * @param DevAddress Target device address The device 7 bits address value
  1619. * in datasheet must be shifted to the left before calling the interface
  1620. * @param pData Pointer to data buffer
  1621. * @param Size Amount of data to be sent
  1622. * @retval HAL status
  1623. */
  1624. HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1625. {
  1626. __IO uint32_t count = 0U;
  1627. if(hi2c->State == HAL_I2C_STATE_READY)
  1628. {
  1629. /* Wait until BUSY flag is reset */
  1630. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1631. do
  1632. {
  1633. if(count-- == 0U)
  1634. {
  1635. hi2c->PreviousState = I2C_STATE_NONE;
  1636. hi2c->State= HAL_I2C_STATE_READY;
  1637. /* Process Unlocked */
  1638. __HAL_UNLOCK(hi2c);
  1639. return HAL_TIMEOUT;
  1640. }
  1641. }
  1642. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1643. /* Process Locked */
  1644. __HAL_LOCK(hi2c);
  1645. /* Check if the I2C is already enabled */
  1646. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1647. {
  1648. /* Enable I2C peripheral */
  1649. __HAL_I2C_ENABLE(hi2c);
  1650. }
  1651. /* Disable Pos */
  1652. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1653. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1654. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1655. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1656. /* Prepare transfer parameters */
  1657. hi2c->pBuffPtr = pData;
  1658. hi2c->XferCount = Size;
  1659. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1660. hi2c->XferSize = hi2c->XferCount;
  1661. hi2c->Devaddress = DevAddress;
  1662. if(hi2c->XferSize > 0U)
  1663. {
  1664. /* Set the I2C DMA transfer complete callback */
  1665. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  1666. /* Set the DMA error callback */
  1667. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  1668. /* Set the unused DMA callbacks to NULL */
  1669. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  1670. hi2c->hdmatx->XferM1CpltCallback = NULL;
  1671. hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
  1672. hi2c->hdmatx->XferAbortCallback = NULL;
  1673. /* Enable the DMA Stream */
  1674. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  1675. /* Enable Acknowledge */
  1676. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1677. /* Generate Start */
  1678. hi2c->Instance->CR1 |= I2C_CR1_START;
  1679. /* Process Unlocked */
  1680. __HAL_UNLOCK(hi2c);
  1681. /* Note : The I2C interrupts must be enabled after unlocking current process
  1682. to avoid the risk of I2C interrupt handle execution before current
  1683. process unlock */
  1684. /* Enable EVT and ERR interrupt */
  1685. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1686. /* Enable DMA Request */
  1687. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1688. }
  1689. else
  1690. {
  1691. /* Enable Acknowledge */
  1692. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1693. /* Generate Start */
  1694. hi2c->Instance->CR1 |= I2C_CR1_START;
  1695. /* Process Unlocked */
  1696. __HAL_UNLOCK(hi2c);
  1697. /* Note : The I2C interrupts must be enabled after unlocking current process
  1698. to avoid the risk of I2C interrupt handle execution before current
  1699. process unlock */
  1700. /* Enable EVT, BUF and ERR interrupt */
  1701. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1702. }
  1703. return HAL_OK;
  1704. }
  1705. else
  1706. {
  1707. return HAL_BUSY;
  1708. }
  1709. }
  1710. /**
  1711. * @brief Receive in master mode an amount of data in non-blocking mode with DMA
  1712. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1713. * the configuration information for the specified I2C.
  1714. * @param DevAddress Target device address The device 7 bits address value
  1715. * in datasheet must be shifted to the left before calling the interface
  1716. * @param pData Pointer to data buffer
  1717. * @param Size Amount of data to be sent
  1718. * @retval HAL status
  1719. */
  1720. HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size)
  1721. {
  1722. __IO uint32_t count = 0U;
  1723. if(hi2c->State == HAL_I2C_STATE_READY)
  1724. {
  1725. /* Wait until BUSY flag is reset */
  1726. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1727. do
  1728. {
  1729. if(count-- == 0U)
  1730. {
  1731. hi2c->PreviousState = I2C_STATE_NONE;
  1732. hi2c->State= HAL_I2C_STATE_READY;
  1733. /* Process Unlocked */
  1734. __HAL_UNLOCK(hi2c);
  1735. return HAL_TIMEOUT;
  1736. }
  1737. }
  1738. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1739. /* Process Locked */
  1740. __HAL_LOCK(hi2c);
  1741. /* Check if the I2C is already enabled */
  1742. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1743. {
  1744. /* Enable I2C peripheral */
  1745. __HAL_I2C_ENABLE(hi2c);
  1746. }
  1747. /* Disable Pos */
  1748. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1749. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1750. hi2c->Mode = HAL_I2C_MODE_MASTER;
  1751. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1752. /* Prepare transfer parameters */
  1753. hi2c->pBuffPtr = pData;
  1754. hi2c->XferCount = Size;
  1755. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1756. hi2c->XferSize = hi2c->XferCount;
  1757. hi2c->Devaddress = DevAddress;
  1758. if(hi2c->XferSize > 0U)
  1759. {
  1760. /* Set the I2C DMA transfer complete callback */
  1761. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  1762. /* Set the DMA error callback */
  1763. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  1764. /* Set the unused DMA callbacks to NULL */
  1765. hi2c->hdmarx->XferHalfCpltCallback = NULL;
  1766. hi2c->hdmarx->XferM1CpltCallback = NULL;
  1767. hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
  1768. hi2c->hdmarx->XferAbortCallback = NULL;
  1769. /* Enable the DMA Stream */
  1770. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  1771. /* Enable Acknowledge */
  1772. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1773. /* Generate Start */
  1774. hi2c->Instance->CR1 |= I2C_CR1_START;
  1775. /* Process Unlocked */
  1776. __HAL_UNLOCK(hi2c);
  1777. /* Note : The I2C interrupts must be enabled after unlocking current process
  1778. to avoid the risk of I2C interrupt handle execution before current
  1779. process unlock */
  1780. /* Enable EVT and ERR interrupt */
  1781. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1782. /* Enable DMA Request */
  1783. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1784. }
  1785. else
  1786. {
  1787. /* Enable Acknowledge */
  1788. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1789. /* Generate Start */
  1790. hi2c->Instance->CR1 |= I2C_CR1_START;
  1791. /* Process Unlocked */
  1792. __HAL_UNLOCK(hi2c);
  1793. /* Note : The I2C interrupts must be enabled after unlocking current process
  1794. to avoid the risk of I2C interrupt handle execution before current
  1795. process unlock */
  1796. /* Enable EVT, BUF and ERR interrupt */
  1797. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1798. }
  1799. return HAL_OK;
  1800. }
  1801. else
  1802. {
  1803. return HAL_BUSY;
  1804. }
  1805. }
  1806. /**
  1807. * @brief Abort a master I2C process communication with Interrupt.
  1808. * @note This abort can be called only if state is ready
  1809. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1810. * the configuration information for the specified I2C.
  1811. * @param DevAddress Target device address The device 7 bits address value
  1812. * in datasheet must be shifted to the left before calling the interface
  1813. * @retval HAL status
  1814. */
  1815. HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress)
  1816. {
  1817. /* Prevent unused argument(s) compilation warning */
  1818. UNUSED(DevAddress);
  1819. /* Abort Master transfer during Receive or Transmit process */
  1820. if(hi2c->Mode == HAL_I2C_MODE_MASTER)
  1821. {
  1822. /* Process Locked */
  1823. __HAL_LOCK(hi2c);
  1824. hi2c->PreviousState = I2C_STATE_NONE;
  1825. hi2c->State = HAL_I2C_STATE_ABORT;
  1826. /* Disable Acknowledge */
  1827. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  1828. /* Generate Stop */
  1829. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  1830. hi2c->XferCount = 0U;
  1831. /* Disable EVT, BUF and ERR interrupt */
  1832. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  1833. /* Process Unlocked */
  1834. __HAL_UNLOCK(hi2c);
  1835. /* Call the corresponding callback to inform upper layer of End of Transfer */
  1836. I2C_ITError(hi2c);
  1837. return HAL_OK;
  1838. }
  1839. else
  1840. {
  1841. /* Wrong usage of abort function */
  1842. /* This function should be used only in case of abort monitored by master device */
  1843. return HAL_ERROR;
  1844. }
  1845. }
  1846. /**
  1847. * @brief Transmit in slave mode an amount of data in non-blocking mode with DMA
  1848. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1849. * the configuration information for the specified I2C.
  1850. * @param pData Pointer to data buffer
  1851. * @param Size Amount of data to be sent
  1852. * @retval HAL status
  1853. */
  1854. HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1855. {
  1856. __IO uint32_t count = 0U;
  1857. if(hi2c->State == HAL_I2C_STATE_READY)
  1858. {
  1859. if((pData == NULL) || (Size == 0U))
  1860. {
  1861. return HAL_ERROR;
  1862. }
  1863. /* Wait until BUSY flag is reset */
  1864. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1865. do
  1866. {
  1867. if(count-- == 0U)
  1868. {
  1869. hi2c->PreviousState = I2C_STATE_NONE;
  1870. hi2c->State= HAL_I2C_STATE_READY;
  1871. /* Process Unlocked */
  1872. __HAL_UNLOCK(hi2c);
  1873. return HAL_TIMEOUT;
  1874. }
  1875. }
  1876. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1877. /* Process Locked */
  1878. __HAL_LOCK(hi2c);
  1879. /* Check if the I2C is already enabled */
  1880. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1881. {
  1882. /* Enable I2C peripheral */
  1883. __HAL_I2C_ENABLE(hi2c);
  1884. }
  1885. /* Disable Pos */
  1886. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1887. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  1888. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1889. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1890. /* Prepare transfer parameters */
  1891. hi2c->pBuffPtr = pData;
  1892. hi2c->XferCount = Size;
  1893. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1894. hi2c->XferSize = hi2c->XferCount;
  1895. /* Set the I2C DMA transfer complete callback */
  1896. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  1897. /* Set the DMA error callback */
  1898. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  1899. /* Set the unused DMA callbacks to NULL */
  1900. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  1901. hi2c->hdmatx->XferM1CpltCallback = NULL;
  1902. hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
  1903. hi2c->hdmatx->XferAbortCallback = NULL;
  1904. /* Enable the DMA Stream */
  1905. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  1906. /* Enable Address Acknowledge */
  1907. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1908. /* Process Unlocked */
  1909. __HAL_UNLOCK(hi2c);
  1910. /* Note : The I2C interrupts must be enabled after unlocking current process
  1911. to avoid the risk of I2C interrupt handle execution before current
  1912. process unlock */
  1913. /* Enable EVT and ERR interrupt */
  1914. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1915. /* Enable DMA Request */
  1916. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1917. return HAL_OK;
  1918. }
  1919. else
  1920. {
  1921. return HAL_BUSY;
  1922. }
  1923. }
  1924. /**
  1925. * @brief Receive in slave mode an amount of data in non-blocking mode with DMA
  1926. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  1927. * the configuration information for the specified I2C.
  1928. * @param pData Pointer to data buffer
  1929. * @param Size Amount of data to be sent
  1930. * @retval HAL status
  1931. */
  1932. HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
  1933. {
  1934. __IO uint32_t count = 0U;
  1935. if(hi2c->State == HAL_I2C_STATE_READY)
  1936. {
  1937. if((pData == NULL) || (Size == 0U))
  1938. {
  1939. return HAL_ERROR;
  1940. }
  1941. /* Wait until BUSY flag is reset */
  1942. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  1943. do
  1944. {
  1945. if(count-- == 0U)
  1946. {
  1947. hi2c->PreviousState = I2C_STATE_NONE;
  1948. hi2c->State= HAL_I2C_STATE_READY;
  1949. /* Process Unlocked */
  1950. __HAL_UNLOCK(hi2c);
  1951. return HAL_TIMEOUT;
  1952. }
  1953. }
  1954. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  1955. /* Process Locked */
  1956. __HAL_LOCK(hi2c);
  1957. /* Check if the I2C is already enabled */
  1958. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  1959. {
  1960. /* Enable I2C peripheral */
  1961. __HAL_I2C_ENABLE(hi2c);
  1962. }
  1963. /* Disable Pos */
  1964. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  1965. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  1966. hi2c->Mode = HAL_I2C_MODE_SLAVE;
  1967. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  1968. /* Prepare transfer parameters */
  1969. hi2c->pBuffPtr = pData;
  1970. hi2c->XferCount = Size;
  1971. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  1972. hi2c->XferSize = hi2c->XferCount;
  1973. /* Set the I2C DMA transfer complete callback */
  1974. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  1975. /* Set the DMA error callback */
  1976. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  1977. /* Set the unused DMA callbacks to NULL */
  1978. hi2c->hdmarx->XferHalfCpltCallback = NULL;
  1979. hi2c->hdmarx->XferM1CpltCallback = NULL;
  1980. hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
  1981. hi2c->hdmarx->XferAbortCallback = NULL;
  1982. /* Enable the DMA Stream */
  1983. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  1984. /* Enable Address Acknowledge */
  1985. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  1986. /* Process Unlocked */
  1987. __HAL_UNLOCK(hi2c);
  1988. /* Note : The I2C interrupts must be enabled after unlocking current process
  1989. to avoid the risk of I2C interrupt handle execution before current
  1990. process unlock */
  1991. /* Enable EVT and ERR interrupt */
  1992. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  1993. /* Enable DMA Request */
  1994. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  1995. return HAL_OK;
  1996. }
  1997. else
  1998. {
  1999. return HAL_BUSY;
  2000. }
  2001. }
  2002. /**
  2003. * @brief Write an amount of data in blocking mode to a specific memory address
  2004. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2005. * the configuration information for the specified I2C.
  2006. * @param DevAddress Target device address
  2007. * @param MemAddress Internal memory address
  2008. * @param MemAddSize Size of internal memory address
  2009. * @param pData Pointer to data buffer
  2010. * @param Size Amount of data to be sent
  2011. * @param Timeout Timeout duration
  2012. * @retval HAL status
  2013. */
  2014. HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  2015. {
  2016. uint32_t tickstart = 0x00U;
  2017. /* Init tickstart for timeout management*/
  2018. tickstart = HAL_GetTick();
  2019. /* Check the parameters */
  2020. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2021. if(hi2c->State == HAL_I2C_STATE_READY)
  2022. {
  2023. /* Wait until BUSY flag is reset */
  2024. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2025. {
  2026. return HAL_BUSY;
  2027. }
  2028. /* Process Locked */
  2029. __HAL_LOCK(hi2c);
  2030. /* Check if the I2C is already enabled */
  2031. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2032. {
  2033. /* Enable I2C peripheral */
  2034. __HAL_I2C_ENABLE(hi2c);
  2035. }
  2036. /* Disable Pos */
  2037. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2038. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2039. hi2c->Mode = HAL_I2C_MODE_MEM;
  2040. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2041. /* Prepare transfer parameters */
  2042. hi2c->pBuffPtr = pData;
  2043. hi2c->XferCount = Size;
  2044. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2045. hi2c->XferSize = hi2c->XferCount;
  2046. /* Send Slave Address and Memory Address */
  2047. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2048. {
  2049. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2050. {
  2051. /* Process Unlocked */
  2052. __HAL_UNLOCK(hi2c);
  2053. return HAL_ERROR;
  2054. }
  2055. else
  2056. {
  2057. /* Process Unlocked */
  2058. __HAL_UNLOCK(hi2c);
  2059. return HAL_TIMEOUT;
  2060. }
  2061. }
  2062. while(hi2c->XferSize > 0U)
  2063. {
  2064. /* Wait until TXE flag is set */
  2065. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2066. {
  2067. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2068. {
  2069. /* Generate Stop */
  2070. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2071. return HAL_ERROR;
  2072. }
  2073. else
  2074. {
  2075. return HAL_TIMEOUT;
  2076. }
  2077. }
  2078. /* Write data to DR */
  2079. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  2080. hi2c->XferSize--;
  2081. hi2c->XferCount--;
  2082. if((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET) && (hi2c->XferSize != 0U))
  2083. {
  2084. /* Write data to DR */
  2085. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  2086. hi2c->XferSize--;
  2087. hi2c->XferCount--;
  2088. }
  2089. }
  2090. /* Wait until BTF flag is set */
  2091. if(I2C_WaitOnBTFFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2092. {
  2093. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2094. {
  2095. /* Generate Stop */
  2096. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2097. return HAL_ERROR;
  2098. }
  2099. else
  2100. {
  2101. return HAL_TIMEOUT;
  2102. }
  2103. }
  2104. /* Generate Stop */
  2105. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2106. hi2c->State = HAL_I2C_STATE_READY;
  2107. hi2c->Mode = HAL_I2C_MODE_NONE;
  2108. /* Process Unlocked */
  2109. __HAL_UNLOCK(hi2c);
  2110. return HAL_OK;
  2111. }
  2112. else
  2113. {
  2114. return HAL_BUSY;
  2115. }
  2116. }
  2117. /**
  2118. * @brief Read an amount of data in blocking mode from a specific memory address
  2119. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2120. * the configuration information for the specified I2C.
  2121. * @param DevAddress Target device address
  2122. * @param MemAddress Internal memory address
  2123. * @param MemAddSize Size of internal memory address
  2124. * @param pData Pointer to data buffer
  2125. * @param Size Amount of data to be sent
  2126. * @param Timeout Timeout duration
  2127. * @retval HAL status
  2128. */
  2129. HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout)
  2130. {
  2131. uint32_t tickstart = 0x00U;
  2132. /* Init tickstart for timeout management*/
  2133. tickstart = HAL_GetTick();
  2134. /* Check the parameters */
  2135. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2136. if(hi2c->State == HAL_I2C_STATE_READY)
  2137. {
  2138. /* Wait until BUSY flag is reset */
  2139. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2140. {
  2141. return HAL_BUSY;
  2142. }
  2143. /* Process Locked */
  2144. __HAL_LOCK(hi2c);
  2145. /* Check if the I2C is already enabled */
  2146. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2147. {
  2148. /* Enable I2C peripheral */
  2149. __HAL_I2C_ENABLE(hi2c);
  2150. }
  2151. /* Disable Pos */
  2152. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2153. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2154. hi2c->Mode = HAL_I2C_MODE_MEM;
  2155. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2156. /* Prepare transfer parameters */
  2157. hi2c->pBuffPtr = pData;
  2158. hi2c->XferCount = Size;
  2159. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2160. hi2c->XferSize = hi2c->XferCount;
  2161. /* Send Slave Address and Memory Address */
  2162. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK)
  2163. {
  2164. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2165. {
  2166. /* Process Unlocked */
  2167. __HAL_UNLOCK(hi2c);
  2168. return HAL_ERROR;
  2169. }
  2170. else
  2171. {
  2172. /* Process Unlocked */
  2173. __HAL_UNLOCK(hi2c);
  2174. return HAL_TIMEOUT;
  2175. }
  2176. }
  2177. if(hi2c->XferSize == 0U)
  2178. {
  2179. /* Clear ADDR flag */
  2180. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2181. /* Generate Stop */
  2182. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2183. }
  2184. else if(hi2c->XferSize == 1U)
  2185. {
  2186. /* Disable Acknowledge */
  2187. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2188. /* Clear ADDR flag */
  2189. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2190. /* Generate Stop */
  2191. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2192. }
  2193. else if(hi2c->XferSize == 2U)
  2194. {
  2195. /* Disable Acknowledge */
  2196. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2197. /* Enable Pos */
  2198. hi2c->Instance->CR1 |= I2C_CR1_POS;
  2199. /* Clear ADDR flag */
  2200. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2201. }
  2202. else
  2203. {
  2204. /* Clear ADDR flag */
  2205. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2206. }
  2207. while(hi2c->XferSize > 0U)
  2208. {
  2209. if(hi2c->XferSize <= 3U)
  2210. {
  2211. /* One byte */
  2212. if(hi2c->XferSize== 1U)
  2213. {
  2214. /* Wait until RXNE flag is set */
  2215. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2216. {
  2217. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  2218. {
  2219. return HAL_TIMEOUT;
  2220. }
  2221. else
  2222. {
  2223. return HAL_ERROR;
  2224. }
  2225. }
  2226. /* Read data from DR */
  2227. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2228. hi2c->XferSize--;
  2229. hi2c->XferCount--;
  2230. }
  2231. /* Two bytes */
  2232. else if(hi2c->XferSize == 2U)
  2233. {
  2234. /* Wait until BTF flag is set */
  2235. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2236. {
  2237. return HAL_TIMEOUT;
  2238. }
  2239. /* Generate Stop */
  2240. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2241. /* Read data from DR */
  2242. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2243. hi2c->XferSize--;
  2244. hi2c->XferCount--;
  2245. /* Read data from DR */
  2246. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2247. hi2c->XferSize--;
  2248. hi2c->XferCount--;
  2249. }
  2250. /* 3 Last bytes */
  2251. else
  2252. {
  2253. /* Wait until BTF flag is set */
  2254. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2255. {
  2256. return HAL_TIMEOUT;
  2257. }
  2258. /* Disable Acknowledge */
  2259. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2260. /* Read data from DR */
  2261. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2262. hi2c->XferSize--;
  2263. hi2c->XferCount--;
  2264. /* Wait until BTF flag is set */
  2265. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BTF, RESET, Timeout, tickstart) != HAL_OK)
  2266. {
  2267. return HAL_TIMEOUT;
  2268. }
  2269. /* Generate Stop */
  2270. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2271. /* Read data from DR */
  2272. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2273. hi2c->XferSize--;
  2274. hi2c->XferCount--;
  2275. /* Read data from DR */
  2276. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2277. hi2c->XferSize--;
  2278. hi2c->XferCount--;
  2279. }
  2280. }
  2281. else
  2282. {
  2283. /* Wait until RXNE flag is set */
  2284. if(I2C_WaitOnRXNEFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK)
  2285. {
  2286. if(hi2c->ErrorCode == HAL_I2C_ERROR_TIMEOUT)
  2287. {
  2288. return HAL_TIMEOUT;
  2289. }
  2290. else
  2291. {
  2292. return HAL_ERROR;
  2293. }
  2294. }
  2295. /* Read data from DR */
  2296. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2297. hi2c->XferSize--;
  2298. hi2c->XferCount--;
  2299. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  2300. {
  2301. /* Read data from DR */
  2302. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  2303. hi2c->XferSize--;
  2304. hi2c->XferCount--;
  2305. }
  2306. }
  2307. }
  2308. hi2c->State = HAL_I2C_STATE_READY;
  2309. hi2c->Mode = HAL_I2C_MODE_NONE;
  2310. /* Process Unlocked */
  2311. __HAL_UNLOCK(hi2c);
  2312. return HAL_OK;
  2313. }
  2314. else
  2315. {
  2316. return HAL_BUSY;
  2317. }
  2318. }
  2319. /**
  2320. * @brief Write an amount of data in non-blocking mode with Interrupt to a specific memory address
  2321. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2322. * the configuration information for the specified I2C.
  2323. * @param DevAddress Target device address
  2324. * @param MemAddress Internal memory address
  2325. * @param MemAddSize Size of internal memory address
  2326. * @param pData Pointer to data buffer
  2327. * @param Size Amount of data to be sent
  2328. * @retval HAL status
  2329. */
  2330. HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2331. {
  2332. __IO uint32_t count = 0U;
  2333. /* Check the parameters */
  2334. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2335. if(hi2c->State == HAL_I2C_STATE_READY)
  2336. {
  2337. /* Wait until BUSY flag is reset */
  2338. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2339. do
  2340. {
  2341. if(count-- == 0U)
  2342. {
  2343. hi2c->PreviousState = I2C_STATE_NONE;
  2344. hi2c->State= HAL_I2C_STATE_READY;
  2345. /* Process Unlocked */
  2346. __HAL_UNLOCK(hi2c);
  2347. return HAL_TIMEOUT;
  2348. }
  2349. }
  2350. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2351. /* Process Locked */
  2352. __HAL_LOCK(hi2c);
  2353. /* Check if the I2C is already enabled */
  2354. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2355. {
  2356. /* Enable I2C peripheral */
  2357. __HAL_I2C_ENABLE(hi2c);
  2358. }
  2359. /* Disable Pos */
  2360. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2361. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2362. hi2c->Mode = HAL_I2C_MODE_MEM;
  2363. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2364. /* Prepare transfer parameters */
  2365. hi2c->pBuffPtr = pData;
  2366. hi2c->XferSize = Size;
  2367. hi2c->XferCount = Size;
  2368. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2369. hi2c->Devaddress = DevAddress;
  2370. hi2c->Memaddress = MemAddress;
  2371. hi2c->MemaddSize = MemAddSize;
  2372. hi2c->EventCount = 0U;
  2373. /* Generate Start */
  2374. hi2c->Instance->CR1 |= I2C_CR1_START;
  2375. /* Process Unlocked */
  2376. __HAL_UNLOCK(hi2c);
  2377. /* Note : The I2C interrupts must be enabled after unlocking current process
  2378. to avoid the risk of I2C interrupt handle execution before current
  2379. process unlock */
  2380. /* Enable EVT, BUF and ERR interrupt */
  2381. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2382. return HAL_OK;
  2383. }
  2384. else
  2385. {
  2386. return HAL_BUSY;
  2387. }
  2388. }
  2389. /**
  2390. * @brief Read an amount of data in non-blocking mode with Interrupt from a specific memory address
  2391. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2392. * the configuration information for the specified I2C.
  2393. * @param DevAddress Target device address
  2394. * @param MemAddress Internal memory address
  2395. * @param MemAddSize Size of internal memory address
  2396. * @param pData Pointer to data buffer
  2397. * @param Size Amount of data to be sent
  2398. * @retval HAL status
  2399. */
  2400. HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2401. {
  2402. __IO uint32_t count = 0U;
  2403. /* Check the parameters */
  2404. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2405. if(hi2c->State == HAL_I2C_STATE_READY)
  2406. {
  2407. /* Wait until BUSY flag is reset */
  2408. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2409. do
  2410. {
  2411. if(count-- == 0U)
  2412. {
  2413. hi2c->PreviousState = I2C_STATE_NONE;
  2414. hi2c->State= HAL_I2C_STATE_READY;
  2415. /* Process Unlocked */
  2416. __HAL_UNLOCK(hi2c);
  2417. return HAL_TIMEOUT;
  2418. }
  2419. }
  2420. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2421. /* Process Locked */
  2422. __HAL_LOCK(hi2c);
  2423. /* Check if the I2C is already enabled */
  2424. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2425. {
  2426. /* Enable I2C peripheral */
  2427. __HAL_I2C_ENABLE(hi2c);
  2428. }
  2429. /* Disable Pos */
  2430. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2431. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2432. hi2c->Mode = HAL_I2C_MODE_MEM;
  2433. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2434. /* Prepare transfer parameters */
  2435. hi2c->pBuffPtr = pData;
  2436. hi2c->XferSize = Size;
  2437. hi2c->XferCount = Size;
  2438. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2439. hi2c->Devaddress = DevAddress;
  2440. hi2c->Memaddress = MemAddress;
  2441. hi2c->MemaddSize = MemAddSize;
  2442. hi2c->EventCount = 0U;
  2443. /* Enable Acknowledge */
  2444. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  2445. /* Generate Start */
  2446. hi2c->Instance->CR1 |= I2C_CR1_START;
  2447. /* Process Unlocked */
  2448. __HAL_UNLOCK(hi2c);
  2449. if(hi2c->XferSize > 0U)
  2450. {
  2451. /* Note : The I2C interrupts must be enabled after unlocking current process
  2452. to avoid the risk of I2C interrupt handle execution before current
  2453. process unlock */
  2454. /* Enable EVT, BUF and ERR interrupt */
  2455. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  2456. }
  2457. return HAL_OK;
  2458. }
  2459. else
  2460. {
  2461. return HAL_BUSY;
  2462. }
  2463. }
  2464. /**
  2465. * @brief Write an amount of data in non-blocking mode with DMA to a specific memory address
  2466. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2467. * the configuration information for the specified I2C.
  2468. * @param DevAddress Target device address
  2469. * @param MemAddress Internal memory address
  2470. * @param MemAddSize Size of internal memory address
  2471. * @param pData Pointer to data buffer
  2472. * @param Size Amount of data to be sent
  2473. * @retval HAL status
  2474. */
  2475. HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2476. {
  2477. __IO uint32_t count = 0U;
  2478. uint32_t tickstart = 0x00U;
  2479. /* Init tickstart for timeout management*/
  2480. tickstart = HAL_GetTick();
  2481. /* Check the parameters */
  2482. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2483. if(hi2c->State == HAL_I2C_STATE_READY)
  2484. {
  2485. /* Wait until BUSY flag is reset */
  2486. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2487. do
  2488. {
  2489. if(count-- == 0U)
  2490. {
  2491. hi2c->PreviousState = I2C_STATE_NONE;
  2492. hi2c->State= HAL_I2C_STATE_READY;
  2493. /* Process Unlocked */
  2494. __HAL_UNLOCK(hi2c);
  2495. return HAL_TIMEOUT;
  2496. }
  2497. }
  2498. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2499. /* Process Locked */
  2500. __HAL_LOCK(hi2c);
  2501. /* Check if the I2C is already enabled */
  2502. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2503. {
  2504. /* Enable I2C peripheral */
  2505. __HAL_I2C_ENABLE(hi2c);
  2506. }
  2507. /* Disable Pos */
  2508. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2509. hi2c->State = HAL_I2C_STATE_BUSY_TX;
  2510. hi2c->Mode = HAL_I2C_MODE_MEM;
  2511. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2512. /* Prepare transfer parameters */
  2513. hi2c->pBuffPtr = pData;
  2514. hi2c->XferSize = Size;
  2515. hi2c->XferCount = Size;
  2516. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2517. if(hi2c->XferSize > 0U)
  2518. {
  2519. /* Set the I2C DMA transfer complete callback */
  2520. hi2c->hdmatx->XferCpltCallback = I2C_DMAXferCplt;
  2521. /* Set the DMA error callback */
  2522. hi2c->hdmatx->XferErrorCallback = I2C_DMAError;
  2523. /* Set the unused DMA callbacks to NULL */
  2524. hi2c->hdmatx->XferHalfCpltCallback = NULL;
  2525. hi2c->hdmatx->XferM1CpltCallback = NULL;
  2526. hi2c->hdmatx->XferM1HalfCpltCallback = NULL;
  2527. hi2c->hdmatx->XferAbortCallback = NULL;
  2528. /* Enable the DMA Stream */
  2529. HAL_DMA_Start_IT(hi2c->hdmatx, (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->DR, hi2c->XferSize);
  2530. /* Send Slave Address and Memory Address */
  2531. if(I2C_RequestMemoryWrite(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2532. {
  2533. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2534. {
  2535. /* Process Unlocked */
  2536. __HAL_UNLOCK(hi2c);
  2537. return HAL_ERROR;
  2538. }
  2539. else
  2540. {
  2541. /* Process Unlocked */
  2542. __HAL_UNLOCK(hi2c);
  2543. return HAL_TIMEOUT;
  2544. }
  2545. }
  2546. /* Clear ADDR flag */
  2547. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2548. /* Process Unlocked */
  2549. __HAL_UNLOCK(hi2c);
  2550. /* Note : The I2C interrupts must be enabled after unlocking current process
  2551. to avoid the risk of I2C interrupt handle execution before current
  2552. process unlock */
  2553. /* Enable ERR interrupt */
  2554. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  2555. /* Enable DMA Request */
  2556. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  2557. }
  2558. return HAL_OK;
  2559. }
  2560. else
  2561. {
  2562. return HAL_BUSY;
  2563. }
  2564. }
  2565. /**
  2566. * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
  2567. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2568. * the configuration information for the specified I2C.
  2569. * @param DevAddress Target device address
  2570. * @param MemAddress Internal memory address
  2571. * @param MemAddSize Size of internal memory address
  2572. * @param pData Pointer to data buffer
  2573. * @param Size Amount of data to be read
  2574. * @retval HAL status
  2575. */
  2576. HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size)
  2577. {
  2578. uint32_t tickstart = 0x00U;
  2579. __IO uint32_t count = 0U;
  2580. /* Init tickstart for timeout management*/
  2581. tickstart = HAL_GetTick();
  2582. /* Check the parameters */
  2583. assert_param(IS_I2C_MEMADD_SIZE(MemAddSize));
  2584. if(hi2c->State == HAL_I2C_STATE_READY)
  2585. {
  2586. /* Wait until BUSY flag is reset */
  2587. count = I2C_TIMEOUT_BUSY_FLAG * (SystemCoreClock /25U /1000U);
  2588. do
  2589. {
  2590. if(count-- == 0U)
  2591. {
  2592. hi2c->PreviousState = I2C_STATE_NONE;
  2593. hi2c->State= HAL_I2C_STATE_READY;
  2594. /* Process Unlocked */
  2595. __HAL_UNLOCK(hi2c);
  2596. return HAL_TIMEOUT;
  2597. }
  2598. }
  2599. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET);
  2600. /* Process Locked */
  2601. __HAL_LOCK(hi2c);
  2602. /* Check if the I2C is already enabled */
  2603. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2604. {
  2605. /* Enable I2C peripheral */
  2606. __HAL_I2C_ENABLE(hi2c);
  2607. }
  2608. /* Disable Pos */
  2609. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2610. hi2c->State = HAL_I2C_STATE_BUSY_RX;
  2611. hi2c->Mode = HAL_I2C_MODE_MEM;
  2612. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2613. /* Prepare transfer parameters */
  2614. hi2c->pBuffPtr = pData;
  2615. hi2c->XferCount = Size;
  2616. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2617. hi2c->XferSize = hi2c->XferCount;
  2618. if(hi2c->XferSize > 0U)
  2619. {
  2620. /* Set the I2C DMA transfer complete callback */
  2621. hi2c->hdmarx->XferCpltCallback = I2C_DMAXferCplt;
  2622. /* Set the DMA error callback */
  2623. hi2c->hdmarx->XferErrorCallback = I2C_DMAError;
  2624. /* Set the unused DMA callbacks to NULL */
  2625. hi2c->hdmarx->XferHalfCpltCallback = NULL;
  2626. hi2c->hdmarx->XferM1CpltCallback = NULL;
  2627. hi2c->hdmarx->XferM1HalfCpltCallback = NULL;
  2628. hi2c->hdmarx->XferAbortCallback = NULL;
  2629. /* Enable the DMA Stream */
  2630. HAL_DMA_Start_IT(hi2c->hdmarx, (uint32_t)&hi2c->Instance->DR, (uint32_t)hi2c->pBuffPtr, hi2c->XferSize);
  2631. /* Send Slave Address and Memory Address */
  2632. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2633. {
  2634. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2635. {
  2636. /* Process Unlocked */
  2637. __HAL_UNLOCK(hi2c);
  2638. return HAL_ERROR;
  2639. }
  2640. else
  2641. {
  2642. /* Process Unlocked */
  2643. __HAL_UNLOCK(hi2c);
  2644. return HAL_TIMEOUT;
  2645. }
  2646. }
  2647. if(Size == 1U)
  2648. {
  2649. /* Disable Acknowledge */
  2650. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  2651. }
  2652. else
  2653. {
  2654. /* Enable Last DMA bit */
  2655. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  2656. }
  2657. /* Clear ADDR flag */
  2658. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2659. /* Process Unlocked */
  2660. __HAL_UNLOCK(hi2c);
  2661. /* Note : The I2C interrupts must be enabled after unlocking current process
  2662. to avoid the risk of I2C interrupt handle execution before current
  2663. process unlock */
  2664. /* Enable ERR interrupt */
  2665. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_ERR);
  2666. /* Enable DMA Request */
  2667. hi2c->Instance->CR2 |= I2C_CR2_DMAEN;
  2668. }
  2669. else
  2670. {
  2671. /* Send Slave Address and Memory Address */
  2672. if(I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, I2C_TIMEOUT_FLAG, tickstart) != HAL_OK)
  2673. {
  2674. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  2675. {
  2676. /* Process Unlocked */
  2677. __HAL_UNLOCK(hi2c);
  2678. return HAL_ERROR;
  2679. }
  2680. else
  2681. {
  2682. /* Process Unlocked */
  2683. __HAL_UNLOCK(hi2c);
  2684. return HAL_TIMEOUT;
  2685. }
  2686. }
  2687. /* Clear ADDR flag */
  2688. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2689. /* Generate Stop */
  2690. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2691. hi2c->State = HAL_I2C_STATE_READY;
  2692. /* Process Unlocked */
  2693. __HAL_UNLOCK(hi2c);
  2694. }
  2695. return HAL_OK;
  2696. }
  2697. else
  2698. {
  2699. return HAL_BUSY;
  2700. }
  2701. }
  2702. /**
  2703. * @brief Checks if target device is ready for communication.
  2704. * @note This function is used with Memory devices
  2705. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2706. * the configuration information for the specified I2C.
  2707. * @param DevAddress Target device address
  2708. * @param Trials Number of trials
  2709. * @param Timeout Timeout duration
  2710. * @retval HAL status
  2711. */
  2712. HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
  2713. {
  2714. uint32_t tickstart = 0U, tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, I2C_Trials = 1U;
  2715. /* Get tick */
  2716. tickstart = HAL_GetTick();
  2717. if(hi2c->State == HAL_I2C_STATE_READY)
  2718. {
  2719. /* Wait until BUSY flag is reset */
  2720. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2721. {
  2722. return HAL_BUSY;
  2723. }
  2724. /* Process Locked */
  2725. __HAL_LOCK(hi2c);
  2726. /* Check if the I2C is already enabled */
  2727. if((hi2c->Instance->CR1 & I2C_CR1_PE) != I2C_CR1_PE)
  2728. {
  2729. /* Enable I2C peripheral */
  2730. __HAL_I2C_ENABLE(hi2c);
  2731. }
  2732. /* Disable Pos */
  2733. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  2734. hi2c->State = HAL_I2C_STATE_BUSY;
  2735. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  2736. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  2737. do
  2738. {
  2739. /* Generate Start */
  2740. hi2c->Instance->CR1 |= I2C_CR1_START;
  2741. /* Wait until SB flag is set */
  2742. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK)
  2743. {
  2744. return HAL_TIMEOUT;
  2745. }
  2746. /* Send slave address */
  2747. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  2748. /* Wait until ADDR or AF flag are set */
  2749. /* Get tick */
  2750. tickstart = HAL_GetTick();
  2751. tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  2752. tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  2753. tmp3 = hi2c->State;
  2754. while((tmp1 == RESET) && (tmp2 == RESET) && (tmp3 != HAL_I2C_STATE_TIMEOUT))
  2755. {
  2756. if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
  2757. {
  2758. hi2c->State = HAL_I2C_STATE_TIMEOUT;
  2759. }
  2760. tmp1 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR);
  2761. tmp2 = __HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF);
  2762. tmp3 = hi2c->State;
  2763. }
  2764. hi2c->State = HAL_I2C_STATE_READY;
  2765. /* Check if the ADDR flag has been set */
  2766. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_ADDR) == SET)
  2767. {
  2768. /* Generate Stop */
  2769. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2770. /* Clear ADDR Flag */
  2771. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  2772. /* Wait until BUSY flag is reset */
  2773. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2774. {
  2775. return HAL_TIMEOUT;
  2776. }
  2777. hi2c->State = HAL_I2C_STATE_READY;
  2778. /* Process Unlocked */
  2779. __HAL_UNLOCK(hi2c);
  2780. return HAL_OK;
  2781. }
  2782. else
  2783. {
  2784. /* Generate Stop */
  2785. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  2786. /* Clear AF Flag */
  2787. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  2788. /* Wait until BUSY flag is reset */
  2789. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY_FLAG, tickstart) != HAL_OK)
  2790. {
  2791. return HAL_TIMEOUT;
  2792. }
  2793. }
  2794. }while(I2C_Trials++ < Trials);
  2795. hi2c->State = HAL_I2C_STATE_READY;
  2796. /* Process Unlocked */
  2797. __HAL_UNLOCK(hi2c);
  2798. return HAL_ERROR;
  2799. }
  2800. else
  2801. {
  2802. return HAL_BUSY;
  2803. }
  2804. }
  2805. /**
  2806. * @brief This function handles I2C event interrupt request.
  2807. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2808. * the configuration information for the specified I2C.
  2809. * @retval None
  2810. */
  2811. void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c)
  2812. {
  2813. uint32_t sr2itflags = READ_REG(hi2c->Instance->SR2);
  2814. uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
  2815. uint32_t itsources = READ_REG(hi2c->Instance->CR2);
  2816. uint32_t CurrentMode = hi2c->Mode;
  2817. /* Master or Memory mode selected */
  2818. if((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM))
  2819. {
  2820. /* SB Set ----------------------------------------------------------------*/
  2821. if(((sr1itflags & I2C_FLAG_SB) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2822. {
  2823. I2C_Master_SB(hi2c);
  2824. }
  2825. /* ADD10 Set -------------------------------------------------------------*/
  2826. else if(((sr1itflags & I2C_FLAG_ADD10) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2827. {
  2828. I2C_Master_ADD10(hi2c);
  2829. }
  2830. /* ADDR Set --------------------------------------------------------------*/
  2831. else if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2832. {
  2833. I2C_Master_ADDR(hi2c);
  2834. }
  2835. /* I2C in mode Transmitter -----------------------------------------------*/
  2836. if((sr2itflags & I2C_FLAG_TRA) != RESET)
  2837. {
  2838. /* TXE set and BTF reset -----------------------------------------------*/
  2839. if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2840. {
  2841. I2C_MasterTransmit_TXE(hi2c);
  2842. }
  2843. /* BTF set -------------------------------------------------------------*/
  2844. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2845. {
  2846. I2C_MasterTransmit_BTF(hi2c);
  2847. }
  2848. }
  2849. /* I2C in mode Receiver --------------------------------------------------*/
  2850. else
  2851. {
  2852. /* RXNE set and BTF reset -----------------------------------------------*/
  2853. if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2854. {
  2855. I2C_MasterReceive_RXNE(hi2c);
  2856. }
  2857. /* BTF set -------------------------------------------------------------*/
  2858. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2859. {
  2860. I2C_MasterReceive_BTF(hi2c);
  2861. }
  2862. }
  2863. }
  2864. /* Slave mode selected */
  2865. else
  2866. {
  2867. /* ADDR set --------------------------------------------------------------*/
  2868. if(((sr1itflags & I2C_FLAG_ADDR) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2869. {
  2870. I2C_Slave_ADDR(hi2c);
  2871. }
  2872. /* STOPF set --------------------------------------------------------------*/
  2873. else if(((sr1itflags & I2C_FLAG_STOPF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2874. {
  2875. I2C_Slave_STOPF(hi2c);
  2876. }
  2877. /* I2C in mode Transmitter -----------------------------------------------*/
  2878. else if((sr2itflags & I2C_FLAG_TRA) != RESET)
  2879. {
  2880. /* TXE set and BTF reset -----------------------------------------------*/
  2881. if(((sr1itflags & I2C_FLAG_TXE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2882. {
  2883. I2C_SlaveTransmit_TXE(hi2c);
  2884. }
  2885. /* BTF set -------------------------------------------------------------*/
  2886. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2887. {
  2888. I2C_SlaveTransmit_BTF(hi2c);
  2889. }
  2890. }
  2891. /* I2C in mode Receiver --------------------------------------------------*/
  2892. else
  2893. {
  2894. /* RXNE set and BTF reset ----------------------------------------------*/
  2895. if(((sr1itflags & I2C_FLAG_RXNE) != RESET) && ((itsources & I2C_IT_BUF) != RESET) && ((sr1itflags & I2C_FLAG_BTF) == RESET))
  2896. {
  2897. I2C_SlaveReceive_RXNE(hi2c);
  2898. }
  2899. /* BTF set -------------------------------------------------------------*/
  2900. else if(((sr1itflags & I2C_FLAG_BTF) != RESET) && ((itsources & I2C_IT_EVT) != RESET))
  2901. {
  2902. I2C_SlaveReceive_BTF(hi2c);
  2903. }
  2904. }
  2905. }
  2906. }
  2907. /**
  2908. * @brief This function handles I2C error interrupt request.
  2909. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2910. * the configuration information for the specified I2C.
  2911. * @retval None
  2912. */
  2913. void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c)
  2914. {
  2915. uint32_t tmp1 = 0U, tmp2 = 0U, tmp3 = 0U, tmp4 = 0U;
  2916. uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1);
  2917. uint32_t itsources = READ_REG(hi2c->Instance->CR2);
  2918. /* I2C Bus error interrupt occurred ----------------------------------------*/
  2919. if(((sr1itflags & I2C_FLAG_BERR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2920. {
  2921. hi2c->ErrorCode |= HAL_I2C_ERROR_BERR;
  2922. /* Clear BERR flag */
  2923. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR);
  2924. }
  2925. /* I2C Arbitration Loss error interrupt occurred ---------------------------*/
  2926. if(((sr1itflags & I2C_FLAG_ARLO) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2927. {
  2928. hi2c->ErrorCode |= HAL_I2C_ERROR_ARLO;
  2929. /* Clear ARLO flag */
  2930. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO);
  2931. }
  2932. /* I2C Acknowledge failure error interrupt occurred ------------------------*/
  2933. if(((sr1itflags & I2C_FLAG_AF) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2934. {
  2935. tmp1 = hi2c->Mode;
  2936. tmp2 = hi2c->XferCount;
  2937. tmp3 = hi2c->State;
  2938. tmp4 = hi2c->PreviousState;
  2939. if((tmp1 == HAL_I2C_MODE_SLAVE) && (tmp2 == 0U) && \
  2940. ((tmp3 == HAL_I2C_STATE_BUSY_TX) || (tmp3 == HAL_I2C_STATE_BUSY_TX_LISTEN) || \
  2941. ((tmp3 == HAL_I2C_STATE_LISTEN) && (tmp4 == I2C_STATE_SLAVE_BUSY_TX))))
  2942. {
  2943. I2C_Slave_AF(hi2c);
  2944. }
  2945. else
  2946. {
  2947. hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  2948. /* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */
  2949. if(hi2c->Mode == HAL_I2C_MODE_MASTER)
  2950. {
  2951. /* Generate Stop */
  2952. SET_BIT(hi2c->Instance->CR1,I2C_CR1_STOP);
  2953. }
  2954. /* Clear AF flag */
  2955. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  2956. }
  2957. }
  2958. /* I2C Over-Run/Under-Run interrupt occurred -------------------------------*/
  2959. if(((sr1itflags & I2C_FLAG_OVR) != RESET) && ((itsources & I2C_IT_ERR) != RESET))
  2960. {
  2961. hi2c->ErrorCode |= HAL_I2C_ERROR_OVR;
  2962. /* Clear OVR flag */
  2963. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR);
  2964. }
  2965. /* Call the Error Callback in case of Error detected -----------------------*/
  2966. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  2967. {
  2968. I2C_ITError(hi2c);
  2969. }
  2970. }
  2971. /**
  2972. * @brief Master Tx Transfer completed callback.
  2973. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2974. * the configuration information for the specified I2C.
  2975. * @retval None
  2976. */
  2977. __weak void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c)
  2978. {
  2979. /* Prevent unused argument(s) compilation warning */
  2980. UNUSED(hi2c);
  2981. /* NOTE : This function should not be modified, when the callback is needed,
  2982. the HAL_I2C_MasterTxCpltCallback can be implemented in the user file
  2983. */
  2984. }
  2985. /**
  2986. * @brief Master Rx Transfer completed callback.
  2987. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  2988. * the configuration information for the specified I2C.
  2989. * @retval None
  2990. */
  2991. __weak void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c)
  2992. {
  2993. /* Prevent unused argument(s) compilation warning */
  2994. UNUSED(hi2c);
  2995. /* NOTE : This function should not be modified, when the callback is needed,
  2996. the HAL_I2C_MasterRxCpltCallback can be implemented in the user file
  2997. */
  2998. }
  2999. /** @brief Slave Tx Transfer completed callback.
  3000. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3001. * the configuration information for the specified I2C.
  3002. * @retval None
  3003. */
  3004. __weak void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c)
  3005. {
  3006. /* Prevent unused argument(s) compilation warning */
  3007. UNUSED(hi2c);
  3008. /* NOTE : This function should not be modified, when the callback is needed,
  3009. the HAL_I2C_SlaveTxCpltCallback can be implemented in the user file
  3010. */
  3011. }
  3012. /**
  3013. * @brief Slave Rx Transfer completed callback.
  3014. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3015. * the configuration information for the specified I2C.
  3016. * @retval None
  3017. */
  3018. __weak void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c)
  3019. {
  3020. /* Prevent unused argument(s) compilation warning */
  3021. UNUSED(hi2c);
  3022. /* NOTE : This function should not be modified, when the callback is needed,
  3023. the HAL_I2C_SlaveRxCpltCallback can be implemented in the user file
  3024. */
  3025. }
  3026. /**
  3027. * @brief Slave Address Match callback.
  3028. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3029. * the configuration information for the specified I2C.
  3030. * @param TransferDirection Master request Transfer Direction (Write/Read), value of @ref I2C_XferOptions_definition
  3031. * @param AddrMatchCode Address Match Code
  3032. * @retval None
  3033. */
  3034. __weak void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode)
  3035. {
  3036. /* Prevent unused argument(s) compilation warning */
  3037. UNUSED(hi2c);
  3038. UNUSED(TransferDirection);
  3039. UNUSED(AddrMatchCode);
  3040. /* NOTE : This function should not be modified, when the callback is needed,
  3041. the HAL_I2C_AddrCallback can be implemented in the user file
  3042. */
  3043. }
  3044. /**
  3045. * @brief Listen Complete callback.
  3046. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3047. * the configuration information for the specified I2C.
  3048. * @retval None
  3049. */
  3050. __weak void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c)
  3051. {
  3052. /* Prevent unused argument(s) compilation warning */
  3053. UNUSED(hi2c);
  3054. /* NOTE : This function should not be modified, when the callback is needed,
  3055. the HAL_I2C_ListenCpltCallback can be implemented in the user file
  3056. */
  3057. }
  3058. /**
  3059. * @brief Memory Tx Transfer completed callback.
  3060. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3061. * the configuration information for the specified I2C.
  3062. * @retval None
  3063. */
  3064. __weak void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c)
  3065. {
  3066. /* Prevent unused argument(s) compilation warning */
  3067. UNUSED(hi2c);
  3068. /* NOTE : This function should not be modified, when the callback is needed,
  3069. the HAL_I2C_MemTxCpltCallback can be implemented in the user file
  3070. */
  3071. }
  3072. /**
  3073. * @brief Memory Rx Transfer completed callback.
  3074. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3075. * the configuration information for the specified I2C.
  3076. * @retval None
  3077. */
  3078. __weak void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c)
  3079. {
  3080. /* Prevent unused argument(s) compilation warning */
  3081. UNUSED(hi2c);
  3082. /* NOTE : This function should not be modified, when the callback is needed,
  3083. the HAL_I2C_MemRxCpltCallback can be implemented in the user file
  3084. */
  3085. }
  3086. /**
  3087. * @brief I2C error callback.
  3088. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3089. * the configuration information for the specified I2C.
  3090. * @retval None
  3091. */
  3092. __weak void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c)
  3093. {
  3094. /* Prevent unused argument(s) compilation warning */
  3095. UNUSED(hi2c);
  3096. /* NOTE : This function should not be modified, when the callback is needed,
  3097. the HAL_I2C_ErrorCallback can be implemented in the user file
  3098. */
  3099. }
  3100. /**
  3101. * @brief I2C abort callback.
  3102. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3103. * the configuration information for the specified I2C.
  3104. * @retval None
  3105. */
  3106. __weak void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c)
  3107. {
  3108. /* Prevent unused argument(s) compilation warning */
  3109. UNUSED(hi2c);
  3110. /* NOTE : This function should not be modified, when the callback is needed,
  3111. the HAL_I2C_AbortCpltCallback could be implemented in the user file
  3112. */
  3113. }
  3114. /**
  3115. * @}
  3116. */
  3117. /** @defgroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions
  3118. * @brief Peripheral State and Errors functions
  3119. *
  3120. @verbatim
  3121. ===============================================================================
  3122. ##### Peripheral State, Mode and Error functions #####
  3123. ===============================================================================
  3124. [..]
  3125. This subsection permits to get in run-time the status of the peripheral
  3126. and the data flow.
  3127. @endverbatim
  3128. * @{
  3129. */
  3130. /**
  3131. * @brief Return the I2C handle state.
  3132. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3133. * the configuration information for the specified I2C.
  3134. * @retval HAL state
  3135. */
  3136. HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c)
  3137. {
  3138. /* Return I2C handle state */
  3139. return hi2c->State;
  3140. }
  3141. /**
  3142. * @brief Return the I2C Master, Slave, Memory or no mode.
  3143. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3144. * the configuration information for I2C module
  3145. * @retval HAL mode
  3146. */
  3147. HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c)
  3148. {
  3149. return hi2c->Mode;
  3150. }
  3151. /**
  3152. * @brief Return the I2C error code
  3153. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3154. * the configuration information for the specified I2C.
  3155. * @retval I2C Error Code
  3156. */
  3157. uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c)
  3158. {
  3159. return hi2c->ErrorCode;
  3160. }
  3161. /**
  3162. * @}
  3163. */
  3164. /**
  3165. * @brief Handle TXE flag for Master
  3166. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3167. * the configuration information for I2C module
  3168. * @retval HAL status
  3169. */
  3170. static HAL_StatusTypeDef I2C_MasterTransmit_TXE(I2C_HandleTypeDef *hi2c)
  3171. {
  3172. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3173. uint32_t CurrentState = hi2c->State;
  3174. uint32_t CurrentMode = hi2c->Mode;
  3175. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3176. if((hi2c->XferSize == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX))
  3177. {
  3178. /* Call TxCpltCallback() directly if no stop mode is set */
  3179. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3180. {
  3181. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3182. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  3183. hi2c->Mode = HAL_I2C_MODE_NONE;
  3184. hi2c->State = HAL_I2C_STATE_READY;
  3185. HAL_I2C_MasterTxCpltCallback(hi2c);
  3186. }
  3187. else /* Generate Stop condition then Call TxCpltCallback() */
  3188. {
  3189. /* Disable EVT, BUF and ERR interrupt */
  3190. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3191. /* Generate Stop */
  3192. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3193. hi2c->PreviousState = I2C_STATE_NONE;
  3194. hi2c->State = HAL_I2C_STATE_READY;
  3195. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3196. {
  3197. hi2c->Mode = HAL_I2C_MODE_NONE;
  3198. HAL_I2C_MemTxCpltCallback(hi2c);
  3199. }
  3200. else
  3201. {
  3202. hi2c->Mode = HAL_I2C_MODE_NONE;
  3203. HAL_I2C_MasterTxCpltCallback(hi2c);
  3204. }
  3205. }
  3206. }
  3207. else if((CurrentState == HAL_I2C_STATE_BUSY_TX) || \
  3208. ((CurrentMode == HAL_I2C_MODE_MEM) && (CurrentState == HAL_I2C_STATE_BUSY_RX)))
  3209. {
  3210. if(hi2c->XferCount == 0U)
  3211. {
  3212. /* Disable BUF interrupt */
  3213. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3214. }
  3215. else
  3216. {
  3217. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3218. {
  3219. if(hi2c->EventCount == 0)
  3220. {
  3221. /* If Memory address size is 8Bit */
  3222. if(hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT)
  3223. {
  3224. /* Send Memory Address */
  3225. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3226. hi2c->EventCount += 2;
  3227. }
  3228. /* If Memory address size is 16Bit */
  3229. else
  3230. {
  3231. /* Send MSB of Memory Address */
  3232. hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress);
  3233. hi2c->EventCount++;
  3234. }
  3235. }
  3236. else if(hi2c->EventCount == 1)
  3237. {
  3238. /* Send LSB of Memory Address */
  3239. hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress);
  3240. hi2c->EventCount++;
  3241. }
  3242. else if(hi2c->EventCount == 2)
  3243. {
  3244. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3245. {
  3246. /* Generate Restart */
  3247. hi2c->Instance->CR1 |= I2C_CR1_START;
  3248. }
  3249. else if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3250. {
  3251. /* Write data to DR */
  3252. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3253. hi2c->XferCount--;
  3254. }
  3255. }
  3256. }
  3257. else
  3258. {
  3259. /* Write data to DR */
  3260. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3261. hi2c->XferCount--;
  3262. }
  3263. }
  3264. }
  3265. return HAL_OK;
  3266. }
  3267. /**
  3268. * @brief Handle BTF flag for Master transmitter
  3269. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3270. * the configuration information for I2C module
  3271. * @retval HAL status
  3272. */
  3273. static HAL_StatusTypeDef I2C_MasterTransmit_BTF(I2C_HandleTypeDef *hi2c)
  3274. {
  3275. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3276. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3277. if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3278. {
  3279. if(hi2c->XferCount != 0U)
  3280. {
  3281. /* Write data to DR */
  3282. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3283. hi2c->XferCount--;
  3284. }
  3285. else
  3286. {
  3287. /* Call TxCpltCallback() directly if no stop mode is set */
  3288. if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) && (CurrentXferOptions != I2C_NO_OPTION_FRAME))
  3289. {
  3290. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3291. hi2c->PreviousState = I2C_STATE_MASTER_BUSY_TX;
  3292. hi2c->Mode = HAL_I2C_MODE_NONE;
  3293. hi2c->State = HAL_I2C_STATE_READY;
  3294. HAL_I2C_MasterTxCpltCallback(hi2c);
  3295. }
  3296. else /* Generate Stop condition then Call TxCpltCallback() */
  3297. {
  3298. /* Disable EVT, BUF and ERR interrupt */
  3299. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3300. /* Generate Stop */
  3301. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3302. hi2c->PreviousState = I2C_STATE_NONE;
  3303. hi2c->State = HAL_I2C_STATE_READY;
  3304. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3305. {
  3306. hi2c->Mode = HAL_I2C_MODE_NONE;
  3307. HAL_I2C_MemTxCpltCallback(hi2c);
  3308. }
  3309. else
  3310. {
  3311. hi2c->Mode = HAL_I2C_MODE_NONE;
  3312. HAL_I2C_MasterTxCpltCallback(hi2c);
  3313. }
  3314. }
  3315. }
  3316. }
  3317. return HAL_OK;
  3318. }
  3319. /**
  3320. * @brief Handle RXNE flag for Master
  3321. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3322. * the configuration information for I2C module
  3323. * @retval HAL status
  3324. */
  3325. static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
  3326. {
  3327. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3328. {
  3329. uint32_t tmp = 0U;
  3330. tmp = hi2c->XferCount;
  3331. if(tmp > 3U)
  3332. {
  3333. /* Read data from DR */
  3334. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3335. hi2c->XferCount--;
  3336. if(hi2c->XferCount == 3)
  3337. {
  3338. /* Disable BUF interrupt, this help to treat correctly the last 4 bytes
  3339. on BTF subroutine */
  3340. /* Disable BUF interrupt */
  3341. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3342. }
  3343. }
  3344. else if((tmp == 1U) || (tmp == 0U))
  3345. {
  3346. /* Disable Acknowledge */
  3347. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3348. /* Disable EVT, BUF and ERR interrupt */
  3349. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3350. /* Read data from DR */
  3351. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3352. hi2c->XferCount--;
  3353. hi2c->State = HAL_I2C_STATE_READY;
  3354. hi2c->PreviousState = I2C_STATE_NONE;
  3355. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3356. {
  3357. hi2c->Mode = HAL_I2C_MODE_NONE;
  3358. HAL_I2C_MemRxCpltCallback(hi2c);
  3359. }
  3360. else
  3361. {
  3362. hi2c->Mode = HAL_I2C_MODE_NONE;
  3363. HAL_I2C_MasterRxCpltCallback(hi2c);
  3364. }
  3365. }
  3366. }
  3367. return HAL_OK;
  3368. }
  3369. /**
  3370. * @brief Handle BTF flag for Master receiver
  3371. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3372. * the configuration information for I2C module
  3373. * @retval HAL status
  3374. */
  3375. static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
  3376. {
  3377. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3378. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3379. if(hi2c->XferCount == 4U)
  3380. {
  3381. /* Disable BUF interrupt, this help to treat correctly the last 2 bytes
  3382. on BTF subroutine if there is a reception delay between N-1 and N byte */
  3383. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3384. /* Read data from DR */
  3385. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3386. hi2c->XferCount--;
  3387. }
  3388. else if(hi2c->XferCount == 3U)
  3389. {
  3390. /* Disable BUF interrupt, this help to treat correctly the last 2 bytes
  3391. on BTF subroutine if there is a reception delay between N-1 and N byte */
  3392. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3393. /* Disable Acknowledge */
  3394. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3395. /* Read data from DR */
  3396. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3397. hi2c->XferCount--;
  3398. }
  3399. else if(hi2c->XferCount == 2U)
  3400. {
  3401. /* Prepare next transfer or stop current transfer */
  3402. if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
  3403. {
  3404. /* Disable Acknowledge */
  3405. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3406. /* Generate ReStart */
  3407. hi2c->Instance->CR1 |= I2C_CR1_START;
  3408. }
  3409. else
  3410. {
  3411. /* Generate Stop */
  3412. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3413. }
  3414. /* Read data from DR */
  3415. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3416. hi2c->XferCount--;
  3417. /* Read data from DR */
  3418. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3419. hi2c->XferCount--;
  3420. /* Disable EVT and ERR interrupt */
  3421. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  3422. hi2c->State = HAL_I2C_STATE_READY;
  3423. hi2c->PreviousState = I2C_STATE_NONE;
  3424. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3425. {
  3426. hi2c->Mode = HAL_I2C_MODE_NONE;
  3427. HAL_I2C_MemRxCpltCallback(hi2c);
  3428. }
  3429. else
  3430. {
  3431. hi2c->Mode = HAL_I2C_MODE_NONE;
  3432. HAL_I2C_MasterRxCpltCallback(hi2c);
  3433. }
  3434. }
  3435. else
  3436. {
  3437. /* Read data from DR */
  3438. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3439. hi2c->XferCount--;
  3440. }
  3441. return HAL_OK;
  3442. }
  3443. /**
  3444. * @brief Handle SB flag for Master
  3445. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3446. * the configuration information for I2C module
  3447. * @retval HAL status
  3448. */
  3449. static HAL_StatusTypeDef I2C_Master_SB(I2C_HandleTypeDef *hi2c)
  3450. {
  3451. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  3452. {
  3453. if(hi2c->EventCount == 0U)
  3454. {
  3455. /* Send slave address */
  3456. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  3457. }
  3458. else
  3459. {
  3460. hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  3461. }
  3462. }
  3463. else
  3464. {
  3465. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  3466. {
  3467. /* Send slave 7 Bits address */
  3468. if(hi2c->State == HAL_I2C_STATE_BUSY_TX)
  3469. {
  3470. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(hi2c->Devaddress);
  3471. }
  3472. else
  3473. {
  3474. hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress);
  3475. }
  3476. }
  3477. else
  3478. {
  3479. if(hi2c->EventCount == 0U)
  3480. {
  3481. /* Send header of slave address */
  3482. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(hi2c->Devaddress);
  3483. }
  3484. else if(hi2c->EventCount == 1U)
  3485. {
  3486. /* Send header of slave address */
  3487. hi2c->Instance->DR = I2C_10BIT_HEADER_READ(hi2c->Devaddress);
  3488. }
  3489. }
  3490. }
  3491. return HAL_OK;
  3492. }
  3493. /**
  3494. * @brief Handle ADD10 flag for Master
  3495. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3496. * the configuration information for I2C module
  3497. * @retval HAL status
  3498. */
  3499. static HAL_StatusTypeDef I2C_Master_ADD10(I2C_HandleTypeDef *hi2c)
  3500. {
  3501. /* Send slave address */
  3502. hi2c->Instance->DR = I2C_10BIT_ADDRESS(hi2c->Devaddress);
  3503. return HAL_OK;
  3504. }
  3505. /**
  3506. * @brief Handle ADDR flag for Master
  3507. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3508. * the configuration information for I2C module
  3509. * @retval HAL status
  3510. */
  3511. static HAL_StatusTypeDef I2C_Master_ADDR(I2C_HandleTypeDef *hi2c)
  3512. {
  3513. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3514. uint32_t CurrentMode = hi2c->Mode;
  3515. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3516. uint32_t Prev_State = hi2c->PreviousState;
  3517. if(hi2c->State == HAL_I2C_STATE_BUSY_RX)
  3518. {
  3519. if((hi2c->EventCount == 0U) && (CurrentMode == HAL_I2C_MODE_MEM))
  3520. {
  3521. /* Clear ADDR flag */
  3522. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3523. }
  3524. else if((hi2c->EventCount == 0U) && (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT))
  3525. {
  3526. /* Clear ADDR flag */
  3527. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3528. /* Generate Restart */
  3529. hi2c->Instance->CR1 |= I2C_CR1_START;
  3530. hi2c->EventCount++;
  3531. }
  3532. else
  3533. {
  3534. if(hi2c->XferCount == 0U)
  3535. {
  3536. /* Clear ADDR flag */
  3537. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3538. /* Generate Stop */
  3539. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3540. }
  3541. else if(hi2c->XferCount == 1U)
  3542. {
  3543. if(CurrentXferOptions == I2C_NO_OPTION_FRAME)
  3544. {
  3545. /* Disable Acknowledge */
  3546. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3547. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3548. {
  3549. /* Disable Acknowledge */
  3550. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3551. /* Clear ADDR flag */
  3552. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3553. }
  3554. else
  3555. {
  3556. /* Clear ADDR flag */
  3557. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3558. /* Generate Stop */
  3559. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3560. }
  3561. }
  3562. /* Prepare next transfer or stop current transfer */
  3563. else if((CurrentXferOptions != I2C_FIRST_AND_LAST_FRAME) && (CurrentXferOptions != I2C_LAST_FRAME) \
  3564. && (Prev_State != I2C_STATE_MASTER_BUSY_RX))
  3565. {
  3566. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3567. {
  3568. /* Disable Acknowledge */
  3569. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3570. }
  3571. else
  3572. {
  3573. /* Enable Acknowledge */
  3574. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3575. }
  3576. /* Clear ADDR flag */
  3577. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3578. }
  3579. else
  3580. {
  3581. /* Disable Acknowledge */
  3582. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3583. /* Clear ADDR flag */
  3584. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3585. /* Generate Stop */
  3586. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  3587. }
  3588. }
  3589. else if(hi2c->XferCount == 2U)
  3590. {
  3591. if(hi2c->XferOptions != I2C_NEXT_FRAME)
  3592. {
  3593. /* Disable Acknowledge */
  3594. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3595. /* Enable Pos */
  3596. hi2c->Instance->CR1 |= I2C_CR1_POS;
  3597. }
  3598. else
  3599. {
  3600. /* Enable Acknowledge */
  3601. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3602. }
  3603. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3604. {
  3605. /* Enable Last DMA bit */
  3606. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  3607. }
  3608. /* Clear ADDR flag */
  3609. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3610. }
  3611. else
  3612. {
  3613. /* Enable Acknowledge */
  3614. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  3615. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3616. {
  3617. /* Enable Last DMA bit */
  3618. hi2c->Instance->CR2 |= I2C_CR2_LAST;
  3619. }
  3620. /* Clear ADDR flag */
  3621. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3622. }
  3623. /* Reset Event counter */
  3624. hi2c->EventCount = 0U;
  3625. }
  3626. }
  3627. else
  3628. {
  3629. /* Clear ADDR flag */
  3630. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  3631. }
  3632. return HAL_OK;
  3633. }
  3634. /**
  3635. * @brief Handle TXE flag for Slave
  3636. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3637. * the configuration information for I2C module
  3638. * @retval HAL status
  3639. */
  3640. static HAL_StatusTypeDef I2C_SlaveTransmit_TXE(I2C_HandleTypeDef *hi2c)
  3641. {
  3642. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3643. uint32_t CurrentState = hi2c->State;
  3644. if(hi2c->XferCount != 0U)
  3645. {
  3646. /* Write data to DR */
  3647. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3648. hi2c->XferCount--;
  3649. if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  3650. {
  3651. /* Last Byte is received, disable Interrupt */
  3652. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3653. /* Set state at HAL_I2C_STATE_LISTEN */
  3654. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  3655. hi2c->State = HAL_I2C_STATE_LISTEN;
  3656. /* Call the Tx complete callback to inform upper layer of the end of receive process */
  3657. HAL_I2C_SlaveTxCpltCallback(hi2c);
  3658. }
  3659. }
  3660. return HAL_OK;
  3661. }
  3662. /**
  3663. * @brief Handle BTF flag for Slave transmitter
  3664. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3665. * the configuration information for I2C module
  3666. * @retval HAL status
  3667. */
  3668. static HAL_StatusTypeDef I2C_SlaveTransmit_BTF(I2C_HandleTypeDef *hi2c)
  3669. {
  3670. if(hi2c->XferCount != 0U)
  3671. {
  3672. /* Write data to DR */
  3673. hi2c->Instance->DR = (*hi2c->pBuffPtr++);
  3674. hi2c->XferCount--;
  3675. }
  3676. return HAL_OK;
  3677. }
  3678. /**
  3679. * @brief Handle RXNE flag for Slave
  3680. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3681. * the configuration information for I2C module
  3682. * @retval HAL status
  3683. */
  3684. static HAL_StatusTypeDef I2C_SlaveReceive_RXNE(I2C_HandleTypeDef *hi2c)
  3685. {
  3686. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3687. uint32_t CurrentState = hi2c->State;
  3688. if(hi2c->XferCount != 0U)
  3689. {
  3690. /* Read data from DR */
  3691. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3692. hi2c->XferCount--;
  3693. if((hi2c->XferCount == 0U) && (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3694. {
  3695. /* Last Byte is received, disable Interrupt */
  3696. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
  3697. /* Set state at HAL_I2C_STATE_LISTEN */
  3698. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_RX;
  3699. hi2c->State = HAL_I2C_STATE_LISTEN;
  3700. /* Call the Rx complete callback to inform upper layer of the end of receive process */
  3701. HAL_I2C_SlaveRxCpltCallback(hi2c);
  3702. }
  3703. }
  3704. return HAL_OK;
  3705. }
  3706. /**
  3707. * @brief Handle BTF flag for Slave receiver
  3708. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3709. * the configuration information for I2C module
  3710. * @retval HAL status
  3711. */
  3712. static HAL_StatusTypeDef I2C_SlaveReceive_BTF(I2C_HandleTypeDef *hi2c)
  3713. {
  3714. if(hi2c->XferCount != 0U)
  3715. {
  3716. /* Read data from DR */
  3717. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3718. hi2c->XferCount--;
  3719. }
  3720. return HAL_OK;
  3721. }
  3722. /**
  3723. * @brief Handle ADD flag for Slave
  3724. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3725. * the configuration information for I2C module
  3726. * @retval HAL status
  3727. */
  3728. static HAL_StatusTypeDef I2C_Slave_ADDR(I2C_HandleTypeDef *hi2c)
  3729. {
  3730. uint8_t TransferDirection = I2C_DIRECTION_RECEIVE;
  3731. uint16_t SlaveAddrCode = 0U;
  3732. /* Transfer Direction requested by Master */
  3733. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TRA) == RESET)
  3734. {
  3735. TransferDirection = I2C_DIRECTION_TRANSMIT;
  3736. }
  3737. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_DUALF) == RESET)
  3738. {
  3739. SlaveAddrCode = hi2c->Init.OwnAddress1;
  3740. }
  3741. else
  3742. {
  3743. SlaveAddrCode = hi2c->Init.OwnAddress2;
  3744. }
  3745. /* Call Slave Addr callback */
  3746. HAL_I2C_AddrCallback(hi2c, TransferDirection, SlaveAddrCode);
  3747. return HAL_OK;
  3748. }
  3749. /**
  3750. * @brief Handle STOPF flag for Slave
  3751. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3752. * the configuration information for I2C module
  3753. * @retval HAL status
  3754. */
  3755. static HAL_StatusTypeDef I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c)
  3756. {
  3757. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3758. uint32_t CurrentState = hi2c->State;
  3759. /* Disable EVT, BUF and ERR interrupt */
  3760. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3761. /* Clear STOPF flag */
  3762. __HAL_I2C_CLEAR_STOPFLAG(hi2c);
  3763. /* Disable Acknowledge */
  3764. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3765. /* If a DMA is ongoing, Update handle size context */
  3766. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3767. {
  3768. if((hi2c->State == HAL_I2C_STATE_BUSY_RX) || (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3769. {
  3770. hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmarx);
  3771. }
  3772. else
  3773. {
  3774. hi2c->XferCount = __HAL_DMA_GET_COUNTER(hi2c->hdmatx);
  3775. }
  3776. }
  3777. /* All data are not transferred, so set error code accordingly */
  3778. if(hi2c->XferCount != 0U)
  3779. {
  3780. /* Store Last receive data if any */
  3781. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == SET)
  3782. {
  3783. /* Read data from DR */
  3784. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3785. hi2c->XferCount--;
  3786. }
  3787. /* Store Last receive data if any */
  3788. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3789. {
  3790. /* Read data from DR */
  3791. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3792. hi2c->XferCount--;
  3793. }
  3794. /* Set ErrorCode corresponding to a Non-Acknowledge */
  3795. hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
  3796. }
  3797. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  3798. {
  3799. /* Call the corresponding callback to inform upper layer of End of Transfer */
  3800. I2C_ITError(hi2c);
  3801. }
  3802. else
  3803. {
  3804. if((CurrentState == HAL_I2C_STATE_LISTEN ) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN) || \
  3805. (CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN))
  3806. {
  3807. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3808. hi2c->PreviousState = I2C_STATE_NONE;
  3809. hi2c->State = HAL_I2C_STATE_READY;
  3810. hi2c->Mode = HAL_I2C_MODE_NONE;
  3811. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3812. HAL_I2C_ListenCpltCallback(hi2c);
  3813. }
  3814. else
  3815. {
  3816. if((hi2c->PreviousState == I2C_STATE_SLAVE_BUSY_RX) || (CurrentState == HAL_I2C_STATE_BUSY_RX))
  3817. {
  3818. hi2c->PreviousState = I2C_STATE_NONE;
  3819. hi2c->State = HAL_I2C_STATE_READY;
  3820. hi2c->Mode = HAL_I2C_MODE_NONE;
  3821. HAL_I2C_SlaveRxCpltCallback(hi2c);
  3822. }
  3823. }
  3824. }
  3825. return HAL_OK;
  3826. }
  3827. /**
  3828. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3829. * the configuration information for I2C module
  3830. * @retval HAL status
  3831. */
  3832. static HAL_StatusTypeDef I2C_Slave_AF(I2C_HandleTypeDef *hi2c)
  3833. {
  3834. /* Declaration of temporary variables to prevent undefined behavior of volatile usage */
  3835. uint32_t CurrentState = hi2c->State;
  3836. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3837. if(((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_LAST_FRAME)) && \
  3838. (CurrentState == HAL_I2C_STATE_LISTEN))
  3839. {
  3840. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3841. /* Disable EVT, BUF and ERR interrupt */
  3842. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3843. /* Clear AF flag */
  3844. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3845. /* Disable Acknowledge */
  3846. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3847. hi2c->PreviousState = I2C_STATE_NONE;
  3848. hi2c->State = HAL_I2C_STATE_READY;
  3849. hi2c->Mode = HAL_I2C_MODE_NONE;
  3850. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3851. HAL_I2C_ListenCpltCallback(hi2c);
  3852. }
  3853. else if(CurrentState == HAL_I2C_STATE_BUSY_TX)
  3854. {
  3855. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3856. hi2c->PreviousState = I2C_STATE_SLAVE_BUSY_TX;
  3857. hi2c->State = HAL_I2C_STATE_READY;
  3858. hi2c->Mode = HAL_I2C_MODE_NONE;
  3859. /* Disable EVT, BUF and ERR interrupt */
  3860. __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR);
  3861. /* Clear AF flag */
  3862. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3863. /* Disable Acknowledge */
  3864. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  3865. HAL_I2C_SlaveTxCpltCallback(hi2c);
  3866. }
  3867. else
  3868. {
  3869. /* Clear AF flag only */
  3870. /* State Listen, but XferOptions == FIRST or NEXT */
  3871. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  3872. }
  3873. return HAL_OK;
  3874. }
  3875. /**
  3876. * @brief I2C interrupts error process
  3877. * @param hi2c I2C handle.
  3878. * @retval None
  3879. */
  3880. static void I2C_ITError(I2C_HandleTypeDef *hi2c)
  3881. {
  3882. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3883. uint32_t CurrentState = hi2c->State;
  3884. if((CurrentState == HAL_I2C_STATE_BUSY_TX_LISTEN) || (CurrentState == HAL_I2C_STATE_BUSY_RX_LISTEN))
  3885. {
  3886. /* keep HAL_I2C_STATE_LISTEN */
  3887. hi2c->PreviousState = I2C_STATE_NONE;
  3888. hi2c->State = HAL_I2C_STATE_LISTEN;
  3889. }
  3890. else
  3891. {
  3892. /* If state is an abort treatment on going, don't change state */
  3893. /* This change will be do later */
  3894. if((hi2c->State != HAL_I2C_STATE_ABORT) && ((hi2c->Instance->CR2 & I2C_CR2_DMAEN) != I2C_CR2_DMAEN))
  3895. {
  3896. hi2c->State = HAL_I2C_STATE_READY;
  3897. }
  3898. hi2c->PreviousState = I2C_STATE_NONE;
  3899. hi2c->Mode = HAL_I2C_MODE_NONE;
  3900. }
  3901. /* Disable Pos bit in I2C CR1 when error occurred in Master/Mem Receive IT Process */
  3902. hi2c->Instance->CR1 &= ~I2C_CR1_POS;
  3903. /* Abort DMA transfer */
  3904. if((hi2c->Instance->CR2 & I2C_CR2_DMAEN) == I2C_CR2_DMAEN)
  3905. {
  3906. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  3907. if(hi2c->hdmatx->State != HAL_DMA_STATE_READY)
  3908. {
  3909. /* Set the DMA Abort callback :
  3910. will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  3911. hi2c->hdmatx->XferAbortCallback = I2C_DMAAbort;
  3912. if(HAL_DMA_Abort_IT(hi2c->hdmatx) != HAL_OK)
  3913. {
  3914. /* Disable I2C peripheral to prevent dummy data in buffer */
  3915. __HAL_I2C_DISABLE(hi2c);
  3916. hi2c->State = HAL_I2C_STATE_READY;
  3917. /* Call Directly XferAbortCallback function in case of error */
  3918. hi2c->hdmatx->XferAbortCallback(hi2c->hdmatx);
  3919. }
  3920. }
  3921. else
  3922. {
  3923. /* Set the DMA Abort callback :
  3924. will lead to call HAL_I2C_ErrorCallback() at end of DMA abort procedure */
  3925. hi2c->hdmarx->XferAbortCallback = I2C_DMAAbort;
  3926. if(HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
  3927. {
  3928. /* Store Last receive data if any */
  3929. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3930. {
  3931. /* Read data from DR */
  3932. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3933. }
  3934. /* Disable I2C peripheral to prevent dummy data in buffer */
  3935. __HAL_I2C_DISABLE(hi2c);
  3936. hi2c->State = HAL_I2C_STATE_READY;
  3937. /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
  3938. hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
  3939. }
  3940. }
  3941. }
  3942. else if(hi2c->State == HAL_I2C_STATE_ABORT)
  3943. {
  3944. hi2c->State = HAL_I2C_STATE_READY;
  3945. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  3946. /* Store Last receive data if any */
  3947. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3948. {
  3949. /* Read data from DR */
  3950. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3951. }
  3952. /* Disable I2C peripheral to prevent dummy data in buffer */
  3953. __HAL_I2C_DISABLE(hi2c);
  3954. /* Call the corresponding callback to inform upper layer of End of Transfer */
  3955. HAL_I2C_AbortCpltCallback(hi2c);
  3956. }
  3957. else
  3958. {
  3959. /* Store Last receive data if any */
  3960. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == SET)
  3961. {
  3962. /* Read data from DR */
  3963. (*hi2c->pBuffPtr++) = hi2c->Instance->DR;
  3964. }
  3965. /* Call user error callback */
  3966. HAL_I2C_ErrorCallback(hi2c);
  3967. }
  3968. /* STOP Flag is not set after a NACK reception */
  3969. /* So may inform upper layer that listen phase is stopped */
  3970. /* during NACK error treatment */
  3971. if((hi2c->State == HAL_I2C_STATE_LISTEN) && ((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF))
  3972. {
  3973. hi2c->XferOptions = I2C_NO_OPTION_FRAME;
  3974. hi2c->PreviousState = I2C_STATE_NONE;
  3975. hi2c->State = HAL_I2C_STATE_READY;
  3976. hi2c->Mode = HAL_I2C_MODE_NONE;
  3977. /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
  3978. HAL_I2C_ListenCpltCallback(hi2c);
  3979. }
  3980. }
  3981. /**
  3982. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  3983. * the configuration information for I2C module
  3984. * @param DevAddress Target device address The device 7 bits address value
  3985. * in datasheet must be shifted to the left before calling the interface
  3986. * @param Timeout Timeout duration
  3987. * @param Tickstart Tick start value
  3988. * @retval HAL status
  3989. */
  3990. static HAL_StatusTypeDef I2C_MasterRequestWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  3991. {
  3992. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  3993. uint32_t CurrentXferOptions = hi2c->XferOptions;
  3994. /* Generate Start condition if first transfer */
  3995. if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  3996. {
  3997. /* Generate Start */
  3998. hi2c->Instance->CR1 |= I2C_CR1_START;
  3999. }
  4000. else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
  4001. {
  4002. /* Generate ReStart */
  4003. hi2c->Instance->CR1 |= I2C_CR1_START;
  4004. }
  4005. /* Wait until SB flag is set */
  4006. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4007. {
  4008. return HAL_TIMEOUT;
  4009. }
  4010. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  4011. {
  4012. /* Send slave address */
  4013. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4014. }
  4015. else
  4016. {
  4017. /* Send header of slave address */
  4018. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  4019. /* Wait until ADD10 flag is set */
  4020. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
  4021. {
  4022. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4023. {
  4024. return HAL_ERROR;
  4025. }
  4026. else
  4027. {
  4028. return HAL_TIMEOUT;
  4029. }
  4030. }
  4031. /* Send slave address */
  4032. hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  4033. }
  4034. /* Wait until ADDR flag is set */
  4035. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4036. {
  4037. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4038. {
  4039. return HAL_ERROR;
  4040. }
  4041. else
  4042. {
  4043. return HAL_TIMEOUT;
  4044. }
  4045. }
  4046. return HAL_OK;
  4047. }
  4048. /**
  4049. * @brief Master sends target device address for read request.
  4050. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4051. * the configuration information for I2C module
  4052. * @param DevAddress Target device address The device 7 bits address value
  4053. * in datasheet must be shifted to the left before calling the interface
  4054. * @param Timeout Timeout duration
  4055. * @param Tickstart Tick start value
  4056. * @retval HAL status
  4057. */
  4058. static HAL_StatusTypeDef I2C_MasterRequestRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Timeout, uint32_t Tickstart)
  4059. {
  4060. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  4061. uint32_t CurrentXferOptions = hi2c->XferOptions;
  4062. /* Enable Acknowledge */
  4063. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  4064. /* Generate Start condition if first transfer */
  4065. if((CurrentXferOptions == I2C_FIRST_AND_LAST_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME) || (CurrentXferOptions == I2C_NO_OPTION_FRAME))
  4066. {
  4067. /* Generate Start */
  4068. hi2c->Instance->CR1 |= I2C_CR1_START;
  4069. }
  4070. else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
  4071. {
  4072. /* Generate ReStart */
  4073. hi2c->Instance->CR1 |= I2C_CR1_START;
  4074. }
  4075. /* Wait until SB flag is set */
  4076. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4077. {
  4078. return HAL_TIMEOUT;
  4079. }
  4080. if(hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT)
  4081. {
  4082. /* Send slave address */
  4083. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  4084. }
  4085. else
  4086. {
  4087. /* Send header of slave address */
  4088. hi2c->Instance->DR = I2C_10BIT_HEADER_WRITE(DevAddress);
  4089. /* Wait until ADD10 flag is set */
  4090. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADD10, Timeout, Tickstart) != HAL_OK)
  4091. {
  4092. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4093. {
  4094. return HAL_ERROR;
  4095. }
  4096. else
  4097. {
  4098. return HAL_TIMEOUT;
  4099. }
  4100. }
  4101. /* Send slave address */
  4102. hi2c->Instance->DR = I2C_10BIT_ADDRESS(DevAddress);
  4103. /* Wait until ADDR flag is set */
  4104. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4105. {
  4106. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4107. {
  4108. return HAL_ERROR;
  4109. }
  4110. else
  4111. {
  4112. return HAL_TIMEOUT;
  4113. }
  4114. }
  4115. /* Clear ADDR flag */
  4116. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4117. /* Generate Restart */
  4118. hi2c->Instance->CR1 |= I2C_CR1_START;
  4119. /* Wait until SB flag is set */
  4120. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4121. {
  4122. return HAL_TIMEOUT;
  4123. }
  4124. /* Send header of slave address */
  4125. hi2c->Instance->DR = I2C_10BIT_HEADER_READ(DevAddress);
  4126. }
  4127. /* Wait until ADDR flag is set */
  4128. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4129. {
  4130. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4131. {
  4132. return HAL_ERROR;
  4133. }
  4134. else
  4135. {
  4136. return HAL_TIMEOUT;
  4137. }
  4138. }
  4139. return HAL_OK;
  4140. }
  4141. /**
  4142. * @brief Master sends target device address followed by internal memory address for write request.
  4143. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4144. * the configuration information for I2C module
  4145. * @param DevAddress Target device address
  4146. * @param MemAddress Internal memory address
  4147. * @param MemAddSize Size of internal memory address
  4148. * @param Timeout Timeout duration
  4149. * @param Tickstart Tick start value
  4150. * @retval HAL status
  4151. */
  4152. static HAL_StatusTypeDef I2C_RequestMemoryWrite(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  4153. {
  4154. /* Generate Start */
  4155. hi2c->Instance->CR1 |= I2C_CR1_START;
  4156. /* Wait until SB flag is set */
  4157. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4158. {
  4159. return HAL_TIMEOUT;
  4160. }
  4161. /* Send slave address */
  4162. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4163. /* Wait until ADDR flag is set */
  4164. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4165. {
  4166. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4167. {
  4168. return HAL_ERROR;
  4169. }
  4170. else
  4171. {
  4172. return HAL_TIMEOUT;
  4173. }
  4174. }
  4175. /* Clear ADDR flag */
  4176. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4177. /* Wait until TXE flag is set */
  4178. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4179. {
  4180. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4181. {
  4182. /* Generate Stop */
  4183. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4184. return HAL_ERROR;
  4185. }
  4186. else
  4187. {
  4188. return HAL_TIMEOUT;
  4189. }
  4190. }
  4191. /* If Memory address size is 8Bit */
  4192. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  4193. {
  4194. /* Send Memory Address */
  4195. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4196. }
  4197. /* If Memory address size is 16Bit */
  4198. else
  4199. {
  4200. /* Send MSB of Memory Address */
  4201. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  4202. /* Wait until TXE flag is set */
  4203. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4204. {
  4205. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4206. {
  4207. /* Generate Stop */
  4208. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4209. return HAL_ERROR;
  4210. }
  4211. else
  4212. {
  4213. return HAL_TIMEOUT;
  4214. }
  4215. }
  4216. /* Send LSB of Memory Address */
  4217. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4218. }
  4219. return HAL_OK;
  4220. }
  4221. /**
  4222. * @brief Master sends target device address followed by internal memory address for read request.
  4223. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4224. * the configuration information for I2C module
  4225. * @param DevAddress Target device address
  4226. * @param MemAddress Internal memory address
  4227. * @param MemAddSize Size of internal memory address
  4228. * @param Timeout Timeout duration
  4229. * @param Tickstart Tick start value
  4230. * @retval HAL status
  4231. */
  4232. static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart)
  4233. {
  4234. /* Enable Acknowledge */
  4235. hi2c->Instance->CR1 |= I2C_CR1_ACK;
  4236. /* Generate Start */
  4237. hi2c->Instance->CR1 |= I2C_CR1_START;
  4238. /* Wait until SB flag is set */
  4239. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4240. {
  4241. return HAL_TIMEOUT;
  4242. }
  4243. /* Send slave address */
  4244. hi2c->Instance->DR = I2C_7BIT_ADD_WRITE(DevAddress);
  4245. /* Wait until ADDR flag is set */
  4246. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4247. {
  4248. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4249. {
  4250. return HAL_ERROR;
  4251. }
  4252. else
  4253. {
  4254. return HAL_TIMEOUT;
  4255. }
  4256. }
  4257. /* Clear ADDR flag */
  4258. __HAL_I2C_CLEAR_ADDRFLAG(hi2c);
  4259. /* Wait until TXE flag is set */
  4260. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4261. {
  4262. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4263. {
  4264. /* Generate Stop */
  4265. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4266. return HAL_ERROR;
  4267. }
  4268. else
  4269. {
  4270. return HAL_TIMEOUT;
  4271. }
  4272. }
  4273. /* If Memory address size is 8Bit */
  4274. if(MemAddSize == I2C_MEMADD_SIZE_8BIT)
  4275. {
  4276. /* Send Memory Address */
  4277. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4278. }
  4279. /* If Memory address size is 16Bit */
  4280. else
  4281. {
  4282. /* Send MSB of Memory Address */
  4283. hi2c->Instance->DR = I2C_MEM_ADD_MSB(MemAddress);
  4284. /* Wait until TXE flag is set */
  4285. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4286. {
  4287. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4288. {
  4289. /* Generate Stop */
  4290. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4291. return HAL_ERROR;
  4292. }
  4293. else
  4294. {
  4295. return HAL_TIMEOUT;
  4296. }
  4297. }
  4298. /* Send LSB of Memory Address */
  4299. hi2c->Instance->DR = I2C_MEM_ADD_LSB(MemAddress);
  4300. }
  4301. /* Wait until TXE flag is set */
  4302. if(I2C_WaitOnTXEFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK)
  4303. {
  4304. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4305. {
  4306. /* Generate Stop */
  4307. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4308. return HAL_ERROR;
  4309. }
  4310. else
  4311. {
  4312. return HAL_TIMEOUT;
  4313. }
  4314. }
  4315. /* Generate Restart */
  4316. hi2c->Instance->CR1 |= I2C_CR1_START;
  4317. /* Wait until SB flag is set */
  4318. if(I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK)
  4319. {
  4320. return HAL_TIMEOUT;
  4321. }
  4322. /* Send slave address */
  4323. hi2c->Instance->DR = I2C_7BIT_ADD_READ(DevAddress);
  4324. /* Wait until ADDR flag is set */
  4325. if(I2C_WaitOnMasterAddressFlagUntilTimeout(hi2c, I2C_FLAG_ADDR, Timeout, Tickstart) != HAL_OK)
  4326. {
  4327. if(hi2c->ErrorCode == HAL_I2C_ERROR_AF)
  4328. {
  4329. return HAL_ERROR;
  4330. }
  4331. else
  4332. {
  4333. return HAL_TIMEOUT;
  4334. }
  4335. }
  4336. return HAL_OK;
  4337. }
  4338. /**
  4339. * @brief DMA I2C process complete callback.
  4340. * @param hdma DMA handle
  4341. * @retval None
  4342. */
  4343. static void I2C_DMAXferCplt(DMA_HandleTypeDef *hdma)
  4344. {
  4345. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  4346. /* Declaration of temporary variable to prevent undefined behavior of volatile usage */
  4347. uint32_t CurrentState = hi2c->State;
  4348. uint32_t CurrentMode = hi2c->Mode;
  4349. if((CurrentState == HAL_I2C_STATE_BUSY_TX) || ((CurrentState == HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE)))
  4350. {
  4351. /* Disable DMA Request */
  4352. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  4353. hi2c->XferCount = 0U;
  4354. /* Enable EVT and ERR interrupt */
  4355. __HAL_I2C_ENABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR);
  4356. }
  4357. else
  4358. {
  4359. /* Disable Acknowledge */
  4360. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4361. /* Generate Stop */
  4362. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4363. /* Disable Last DMA */
  4364. hi2c->Instance->CR2 &= ~I2C_CR2_LAST;
  4365. /* Disable DMA Request */
  4366. hi2c->Instance->CR2 &= ~I2C_CR2_DMAEN;
  4367. hi2c->XferCount = 0U;
  4368. /* Check if Errors has been detected during transfer */
  4369. if(hi2c->ErrorCode != HAL_I2C_ERROR_NONE)
  4370. {
  4371. HAL_I2C_ErrorCallback(hi2c);
  4372. }
  4373. else
  4374. {
  4375. hi2c->State = HAL_I2C_STATE_READY;
  4376. if(hi2c->Mode == HAL_I2C_MODE_MEM)
  4377. {
  4378. hi2c->Mode = HAL_I2C_MODE_NONE;
  4379. HAL_I2C_MemRxCpltCallback(hi2c);
  4380. }
  4381. else
  4382. {
  4383. hi2c->Mode = HAL_I2C_MODE_NONE;
  4384. HAL_I2C_MasterRxCpltCallback(hi2c);
  4385. }
  4386. }
  4387. }
  4388. }
  4389. /**
  4390. * @brief DMA I2C communication error callback.
  4391. * @param hdma DMA handle
  4392. * @retval None
  4393. */
  4394. static void I2C_DMAError(DMA_HandleTypeDef *hdma)
  4395. {
  4396. I2C_HandleTypeDef* hi2c = (I2C_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
  4397. /* Ignore DMA FIFO error */
  4398. if(HAL_DMA_GetError(hdma) != HAL_DMA_ERROR_FE)
  4399. {
  4400. /* Disable Acknowledge */
  4401. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4402. hi2c->XferCount = 0U;
  4403. hi2c->State = HAL_I2C_STATE_READY;
  4404. hi2c->Mode = HAL_I2C_MODE_NONE;
  4405. hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
  4406. HAL_I2C_ErrorCallback(hi2c);
  4407. }
  4408. }
  4409. /**
  4410. * @brief DMA I2C communication abort callback
  4411. * (To be called at end of DMA Abort procedure).
  4412. * @param hdma DMA handle.
  4413. * @retval None
  4414. */
  4415. static void I2C_DMAAbort(DMA_HandleTypeDef *hdma)
  4416. {
  4417. I2C_HandleTypeDef* hi2c = ( I2C_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
  4418. /* Disable Acknowledge */
  4419. hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
  4420. hi2c->XferCount = 0U;
  4421. /* Reset XferAbortCallback */
  4422. hi2c->hdmatx->XferAbortCallback = NULL;
  4423. hi2c->hdmarx->XferAbortCallback = NULL;
  4424. /* Check if come from abort from user */
  4425. if(hi2c->State == HAL_I2C_STATE_ABORT)
  4426. {
  4427. hi2c->State = HAL_I2C_STATE_READY;
  4428. hi2c->Mode = HAL_I2C_MODE_NONE;
  4429. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4430. /* Disable I2C peripheral to prevent dummy data in buffer */
  4431. __HAL_I2C_DISABLE(hi2c);
  4432. /* Call the corresponding callback to inform upper layer of End of Transfer */
  4433. HAL_I2C_AbortCpltCallback(hi2c);
  4434. }
  4435. else
  4436. {
  4437. hi2c->State = HAL_I2C_STATE_READY;
  4438. hi2c->Mode = HAL_I2C_MODE_NONE;
  4439. /* Disable I2C peripheral to prevent dummy data in buffer */
  4440. __HAL_I2C_DISABLE(hi2c);
  4441. /* Call the corresponding callback to inform upper layer of End of Transfer */
  4442. HAL_I2C_ErrorCallback(hi2c);
  4443. }
  4444. }
  4445. /**
  4446. * @brief This function handles I2C Communication Timeout.
  4447. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4448. * the configuration information for I2C module
  4449. * @param Flag specifies the I2C flag to check.
  4450. * @param Status The new Flag status (SET or RESET).
  4451. * @param Timeout Timeout duration
  4452. * @param Tickstart Tick start value
  4453. * @retval HAL status
  4454. */
  4455. static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart)
  4456. {
  4457. /* Wait until flag is set */
  4458. while((__HAL_I2C_GET_FLAG(hi2c, Flag) ? SET : RESET) == Status)
  4459. {
  4460. /* Check for the Timeout */
  4461. if(Timeout != HAL_MAX_DELAY)
  4462. {
  4463. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  4464. {
  4465. hi2c->PreviousState = I2C_STATE_NONE;
  4466. hi2c->State= HAL_I2C_STATE_READY;
  4467. hi2c->Mode = HAL_I2C_MODE_NONE;
  4468. /* Process Unlocked */
  4469. __HAL_UNLOCK(hi2c);
  4470. return HAL_TIMEOUT;
  4471. }
  4472. }
  4473. }
  4474. return HAL_OK;
  4475. }
  4476. /**
  4477. * @brief This function handles I2C Communication Timeout for Master addressing phase.
  4478. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4479. * the configuration information for I2C module
  4480. * @param Flag specifies the I2C flag to check.
  4481. * @param Timeout Timeout duration
  4482. * @param Tickstart Tick start value
  4483. * @retval HAL status
  4484. */
  4485. static HAL_StatusTypeDef I2C_WaitOnMasterAddressFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, uint32_t Timeout, uint32_t Tickstart)
  4486. {
  4487. while(__HAL_I2C_GET_FLAG(hi2c, Flag) == RESET)
  4488. {
  4489. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  4490. {
  4491. /* Generate Stop */
  4492. hi2c->Instance->CR1 |= I2C_CR1_STOP;
  4493. /* Clear AF Flag */
  4494. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  4495. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  4496. hi2c->PreviousState = I2C_STATE_NONE;
  4497. hi2c->State= HAL_I2C_STATE_READY;
  4498. /* Process Unlocked */
  4499. __HAL_UNLOCK(hi2c);
  4500. return HAL_ERROR;
  4501. }
  4502. /* Check for the Timeout */
  4503. if(Timeout != HAL_MAX_DELAY)
  4504. {
  4505. if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
  4506. {
  4507. hi2c->PreviousState = I2C_STATE_NONE;
  4508. hi2c->State= HAL_I2C_STATE_READY;
  4509. /* Process Unlocked */
  4510. __HAL_UNLOCK(hi2c);
  4511. return HAL_TIMEOUT;
  4512. }
  4513. }
  4514. }
  4515. return HAL_OK;
  4516. }
  4517. /**
  4518. * @brief This function handles I2C Communication Timeout for specific usage of TXE flag.
  4519. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4520. * the configuration information for the specified I2C.
  4521. * @param Timeout Timeout duration
  4522. * @param Tickstart Tick start value
  4523. * @retval HAL status
  4524. */
  4525. static HAL_StatusTypeDef I2C_WaitOnTXEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4526. {
  4527. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET)
  4528. {
  4529. /* Check if a NACK is detected */
  4530. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4531. {
  4532. return HAL_ERROR;
  4533. }
  4534. /* Check for the Timeout */
  4535. if(Timeout != HAL_MAX_DELAY)
  4536. {
  4537. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4538. {
  4539. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4540. hi2c->PreviousState = I2C_STATE_NONE;
  4541. hi2c->State= HAL_I2C_STATE_READY;
  4542. /* Process Unlocked */
  4543. __HAL_UNLOCK(hi2c);
  4544. return HAL_TIMEOUT;
  4545. }
  4546. }
  4547. }
  4548. return HAL_OK;
  4549. }
  4550. /**
  4551. * @brief This function handles I2C Communication Timeout for specific usage of BTF flag.
  4552. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4553. * the configuration information for the specified I2C.
  4554. * @param Timeout Timeout duration
  4555. * @param Tickstart Tick start value
  4556. * @retval HAL status
  4557. */
  4558. static HAL_StatusTypeDef I2C_WaitOnBTFFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4559. {
  4560. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BTF) == RESET)
  4561. {
  4562. /* Check if a NACK is detected */
  4563. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4564. {
  4565. return HAL_ERROR;
  4566. }
  4567. /* Check for the Timeout */
  4568. if(Timeout != HAL_MAX_DELAY)
  4569. {
  4570. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4571. {
  4572. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4573. hi2c->PreviousState = I2C_STATE_NONE;
  4574. hi2c->State= HAL_I2C_STATE_READY;
  4575. /* Process Unlocked */
  4576. __HAL_UNLOCK(hi2c);
  4577. return HAL_TIMEOUT;
  4578. }
  4579. }
  4580. }
  4581. return HAL_OK;
  4582. }
  4583. /**
  4584. * @brief This function handles I2C Communication Timeout for specific usage of STOP flag.
  4585. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4586. * the configuration information for the specified I2C.
  4587. * @param Timeout Timeout duration
  4588. * @param Tickstart Tick start value
  4589. * @retval HAL status
  4590. */
  4591. static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4592. {
  4593. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
  4594. {
  4595. /* Check if a NACK is detected */
  4596. if(I2C_IsAcknowledgeFailed(hi2c) != HAL_OK)
  4597. {
  4598. return HAL_ERROR;
  4599. }
  4600. /* Check for the Timeout */
  4601. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4602. {
  4603. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4604. hi2c->PreviousState = I2C_STATE_NONE;
  4605. hi2c->State= HAL_I2C_STATE_READY;
  4606. /* Process Unlocked */
  4607. __HAL_UNLOCK(hi2c);
  4608. return HAL_TIMEOUT;
  4609. }
  4610. }
  4611. return HAL_OK;
  4612. }
  4613. /**
  4614. * @brief This function handles I2C Communication Timeout for specific usage of RXNE flag.
  4615. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4616. * the configuration information for the specified I2C.
  4617. * @param Timeout Timeout duration
  4618. * @param Tickstart Tick start value
  4619. * @retval HAL status
  4620. */
  4621. static HAL_StatusTypeDef I2C_WaitOnRXNEFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart)
  4622. {
  4623. while(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_RXNE) == RESET)
  4624. {
  4625. /* Check if a STOPF is detected */
  4626. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == SET)
  4627. {
  4628. /* Clear STOP Flag */
  4629. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
  4630. hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
  4631. hi2c->PreviousState = I2C_STATE_NONE;
  4632. hi2c->State= HAL_I2C_STATE_READY;
  4633. /* Process Unlocked */
  4634. __HAL_UNLOCK(hi2c);
  4635. return HAL_ERROR;
  4636. }
  4637. /* Check for the Timeout */
  4638. if((Timeout == 0U) || ((HAL_GetTick()-Tickstart) > Timeout))
  4639. {
  4640. hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
  4641. hi2c->State= HAL_I2C_STATE_READY;
  4642. /* Process Unlocked */
  4643. __HAL_UNLOCK(hi2c);
  4644. return HAL_TIMEOUT;
  4645. }
  4646. }
  4647. return HAL_OK;
  4648. }
  4649. /**
  4650. * @brief This function handles Acknowledge failed detection during an I2C Communication.
  4651. * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
  4652. * the configuration information for the specified I2C.
  4653. * @retval HAL status
  4654. */
  4655. static HAL_StatusTypeDef I2C_IsAcknowledgeFailed(I2C_HandleTypeDef *hi2c)
  4656. {
  4657. if(__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_AF) == SET)
  4658. {
  4659. /* Clear NACKF Flag */
  4660. __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
  4661. hi2c->ErrorCode = HAL_I2C_ERROR_AF;
  4662. hi2c->PreviousState = I2C_STATE_NONE;
  4663. hi2c->State= HAL_I2C_STATE_READY;
  4664. /* Process Unlocked */
  4665. __HAL_UNLOCK(hi2c);
  4666. return HAL_ERROR;
  4667. }
  4668. return HAL_OK;
  4669. }
  4670. /**
  4671. * @}
  4672. */
  4673. #endif /* HAL_I2C_MODULE_ENABLED */
  4674. /**
  4675. * @}
  4676. */
  4677. /**
  4678. * @}
  4679. */
  4680. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/