ChassisDevice.c 45 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176
  1. /*****************************************************************
  2. *****************************************************************
  3. *** **
  4. *** (C)Copyright 2005-2006, American Megatrends Inc. **
  5. *** **
  6. *** All Rights Reserved. **
  7. *** **
  8. *** 6145-F, Northbelt Parkway, Norcross, **
  9. *** **
  10. *** Georgia - 30071, USA. Phone-(770)-246-8600. **
  11. *** **
  12. *****************************************************************
  13. *****************************************************************
  14. ******************************************************************
  15. *
  16. * ChassisDevice.c
  17. * Chassis commands
  18. *
  19. * Author: Rama Bisa <ramab@ami.com>
  20. *
  21. ******************************************************************/
  22. #define ENABLE_DEBUG_MACROS 0
  23. #include "Types.h"
  24. #include "ChassisDevice.h"
  25. #include "Debug.h"
  26. #include "Support.h"
  27. #include "IPMI_ChassisDevice.h"
  28. #include "IPMIDefs.h"
  29. #include "MsgHndlr.h"
  30. #include "Util.h"
  31. #include "Platform.h"
  32. #include "NVRAccess.h"
  33. #include "SharedMem.h"
  34. #include "ChassisCtrl.h"
  35. #include "PDKAccess.h"
  36. #include "IPMIConf.h"
  37. #include "featuredef.h"
  38. /* Reserved bit macro definitions */
  39. #define RESERVED_BITS_CHASSISCONTROL 0xF0 //(BIT7 | BIT6 | BIT5 |BIT4)
  40. #define RESERVED_BITS_GETCHASSISIDENTIFY 0xFE //(BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)
  41. #define RESERVED_BITS_SETCHASSISCAPS 0xFC //(BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2)
  42. #define RESERVED_BITS_SETPOWERRESTOREPOLICY 0xFC //(BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2)
  43. #define RESERVED_BITS_SETFPBUTTONENABLES 0xF0 //(BIT7 | BIT6 | BIT5 | BIT4)
  44. #if CHASSIS_DEVICE == 1
  45. /*** Local Definitions ***/
  46. #define PRP_ALWAYS_POWEROFF_SUPPORT 0x01
  47. #define PRP_LAST_STATE_SUPPORT 0x02
  48. #define PRP_ALWAYS_POWERON_SUPPORT 0x04
  49. #define CHASSIS_AMI_OEM_PARAM 96
  50. #define CHASSIS_SET_INPROG 0x00
  51. #define CHASSIS_SERVICE_PART_SEL 0x01
  52. #define CHASSIS_SERVICE_PART_SCAN 0x02
  53. #define CHASSIS_BOOT_FLAG_VALID_BIT_CLEAR 0x03
  54. #define CHASSIS_BOOT_INFO_ACK 0x04
  55. #define CHASSIS_BOOT_FLAGS 0x05
  56. #define CHASSIS_BOOT_INITIATOR_INFO 0x06
  57. #define CHASSIS_BOOT_INITIATOR_MBOX 0x07
  58. #define CHASSIS_AMI_OEM_PARAM 96
  59. #define SSICB_OEM_PARAM_BLK_SIZE_TBL 0x78
  60. #define SSICB_BOOT_ORDER_TBL 0x7D
  61. #define SSICB_BOOT_DEV_SELECTOR 0x7E
  62. #define SSICB_SLOT_CONFIG_TBL 0x7F
  63. #define ROLLBACK_OPTION 0x00
  64. /* Mask Bits */
  65. #define BIT5_BIT2_MASK 0x3C
  66. #define BIT6_BIT5_MASK 0x60
  67. #define BIT1_BIT0_MASK 0x03
  68. /* Reserved Bits */
  69. #define RESERVED_VALUE_03 0x03
  70. #define RESERVED_VALUE_10 0x10
  71. #define RESERVED_VALUE_20 0x20
  72. #define RESERVED_VALUE_28 0x28
  73. #define RESERVED_VALUE_30 0x30
  74. #define RESERVED_VALUE_34 0x34
  75. #define RESERVED_VALUE_38 0x38
  76. #define RESERVED_VALUE_40 0x40
  77. #define RESERVED_VALUE_60 0x60
  78. #define RESERVED_VALUE_80 0x80
  79. /*** Module Varibales ***/
  80. static const INT8U m_BootOptParamLen [] = /**< Boot Options parameter length */
  81. {
  82. 0x01, /**< Set in progress byte length */
  83. 0x01, /**< Service Partition selector length */
  84. 0x01, /**< Service Partition scan length */
  85. 0x01, /**< Boot flag valid bit length */
  86. sizeof(BootInfoAck_T), /**< Boot info ack length */
  87. sizeof(BootFlags_T), /**< Boot Flags valid length */
  88. sizeof(BootInitiatorInfo_T), /**< Boot init info length */
  89. sizeof(BootInitiatorMboxReq_T), /**< Boot init info length */
  90. };
  91. static const INT8U m_SSIBootOptParamLen [] = /**< SSI Boot Options parameter length */
  92. {
  93. sizeof(OemParamBlkSizeTbl_T), /* OEM Parameter Block Size Table length */
  94. 0x0, /* Reserved */
  95. 0x0, /* Reserved */
  96. 0x0, /* Reserved */
  97. 0x0, /* Reserved */
  98. sizeof(BootOrderTblReq_T), /* Boot Order Table length */
  99. sizeof(INT8U), /* SSI Boot Device Selector length*/
  100. sizeof(SlotConfigTbl_T) /* Slot Configuration Table length */
  101. };
  102. #define MAX_BOOT_PARAMS_DATA 20
  103. typedef struct
  104. {
  105. INT8U Params;
  106. INT8U ReservedBits [MAX_BOOT_PARAMS_DATA];
  107. INT8U DataLen;
  108. } BootCfgRsvdBits_T;
  109. static BootCfgRsvdBits_T m_RsvdBitsCheck [] = {
  110. /* Param Reserved Bits Data Size */
  111. { 0, { 0xFC }, 0x1 }, /* Set In progress */
  112. { 2, { 0xFC }, 0x1 },
  113. { 3, { 0xE0 }, 0x1 },
  114. { 5, { 0x1F,0x00,0x00,0xF0,0xE0}, 0x5 },
  115. { 6, { 0xF0 }, 0x1 }
  116. };
  117. /*-------------------------------------
  118. * GetChassisCaps
  119. *-------------------------------------*/
  120. int
  121. GetChassisCaps (_NEAR_ INT8U* pReq, INT8U ReqLen, _NEAR_ INT8U* pRes,int BMCInst)
  122. {
  123. _NEAR_ GetChassisCapabilitiesRes_T* pGetChassisCapsRes =
  124. (_NEAR_ GetChassisCapabilitiesRes_T*) pRes;
  125. BMCInfo_t *pBMCInfo = &g_BMCInfo[BMCInst];
  126. IPMI_DBG_PRINT ("\nGET Chassis CAPABILITIES\n");
  127. pGetChassisCapsRes->CompletionCode = CC_NORMAL;
  128. OS_THREAD_MUTEX_ACQUIRE(&pBMCInfo->ChassisMutex, WAIT_INFINITE);
  129. _fmemcpy ( (_FAR_ INT8U*)&pGetChassisCapsRes->ChassisCapabilities,
  130. (_FAR_ INT8U*)&pBMCInfo->ChassisConfig.ChassisCapabilities,
  131. sizeof(ChassisCapabilities_T) );
  132. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  133. return sizeof(GetChassisCapabilitiesRes_T);
  134. }
  135. /*-------------------------------------
  136. * GetChassisStatus
  137. *-------------------------------------*/
  138. int
  139. GetChassisStatus (_NEAR_ INT8U* pReq, INT8U ReqLen, _NEAR_ INT8U* pRes,int BMCInst)
  140. {
  141. INT8U PSGood=0;
  142. _NEAR_ GetChassisStatusRes_T* pGetChassisStatusRes =
  143. (_NEAR_ GetChassisStatusRes_T*) pRes;
  144. BMCInfo_t *pBMCInfo = &g_BMCInfo[BMCInst];
  145. IPMI_DBG_PRINT ("\nGET Chassis STATUS\n");
  146. pGetChassisStatusRes->CompletionCode = CC_NORMAL;
  147. OS_THREAD_MUTEX_ACQUIRE(&pBMCInfo->ChassisMutex, WAIT_INFINITE);
  148. _fmemcpy ( (_FAR_ INT8U*)&pGetChassisStatusRes->ChassisPowerState,
  149. (_FAR_ INT8U*)&pBMCInfo->ChassisConfig.ChassisPowerState,
  150. sizeof(ChassisPowerState_T));
  151. pGetChassisStatusRes->ChassisPowerState.PowerState &= ~0x01;
  152. if(g_PDKHandle[PDK_GETPSGOOD] != NULL)
  153. {
  154. PSGood = ((int(*)(int))g_PDKHandle[PDK_GETPSGOOD]) (BMCInst);
  155. }
  156. pGetChassisStatusRes->ChassisPowerState.PowerState |= (TRUE == PSGood) ? 0x01: 0x00;
  157. /* Get Last Power Event status */
  158. if(g_PDKHandle[PDK_GETLASTPOWEREVENT] != NULL)
  159. {
  160. pGetChassisStatusRes->ChassisPowerState.LastPowerEvent =
  161. ((INT8U(*)(int))g_PDKHandle[PDK_GETLASTPOWEREVENT]) (BMCInst);
  162. }
  163. /* Get the Misc Chassis Status */
  164. pGetChassisStatusRes->ChassisPowerState.MiscChassisState = 0x0;
  165. if((BMC_GET_SHARED_MEM(BMCInst)->HealthState.HardDrive))
  166. pGetChassisStatusRes->ChassisPowerState.MiscChassisState |= (1 <<2);
  167. if((BMC_GET_SHARED_MEM(BMCInst)->HealthState.CoolingSys ))
  168. pGetChassisStatusRes->ChassisPowerState.MiscChassisState |= ( 1<<3);
  169. pGetChassisStatusRes->ChassisPowerState.MiscChassisState |= CHASSIS_IDENTITY_STATE_INFO_SUPPORTED;
  170. if(g_BMCInfo[BMCInst].Msghndlr.ChassisIdentifyForce)
  171. {
  172. pGetChassisStatusRes->ChassisPowerState.MiscChassisState |= CHASSIS_IDENTITY_INDEFINITE_ON;
  173. }
  174. else
  175. {
  176. if(0!=g_BMCInfo[BMCInst].Msghndlr.ChassisIdentifyTimeout)
  177. pGetChassisStatusRes->ChassisPowerState.MiscChassisState |= CHASSIS_IDENTITY_TIMED_ON;
  178. else
  179. pGetChassisStatusRes->ChassisPowerState.MiscChassisState |= CHASSIS_IDENTITY_OFF;
  180. }
  181. if(g_PDKHandle[PDK_GETMISCCHASSISSTATE] != NULL)
  182. {
  183. ((int(*)(unsigned char*, int)) g_PDKHandle[PDK_GETMISCCHASSISSTATE]) (&pGetChassisStatusRes->ChassisPowerState.MiscChassisState, BMCInst);
  184. }
  185. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  186. //return sizeof (GetChassisStatusRes_T);
  187. return sizeof (GetChassisStatusRes_T) ;
  188. }
  189. /*-------------------------------------
  190. * ChassisControl
  191. *-------------------------------------*/
  192. int
  193. ChassisControl ( _NEAR_ INT8U* pReq, INT8U ReqLen, _NEAR_ INT8U* pRes,int BMCInst )
  194. {
  195. _NEAR_ ChassisControlReq_T* pChassisControlReq =
  196. (_NEAR_ ChassisControlReq_T*) pReq;
  197. _NEAR_ ChassisControlRes_T* pChassisControlRes =
  198. (_NEAR_ ChassisControlRes_T*) pRes;
  199. _FAR_ BMCInfo_t* pBMCInfo = &g_BMCInfo[BMCInst];
  200. pChassisControlRes->CompletionCode = CC_NORMAL;
  201. /* Check for the reserved bytes should b zero */
  202. if ( 0 != (pChassisControlReq->ChassisControl & RESERVED_BITS_CHASSISCONTROL ) )
  203. {
  204. pChassisControlRes->CompletionCode = CC_INV_DATA_FIELD;
  205. return sizeof(INT8U);
  206. }
  207. OS_THREAD_MUTEX_ACQUIRE(&pBMCInfo->ChassisMutex, WAIT_INFINITE);
  208. switch (pChassisControlReq->ChassisControl & 0x0F )
  209. {
  210. case CHASSIS_POWER_DOWN:
  211. IPMI_DBG_PRINT ("Chassis IS GOING FOR POWER_DOWN\n");
  212. pBMCInfo->HostOFFStopWDT = TRUE ;
  213. pBMCInfo->ChassisConfig.SysRestartCause = RESTART_CAUSE_CHASSIS_CTRL;
  214. OnSetRestartCause(pBMCInfo->ChassisConfig.SysRestartCause, TRUE,BMCInst);
  215. pBMCInfo->Msghndlr.ChassisControl= CHASSIS_POWER_DOWN;
  216. break;
  217. case CHASSIS_POWER_UP:
  218. IPMI_DBG_PRINT ("Chassis IS GOING FOR POWER UP\n");
  219. pBMCInfo->ChassisConfig.SysRestartCause = RESTART_CAUSE_CHASSIS_CTRL;
  220. OnSetRestartCause(pBMCInfo->ChassisConfig.SysRestartCause, TRUE,BMCInst);
  221. pBMCInfo->Msghndlr.ChassisControl = CHASSIS_POWER_UP;
  222. /* Set Last Power Event through IPMI Command */
  223. if(g_PDKHandle[PDK_SETLASTPOWEREVENT] != NULL)
  224. {
  225. ((void(*)(INT8U,int))g_PDKHandle[PDK_SETLASTPOWEREVENT]) (PDK_LAST_POWER_ON_VIA_IPMI,BMCInst);
  226. }
  227. break;
  228. case CHASSIS_POWER_CYCLE:
  229. pBMCInfo->ChassisConfig.SysRestartCause = RESTART_CAUSE_CHASSIS_CTRL;
  230. OnSetRestartCause(pBMCInfo->ChassisConfig.SysRestartCause, TRUE,BMCInst);
  231. IPMI_DBG_PRINT ("Chassis IS GOING FOR POWER CYCLE\n");
  232. pBMCInfo->Msghndlr.ChassisControl = CHASSIS_POWER_CYCLE;
  233. /* Set Last Power Event through IPMI Command */
  234. if(g_PDKHandle[PDK_SETLASTPOWEREVENT] != NULL)
  235. {
  236. ((void(*)(INT8U,int))g_PDKHandle[PDK_SETLASTPOWEREVENT]) (PDK_LAST_POWER_ON_VIA_IPMI,BMCInst);
  237. }
  238. break;
  239. case CHASSIS_HARD_RESET:
  240. IPMI_DBG_PRINT ("Chassis IS GOING FOR HARD RESET");
  241. pBMCInfo->ChassisConfig.SysRestartCause = RESTART_CAUSE_CHASSIS_CTRL;
  242. OnSetRestartCause(pBMCInfo->ChassisConfig.SysRestartCause, TRUE,BMCInst);
  243. pBMCInfo->Msghndlr.ChassisControl = CHASSIS_HARD_RESET;
  244. break;
  245. case CHASSIS_PULSE_DIAGNOSTIC_INTERRUPT:
  246. IPMI_DBG_PRINT ("Chassis IS GOING FOR DIAG INT\n");
  247. Platform_HostDiagInt (BMCInst);
  248. break;
  249. case CHASSIS_SOFT_SHUTDOWN:
  250. IPMI_DBG_PRINT ("Chassis IS GOING FOR SOFT SHUTDOWN\n");
  251. Platform_HostSoftShutDown (BMCInst);
  252. break;
  253. default:
  254. IPMI_DBG_PRINT ("UNKNOWN Chassis CONTROL REQUEST \n");
  255. pChassisControlRes->CompletionCode = CC_INV_DATA_FIELD;
  256. break;
  257. }
  258. FlushIPMI((INT8U*)&pBMCInfo->ChassisConfig,(INT8U*)&pBMCInfo->ChassisConfig,pBMCInfo->IPMIConfLoc.ChassisConfigAddr,sizeof(ChassisConfig_T),BMCInst);
  259. /* Log Power Event Audit Info */
  260. if ( (pChassisControlReq->ChassisControl <= CHASSIS_SOFT_SHUTDOWN ) &&
  261. (g_PDKHandle[PDK_PWRONOFFAUDIT] != NULL) ) //empty
  262. {
  263. ((void(*)(INT8U,int))g_PDKHandle[PDK_PWRONOFFAUDIT]) (pChassisControlReq->ChassisControl, BMCInst);
  264. }
  265. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  266. return sizeof (ChassisControlRes_T);
  267. }
  268. /*-------------------------------------
  269. * GetChassisIdentify
  270. *-------------------------------------*/
  271. int
  272. GetChassisIdentify (_NEAR_ INT8U* pReq, INT8U ReqLen, _NEAR_ INT8U* pRes,int BMCInst)
  273. {
  274. _NEAR_ ChassisIdentifyReq_T* pChassisIdentifyReq =
  275. (_NEAR_ ChassisIdentifyReq_T*) pReq;
  276. _NEAR_ ChassisIdentifyRes_T* pChassisIdentifyRes =
  277. (_NEAR_ ChassisIdentifyRes_T*) pRes;
  278. _FAR_ BMCInfo_t* pBMCInfo = &g_BMCInfo[BMCInst];
  279. IPMI_DBG_PRINT ("GET Chassis IDENTIFY\n");
  280. if (ReqLen <= sizeof(ChassisIdentifyReq_T))
  281. {
  282. OS_THREAD_MUTEX_ACQUIRE(&pBMCInfo->ChassisMutex, WAIT_INFINITE);
  283. if (0 != ReqLen)
  284. {
  285. pBMCInfo->Msghndlr.ChassisIdentifyForce = 0;
  286. pBMCInfo->Msghndlr.ChassisIdentifyTimeout = pChassisIdentifyReq->IdentifyInterval;
  287. }
  288. else
  289. {
  290. pBMCInfo->Msghndlr.ChassisIdentifyForce = 0;
  291. pBMCInfo->Msghndlr.ChassisIdentifyTimeout = 15;
  292. }
  293. if (ReqLen == 2)
  294. {
  295. /* Check for the reserved bytes should b zero */
  296. if ( 0 != (pChassisIdentifyReq->ForceIdentify & RESERVED_BITS_GETCHASSISIDENTIFY ) )
  297. {
  298. pChassisIdentifyRes->CompletionCode = CC_INV_DATA_FIELD;
  299. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  300. return sizeof(INT8U);
  301. }
  302. if(pChassisIdentifyReq->ForceIdentify & 1)
  303. {
  304. pBMCInfo->Msghndlr.ChassisIdentifyTimeout = 0;
  305. pBMCInfo->Msghndlr.ChassisIdentifyForce = 1;
  306. }
  307. else
  308. {
  309. pBMCInfo->Msghndlr.ChassisIdentifyForce = 0;
  310. }
  311. }
  312. pBMCInfo->Msghndlr.ChassisIdentify = TRUE;
  313. pChassisIdentifyRes->CompletionCode = CC_NORMAL;
  314. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  315. }
  316. else
  317. {
  318. pChassisIdentifyRes->CompletionCode = CC_REQ_INV_LEN;
  319. }
  320. return sizeof(ChassisIdentifyRes_T);
  321. }
  322. /*-------------------------------------
  323. * SetChassisCaps
  324. *-------------------------------------*/
  325. int
  326. SetChassisCaps (_NEAR_ INT8U* pReq, INT8U ReqLen, _NEAR_ INT8U* pRes,int BMCInst)
  327. {
  328. _NEAR_ SetChassisCapabilitiesReq_T* pSetChassisCapsReq =
  329. (_NEAR_ SetChassisCapabilitiesReq_T*) pReq;
  330. _NEAR_ SetChassisCapabilitiesRes_T* pSetChassisCapsRes =
  331. (_NEAR_ SetChassisCapabilitiesRes_T*) pRes;
  332. BMCInfo_t *pBMCInfo = &g_BMCInfo[BMCInst];
  333. IPMI_DBG_PRINT ("SET Chassis CAPABILITIES\n");
  334. /* Check for the reserved bytes should b zero */
  335. if ( 0 != (pSetChassisCapsReq->ChassisCaps.CapabilitiesFlags & RESERVED_BITS_SETCHASSISCAPS ) )
  336. {
  337. pSetChassisCapsRes->CompletionCode = CC_INV_DATA_FIELD;
  338. return sizeof(INT8U);
  339. }
  340. if ((ReqLen != 5) &&
  341. (ReqLen != sizeof(SetChassisCapabilitiesReq_T)))
  342. {
  343. pSetChassisCapsRes->CompletionCode= CC_REQ_INV_LEN;
  344. return sizeof(SetChassisCapabilitiesRes_T);
  345. }
  346. if((pSetChassisCapsReq->ChassisCaps.CapabilitiesFlags & 0xFC ) != 0)
  347. {
  348. pSetChassisCapsRes->CompletionCode= CC_INV_DATA_FIELD;
  349. return sizeof(SetChassisCapabilitiesRes_T);
  350. }
  351. OS_THREAD_MUTEX_ACQUIRE(&pBMCInfo->ChassisMutex, WAIT_INFINITE);
  352. _fmemcpy ((_FAR_ INT8U*) &pBMCInfo->ChassisConfig.ChassisCapabilities,
  353. (_FAR_ INT8U*) &pSetChassisCapsReq->ChassisCaps,
  354. sizeof(ChassisCapabilities_T));
  355. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  356. FlushIPMI((INT8U*)&pBMCInfo->ChassisConfig,(INT8U*)&pBMCInfo->ChassisConfig,pBMCInfo->IPMIConfLoc.ChassisConfigAddr,sizeof(ChassisConfig_T),BMCInst);
  357. pSetChassisCapsRes->CompletionCode = CC_NORMAL;
  358. return sizeof (SetChassisCapabilitiesRes_T);
  359. }
  360. /*-------------------------------------
  361. * SetPowerRestorePolicy
  362. *-------------------------------------*/
  363. int
  364. SetPowerRestorePolicy (_NEAR_ INT8U* pReq, INT8U ReqLen, _NEAR_ INT8U* pRes,int BMCInst)
  365. {
  366. _NEAR_ SetPowerRestorePolicyReq_T* pSetPowerRestorePolicyReq =
  367. (_NEAR_ SetPowerRestorePolicyReq_T*) pReq;
  368. _NEAR_ SetPowerRestorePolicyRes_T* pSetPowerRestorePolicyRes =
  369. (_NEAR_ SetPowerRestorePolicyRes_T*) pRes;
  370. BMCInfo_t *pBMCInfo = &g_BMCInfo[BMCInst];
  371. IPMI_DBG_PRINT ("\nSET POWER RESORE POLICY\n");
  372. /* Check for the reserved bytes should b zero */
  373. if ( 0 != ( pSetPowerRestorePolicyReq->PowerRestorePolicy & RESERVED_BITS_SETPOWERRESTOREPOLICY ))
  374. {
  375. pSetPowerRestorePolicyRes->CompletionCode = CC_INV_DATA_FIELD;
  376. return sizeof (INT8U);
  377. }
  378. // 011b = no change to the current power restore policy
  379. if (pSetPowerRestorePolicyReq->PowerRestorePolicy != 0x03)
  380. {
  381. OS_THREAD_MUTEX_ACQUIRE(&pBMCInfo->ChassisMutex, WAIT_INFINITE);
  382. pBMCInfo->ChassisConfig.PowerRestorePolicy =
  383. pSetPowerRestorePolicyReq->PowerRestorePolicy & 0x07;
  384. pBMCInfo->ChassisConfig.ChassisPowerState.PowerState &= ~0x60;
  385. pBMCInfo->ChassisConfig.ChassisPowerState.PowerState |= (pSetPowerRestorePolicyReq->PowerRestorePolicy << 5);
  386. FlushIPMI((INT8U*)&pBMCInfo->ChassisConfig,(INT8U*)&pBMCInfo->ChassisConfig,pBMCInfo->IPMIConfLoc.ChassisConfigAddr,sizeof(ChassisConfig_T),BMCInst);
  387. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  388. }
  389. pSetPowerRestorePolicyRes->CompletionCode = CC_NORMAL;
  390. pSetPowerRestorePolicyRes->PowerRestorePolicy = PRP_ALWAYS_POWEROFF_SUPPORT |
  391. PRP_LAST_STATE_SUPPORT |
  392. PRP_ALWAYS_POWERON_SUPPORT;
  393. return sizeof(SetPowerRestorePolicyRes_T);
  394. }
  395. /*-------------------------------------
  396. * GetSysRestartCause
  397. *-------------------------------------*/
  398. int
  399. GetSysRestartCause (_NEAR_ INT8U* pReq, INT8U ReqLen, _NEAR_ INT8U* pRes,int BMCInst)
  400. {
  401. _NEAR_ GetSystemRestartCauseRes_T* pGetSysRestartCauseRes =
  402. (_NEAR_ GetSystemRestartCauseRes_T*) pRes;
  403. BMCInfo_t *pBMCInfo = &g_BMCInfo[BMCInst];
  404. INT8U *curchannel;
  405. IPMI_DBG_PRINT ("GET SYSTEM RESTART CAUSE\n");
  406. OS_THREAD_MUTEX_ACQUIRE(&pBMCInfo->ChassisMutex, WAIT_INFINITE);
  407. pGetSysRestartCauseRes->CompletionCode = CC_NORMAL;
  408. pGetSysRestartCauseRes->SysRestartCause = pBMCInfo->ChassisConfig.SysRestartCause;
  409. OS_THREAD_TLS_GET(g_tls.CurChannel,curchannel);
  410. pGetSysRestartCauseRes->ChannelID = *curchannel & 0xF;
  411. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  412. return sizeof(GetSystemRestartCauseRes_T);
  413. }
  414. /*-------------------------------------
  415. * GetPOHCounter
  416. *-------------------------------------*/
  417. int
  418. GetPOHCounter (_NEAR_ INT8U* pReq, INT8U ReqLen, _NEAR_ INT8U* pRes,int BMCInst)
  419. {
  420. _NEAR_ GetPOHCounterRes_T* pGetPOHCounterRes = (_NEAR_ GetPOHCounterRes_T*) pRes;
  421. BMCInfo_t *pBMCInfo = &g_BMCInfo[BMCInst];
  422. IPMI_DBG_PRINT ("GET POH COUNTER\n");
  423. OS_THREAD_MUTEX_ACQUIRE(&pBMCInfo->ChassisMutex, WAIT_INFINITE);
  424. pGetPOHCounterRes->CompletionCode = CC_NORMAL;
  425. pGetPOHCounterRes->MinutesPerCount = POH_MINS_PER_COUNT;
  426. pGetPOHCounterRes->POHCounterReading = htoipmi_u32 (pBMCInfo->GenConfig.POHCounterReading);
  427. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  428. return sizeof(GetPOHCounterRes_T);
  429. }
  430. /*-------------------------------------
  431. * SetSysBOOTOptions
  432. *-------------------------------------*/
  433. int
  434. SetSysBOOTOptions (_NEAR_ INT8U* pReq, INT8U ReqLen, _NEAR_ INT8U* pRes,int BMCInst)
  435. {
  436. _NEAR_ SetBootOptionsReq_T* pBootOptReq = (_NEAR_ SetBootOptionsReq_T*) pReq;
  437. _NEAR_ SetBootOptionsRes_T* pBootOptRes = (_NEAR_ SetBootOptionsRes_T*) pRes;
  438. BMCInfo_t *pBMCInfo = &g_BMCInfo[BMCInst];
  439. INT8U Parameter;
  440. BootOptions_T* pBootOptions;
  441. INT8U u8SetInProgress;
  442. INT8U u8TempData,SSIComputeBladeSupport;
  443. int i,j=0;
  444. Parameter = pBootOptReq->ParamValidCumParam & 0x7F;
  445. SSIComputeBladeSupport = g_corefeatures.ssi_support;
  446. /*Check for validity of parameter */
  447. if(SSIComputeBladeSupport)
  448. {
  449. if ((Parameter >= sizeof (m_BootOptParamLen)) && (Parameter != CHASSIS_AMI_OEM_PARAM) &&
  450. (Parameter != SSICB_OEM_PARAM_BLK_SIZE_TBL) && (Parameter < SSICB_BOOT_ORDER_TBL || Parameter > SSICB_SLOT_CONFIG_TBL))
  451. {
  452. pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  453. return sizeof (SetBootOptionsRes_T);
  454. }
  455. }
  456. else
  457. {
  458. if ((Parameter >= sizeof (m_BootOptParamLen)) && (Parameter != CHASSIS_AMI_OEM_PARAM))
  459. {
  460. pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  461. return sizeof (SetBootOptionsRes_T);
  462. }
  463. }
  464. /*Check if ReqLen valid for OEM Parameter */
  465. if (CHASSIS_AMI_OEM_PARAM == Parameter)
  466. {
  467. if ((ReqLen - 1) != sizeof (AMI_BootOpt_T))
  468. {
  469. pBootOptRes->CompletionCode= CC_REQ_INV_LEN;
  470. return sizeof (INT8U);
  471. }
  472. }
  473. else if (Parameter >= SSICB_OEM_PARAM_BLK_SIZE_TBL && Parameter <= SSICB_SLOT_CONFIG_TBL)
  474. {
  475. if(SSIComputeBladeSupport)
  476. {
  477. if ((ReqLen - 1) != m_SSIBootOptParamLen[Parameter-SSICB_OEM_PARAM_BLK_SIZE_TBL])
  478. {
  479. pBootOptRes->CompletionCode= CC_REQ_INV_LEN;
  480. return sizeof (INT8U);
  481. }
  482. }
  483. }
  484. else
  485. {
  486. /*Check if valid message length */
  487. //if ( ((ReqLen - 1) != m_BootOptParamLen[Parameter]) && (ReqLen != sizeof (Parameter)))
  488. if ((ReqLen - 1) != m_BootOptParamLen[Parameter])
  489. {
  490. pBootOptRes->CompletionCode= CC_REQ_INV_LEN;
  491. return sizeof (INT8U);
  492. }
  493. }
  494. #if 0
  495. Bit is 1 - Parameter is locked
  496. Bit is 0 - Parameter is unlocked
  497. if locked
  498. if no req to unlock then return invalid
  499. if req to unlock then unlock and procced
  500. else
  501. Proceed
  502. #endif
  503. /* Check for Reserved Bits */
  504. for (i = 0; i < sizeof (m_RsvdBitsCheck)/ sizeof (m_RsvdBitsCheck[0]); i++)
  505. {
  506. /* Check if this Parameter Selector needs Reserved bit checking !! */
  507. if (m_RsvdBitsCheck[i].Params == Parameter)
  508. {
  509. //IPMI_DBG_PRINT_2 ("Param - %x, DataLen - %x\n", pSetLanReq->ParameterSelect, m_RsvdBitsCheck[i].DataLen);
  510. for (j = 0; j < m_RsvdBitsCheck[i].DataLen; j++)
  511. {
  512. // IPMI_DBG_PRINT_2 ("Cmp %x, %x\n", pReq[2+j], m_RsvdBitsCheck[i].ReservedBits[j]);
  513. if ( 0 != (pReq[1+j] & m_RsvdBitsCheck[i].ReservedBits[j]))
  514. {
  515. /* Alarm !!! Somebody is trying to set Reseved Bits */
  516. *pRes = CC_INV_DATA_FIELD;
  517. return sizeof (*pRes);
  518. }
  519. }
  520. }
  521. }
  522. OS_THREAD_MUTEX_ACQUIRE(&pBMCInfo->ChassisMutex, WAIT_INFINITE);
  523. pBootOptions = &(BMC_GET_SHARED_MEM(BMCInst)->sBootOptions);
  524. u8SetInProgress = pBootOptions->u8SetInProgress;
  525. /* if locked */
  526. if (pBootOptions->ParameterValid & (1 << Parameter) )
  527. {
  528. /*if not req to unlock */
  529. if (0 != (pBootOptReq->ParamValidCumParam & 0x80))
  530. {
  531. pBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  532. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  533. return sizeof (INT8U);
  534. }
  535. }
  536. /*Check for valid bit settings */
  537. if (0 != (pBootOptReq->ParamValidCumParam & 0x80))
  538. {
  539. /* The valid bit for parameters 0 - 7 are SET/RESET to
  540. * corresponding bits 0-7 in ParameterValid field
  541. */
  542. pBootOptions->ParameterValid |= (1 << Parameter);
  543. }
  544. else
  545. {
  546. pBootOptions->ParameterValid &= ~(1 << Parameter);
  547. }
  548. /*if only the parameter byte is provided then exit */
  549. if (ReqLen == sizeof (Parameter))
  550. {
  551. pBootOptRes->CompletionCode = CC_NORMAL;
  552. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  553. return sizeof (SetBootOptionsRes_T);
  554. }
  555. switch (Parameter)
  556. {
  557. case CHASSIS_SET_INPROG:
  558. /* Commit Write is optional and supported
  559. * only if rollback is supported */
  560. if ( (BMC_BOOT_OPTION_SET_IN_PROGRESS != pBootOptReq->BootParam.SetInProgress) &&
  561. (BMC_BOOT_OPTION_SET_COMPLETE != pBootOptReq->BootParam.SetInProgress) )
  562. {
  563. pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  564. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  565. return sizeof(SetBootOptionsRes_T);
  566. }
  567. else if ((BMC_BOOT_OPTION_SET_IN_PROGRESS == (u8SetInProgress & 0x03)) &&
  568. (BMC_BOOT_OPTION_SET_IN_PROGRESS == pBootOptReq->BootParam.SetInProgress))
  569. {
  570. IPMI_DBG_PRINT ("\nSET IN PROGRESS ALREADY SET \n");
  571. pBootOptRes->CompletionCode = CC_SET_IN_PROGRESS;
  572. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  573. return sizeof(SetBootOptionsRes_T);
  574. }
  575. /*Set the new setinpogress byte */
  576. pBootOptions->u8SetInProgress = pBootOptReq->BootParam.SetInProgress;
  577. break;
  578. case CHASSIS_SERVICE_PART_SEL:
  579. pBootOptions->ServicePartitionSelector =
  580. pBootOptReq->BootParam.ServicePartitionSelector;
  581. break;
  582. case CHASSIS_SERVICE_PART_SCAN:
  583. pBootOptions->ServicePartitionScan =
  584. pBootOptReq->BootParam.ServicePartitionScan;
  585. /*Update in NVRAM*/
  586. pBMCInfo->ChassisConfig.SysPartitionScan = pBootOptReq->BootParam.ServicePartitionScan;
  587. FlushIPMI((INT8U*)&pBMCInfo->ChassisConfig,(INT8U*)&pBMCInfo->ChassisConfig.SysPartitionScan,pBMCInfo->IPMIConfLoc.ChassisConfigAddr,sizeof(INT8U),BMCInst);
  588. break;
  589. case CHASSIS_BOOT_FLAG_VALID_BIT_CLEAR:
  590. pBootOptions->BootFlagValidBitClearing =
  591. pBootOptReq->BootParam.BootFlagValidBitClearing;
  592. break;
  593. case CHASSIS_BOOT_INFO_ACK:
  594. _fmemcpy ((_FAR_ INT8U*)&pBootOptions->BootInfoAck,
  595. (_FAR_ INT8U*)&pBootOptReq->BootParam.BootInfoAck,
  596. sizeof (BootInfoAck_T));
  597. break;
  598. case CHASSIS_BOOT_FLAGS:
  599. u8TempData = (pBootOptReq->BootParam.BootFlags.Data2 & BIT5_BIT2_MASK);
  600. if((u8TempData == RESERVED_VALUE_28) ||(u8TempData == RESERVED_VALUE_30) ||(u8TempData == RESERVED_VALUE_34)||(u8TempData == RESERVED_VALUE_38))
  601. {
  602. /* Alarm !!! Somebody is trying to set Reseved Bits */
  603. *pRes = CC_INV_DATA_FIELD;
  604. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  605. return sizeof (*pRes);
  606. }
  607. u8TempData = (pBootOptReq->BootParam.BootFlags.Data3 & BIT6_BIT5_MASK);
  608. if((u8TempData == RESERVED_VALUE_60))
  609. {
  610. /* Alarm !!! Somebody is trying to set Reseved Bits */
  611. *pRes = CC_INV_DATA_FIELD;
  612. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  613. return sizeof (*pRes);
  614. }
  615. u8TempData = (pBootOptReq->BootParam.BootFlags.Data3 & BIT1_BIT0_MASK);
  616. if((u8TempData == RESERVED_VALUE_03))
  617. {
  618. /* Alarm !!! Somebody is trying to set Reseved Bits */
  619. *pRes = CC_INV_DATA_FIELD;
  620. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  621. return sizeof (*pRes);
  622. }
  623. if((pBootOptReq->BootParam.BootFlags.Data5 == RESERVED_VALUE_20)||(pBootOptReq->BootParam.BootFlags.Data5 == RESERVED_VALUE_40)||(pBootOptReq->BootParam.BootFlags.Data5 == RESERVED_VALUE_80))
  624. {
  625. /* Alarm !!! Somebody is trying to set Reseved Bits */
  626. *pRes = CC_INV_DATA_FIELD;
  627. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  628. return sizeof (*pRes);
  629. }
  630. _fmemcpy ((_FAR_ INT8U*)&pBootOptions->BootFlags,
  631. (_FAR_ INT8U*)&pBootOptReq->BootParam.BootFlags,
  632. sizeof (BootFlags_T));
  633. break;
  634. case CHASSIS_BOOT_INITIATOR_INFO:
  635. _fmemcpy ((_FAR_ INT8U*)&pBootOptions->BootInitiatorInfo,
  636. (_FAR_ INT8U*)&pBootOptReq->BootParam.BootInitiatorInfo,
  637. sizeof (BootInitiatorInfo_T));
  638. break;
  639. case CHASSIS_BOOT_INITIATOR_MBOX:
  640. if (pBootOptReq->BootParam.BootMailBox.BlockSel >= MAX_BOOT_INIT_MAILBOX_BLOCKS)
  641. {
  642. IPMI_DBG_PRINT ("\n ONLY FIVE BLOCKS ARE USED \n");
  643. pBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  644. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  645. return sizeof(SetBootOptionsRes_T);
  646. }
  647. _fmemcpy ((_FAR_ INT8U*)&pBootOptions->BootMailBox[pBootOptReq->BootParam.BootMailBox.BlockSel],
  648. (_FAR_ INT8U*) &pBootOptReq->BootParam.BootMailBox.BootMBox,
  649. sizeof (BootInitiatorMailbox_T));
  650. break;
  651. case CHASSIS_AMI_OEM_PARAM:
  652. _fmemcpy ((_FAR_ INT8U*)&pBMCInfo->ChassisConfig.OemBootOpt,
  653. (_FAR_ INT8U*) &pBootOptReq->BootParam.Oem,
  654. sizeof (AMI_BootOpt_T));
  655. FlushIPMI((INT8U*)&pBMCInfo->ChassisConfig,(INT8U*)&pBMCInfo->ChassisConfig,pBMCInfo->IPMIConfLoc.ChassisConfigAddr,sizeof(ChassisConfig_T),BMCInst);
  656. break;
  657. case SSICB_OEM_PARAM_BLK_SIZE_TBL:
  658. if(SSIComputeBladeSupport)
  659. {
  660. _fmemcpy ((_FAR_ INT8U*)&pBootOptions->OemParamBlkSizeTbl,
  661. (_FAR_ INT8U*)&pBootOptReq->BootParam.OemParamBlkSizeTbl,
  662. sizeof(OemParamBlkSizeTbl_T));
  663. break;
  664. }
  665. else
  666. {
  667. pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  668. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  669. return sizeof (SetBootOptionsRes_T);
  670. }
  671. case SSICB_BOOT_ORDER_TBL:
  672. if(SSIComputeBladeSupport)
  673. {
  674. if (pBootOptReq->BootParam.BootOrderTbl.BlockSel >= g_coremacros.ssi_bot_dev_num)
  675. {
  676. pBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  677. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  678. return sizeof(INT8U);
  679. }
  680. _fmemcpy ((_FAR_ INT8U*)&pBootOptions->BootOrderTbl[(pBootOptReq->BootParam.BootOrderTbl.BlockSel) * sizeof(BootOrderTbl_T)],
  681. (_FAR_ INT8U*)&pBootOptReq->BootParam.BootOrderTbl,
  682. sizeof(BootOrderTbl_T));
  683. break;
  684. }
  685. else
  686. {
  687. pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  688. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  689. return sizeof (SetBootOptionsRes_T);
  690. }
  691. case SSICB_BOOT_DEV_SELECTOR:
  692. if(SSIComputeBladeSupport)
  693. {
  694. pBootOptions->BootDevSelector = pBootOptReq->BootParam.BootDevSelector;
  695. break;
  696. }
  697. else
  698. {
  699. pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  700. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  701. return sizeof (SetBootOptionsRes_T);
  702. }
  703. case SSICB_SLOT_CONFIG_TBL:
  704. if(SSIComputeBladeSupport)
  705. {
  706. _fmemcpy ((_FAR_ INT8U*)&pBootOptions->SlotConfigTbl,
  707. (_FAR_ INT8U*)&pBootOptReq->BootParam.SlotConfigTbl,
  708. sizeof(SlotConfigTbl_T));
  709. break;
  710. }
  711. else
  712. {
  713. pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  714. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  715. return sizeof (SetBootOptionsRes_T);
  716. }
  717. default:
  718. pBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  719. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  720. return sizeof (SetBootOptionsRes_T);
  721. }
  722. if (0 != ROLLBACK_OPTION)
  723. {
  724. if (BMC_BOOT_OPTION_COMMIT_WRITE == (u8SetInProgress & 0x03))
  725. {
  726. /* Writing to nvRAM when "commit write" is given */
  727. FlushIPMI((INT8U*)&pBMCInfo->ChassisConfig,(INT8U*)&pBMCInfo->ChassisConfig,pBMCInfo->IPMIConfLoc.ChassisConfigAddr,sizeof(ChassisConfig_T),BMCInst);
  728. /* Setting this to "set complete", don't need mutex protection */
  729. pBootOptions->u8SetInProgress = BMC_BOOT_OPTION_SET_COMPLETE;
  730. }
  731. }
  732. else
  733. {
  734. /* Since roll back feature is not provided
  735. the data is written to nvram */
  736. FlushIPMI((INT8U*)&pBMCInfo->ChassisConfig,(INT8U*)&pBMCInfo->ChassisConfig,pBMCInfo->IPMIConfLoc.ChassisConfigAddr,sizeof(ChassisConfig_T),BMCInst);
  737. }
  738. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  739. pBootOptRes->CompletionCode = CC_NORMAL;
  740. return sizeof(SetBootOptionsRes_T);
  741. }
  742. /*-------------------------------------
  743. * GetSysBOOTOptions
  744. *-------------------------------------*/
  745. int
  746. GetSysBOOTOptions (_NEAR_ INT8U* pReq, INT8U ReqLen, _NEAR_ INT8U* pRes,int BMCInst)
  747. {
  748. _NEAR_ GetBootOptionsReq_T* pGetBootOptReq = (_NEAR_ GetBootOptionsReq_T*) pReq;
  749. _NEAR_ GetBootOptionsRes_T* pGetBootOptRes = (_NEAR_ GetBootOptionsRes_T*) pRes;
  750. BMCInfo_t *pBMCInfo = &g_BMCInfo[BMCInst];
  751. INT8U ParamSel,SSIComputeBladeSupport;
  752. int ResponseLength;
  753. BootOptions_T sBootOptions;
  754. IPMI_DBG_PRINT ("GET SYSTEM BOOT OPTIONS\n");
  755. if(pGetBootOptReq->ParamSel & RESERVED_VALUE_80)
  756. {
  757. /* Alarm !!! Somebody is trying to set Reseved Bits */
  758. *pRes = CC_INV_DATA_FIELD;
  759. return sizeof (*pRes);
  760. }
  761. ParamSel = pGetBootOptReq->ParamSel & 0x7F;
  762. SSIComputeBladeSupport = g_corefeatures.ssi_support;
  763. /*Check for validity of parameter */
  764. if(SSIComputeBladeSupport)
  765. {
  766. if ((ParamSel >= sizeof (m_BootOptParamLen)) && (ParamSel != CHASSIS_AMI_OEM_PARAM) &&
  767. (ParamSel != SSICB_OEM_PARAM_BLK_SIZE_TBL) && (ParamSel < SSICB_BOOT_ORDER_TBL || ParamSel > SSICB_SLOT_CONFIG_TBL))
  768. {
  769. pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  770. return sizeof(INT8U);
  771. }
  772. }
  773. else
  774. {
  775. if ((ParamSel >= sizeof (m_BootOptParamLen)) && (ParamSel != CHASSIS_AMI_OEM_PARAM))
  776. {
  777. pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED;
  778. return sizeof(INT8U);
  779. }
  780. }
  781. /*Check the validity of Setselector & Blockselector */
  782. if(SSIComputeBladeSupport)
  783. {
  784. if (((0 != pGetBootOptReq->SetSel) && (ParamSel != CHASSIS_BOOT_INITIATOR_MBOX || ParamSel != SSICB_BOOT_ORDER_TBL)) ||
  785. (ParamSel == CHASSIS_BOOT_INITIATOR_MBOX && pGetBootOptReq->SetSel >= MAX_BOOT_INIT_MAILBOX_BLOCKS) ||
  786. (ParamSel == SSICB_BOOT_ORDER_TBL && pGetBootOptReq->SetSel >= g_coremacros.ssi_bot_dev_num) ||
  787. (0 != pGetBootOptReq->BlockSel))
  788. {
  789. IPMI_DBG_PRINT ("Set Selector or Block Selector is invalid\n") ;
  790. pGetBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  791. return sizeof(INT8U);
  792. }
  793. }
  794. else
  795. {
  796. if (((0 != pGetBootOptReq->SetSel) && (ParamSel != CHASSIS_BOOT_INITIATOR_MBOX)) ||
  797. (pGetBootOptReq->SetSel >= MAX_BOOT_INIT_MAILBOX_BLOCKS) ||
  798. (0 != pGetBootOptReq->BlockSel))
  799. {
  800. IPMI_DBG_PRINT ("Set Selector or Block Selector is invalid\n") ;
  801. pGetBootOptRes->CompletionCode = CC_INV_DATA_FIELD;
  802. return sizeof(INT8U);
  803. }
  804. }
  805. pGetBootOptRes->CompletionCode = CC_NORMAL;
  806. pGetBootOptRes->ParamVersion = CHASSIS_PARAMETER_VERSION;
  807. pGetBootOptRes->ParameterValid = ParamSel;
  808. OS_THREAD_MUTEX_ACQUIRE(&pBMCInfo->ChassisMutex, WAIT_INFINITE);
  809. // get a local copy of the boot option from the shared memory
  810. sBootOptions = BMC_GET_SHARED_MEM(BMCInst)->sBootOptions;
  811. /*Set the Parameter valid bit if needed */
  812. if (sBootOptions.ParameterValid & (1 << ParamSel))
  813. {
  814. pGetBootOptRes->ParameterValid |= 0x80;
  815. }
  816. /*Set initial length of Completion code,Param revision & Paramvalid */
  817. ResponseLength = 0x03;
  818. /*Load the specific parameter */
  819. switch (ParamSel)
  820. {
  821. case CHASSIS_SET_INPROG :
  822. pGetBootOptRes->BootParams.SetInProgress = sBootOptions.u8SetInProgress;
  823. ResponseLength += sizeof (sBootOptions.u8SetInProgress);
  824. break;
  825. case CHASSIS_SERVICE_PART_SEL:
  826. pGetBootOptRes->BootParams.ServicePartitionSelector =
  827. sBootOptions.ServicePartitionSelector;
  828. ResponseLength += sizeof (sBootOptions.ServicePartitionScan);
  829. break;
  830. case CHASSIS_SERVICE_PART_SCAN:
  831. pGetBootOptRes->BootParams.ServicePartitionScan = pBMCInfo->ChassisConfig.SysPartitionScan;
  832. ResponseLength += sizeof (sBootOptions.ServicePartitionScan);
  833. break;
  834. case CHASSIS_BOOT_FLAG_VALID_BIT_CLEAR:
  835. pGetBootOptRes->BootParams.BootFlagValidBitClearing =
  836. sBootOptions.BootFlagValidBitClearing;
  837. ResponseLength += sizeof (sBootOptions.BootFlagValidBitClearing);
  838. break;
  839. case CHASSIS_BOOT_INFO_ACK:
  840. _fmemcpy ((_FAR_ INT8U*)&pGetBootOptRes->BootParams.BootInfoAck,
  841. (_FAR_ INT8U*)&sBootOptions.BootInfoAck,
  842. sizeof (BootInfoAck_T));
  843. pGetBootOptRes->BootParams.BootInfoAck.WriteMask = 0;
  844. ResponseLength += sizeof (BootInfoAck_T);
  845. break;
  846. case CHASSIS_BOOT_FLAGS:
  847. _fmemcpy ((_FAR_ INT8U*)&pGetBootOptRes->BootParams.BootFlags,
  848. (_FAR_ INT8U*)&sBootOptions.BootFlags,
  849. sizeof (BootFlags_T));
  850. ResponseLength += sizeof (BootFlags_T);
  851. break;
  852. case CHASSIS_BOOT_INITIATOR_INFO:
  853. _fmemcpy ((_FAR_ INT8U*)&pGetBootOptRes->BootParams.BootInitiatorInfo,
  854. (_FAR_ INT8U*)&sBootOptions.BootInitiatorInfo,
  855. sizeof (BootInitiatorInfo_T));
  856. ResponseLength += sizeof (BootInitiatorInfo_T);
  857. break;
  858. case CHASSIS_BOOT_INITIATOR_MBOX:
  859. pGetBootOptRes->BootParams.BootMailBox.BlockSel = pGetBootOptReq->SetSel;
  860. _fmemcpy ((_FAR_ INT8U*)&pGetBootOptRes->BootParams.BootMailBox.BootMBox,
  861. (_FAR_ INT8U*)&sBootOptions.BootMailBox[pGetBootOptReq->SetSel],
  862. sizeof (BootInitiatorMailbox_T));
  863. ResponseLength += sizeof (BootInitiatorMboxReq_T);
  864. break;
  865. case CHASSIS_AMI_OEM_PARAM:
  866. _fmemcpy ((_FAR_ INT8U*)&pGetBootOptRes->BootParams.Oem,
  867. (_FAR_ INT8U*)&pBMCInfo->ChassisConfig.OemBootOpt,
  868. sizeof (AMI_BootOpt_T));
  869. ResponseLength += sizeof (AMI_BootOpt_T);
  870. break;
  871. case SSICB_OEM_PARAM_BLK_SIZE_TBL:
  872. if(SSIComputeBladeSupport)
  873. {
  874. _fmemcpy ((_FAR_ INT8U*)&pGetBootOptRes->BootParams.OemParamBlkSizeTbl,
  875. (_FAR_ INT8U*)&sBootOptions.OemParamBlkSizeTbl,
  876. sizeof(OemParamBlkSizeTbl_T));
  877. ResponseLength += sizeof(OemParamBlkSizeTbl_T);
  878. break;
  879. }
  880. else
  881. {
  882. pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  883. ResponseLength = 1 ;
  884. break;
  885. }
  886. case SSICB_BOOT_ORDER_TBL:
  887. if(SSIComputeBladeSupport)
  888. {
  889. _fmemcpy ((_FAR_ INT8U*)&pGetBootOptRes->BootParams.BootOrderTbl,
  890. (_FAR_ INT8U*)&sBootOptions.BootOrderTbl[pGetBootOptReq->SetSel * sizeof(BootOrderTbl_T)],
  891. sizeof(BootOrderTbl_T));
  892. ResponseLength += sizeof(BootOrderTbl_T);
  893. break;
  894. }
  895. else
  896. {
  897. pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  898. ResponseLength = 1 ;
  899. break;
  900. }
  901. case SSICB_BOOT_DEV_SELECTOR:
  902. if(SSIComputeBladeSupport)
  903. {
  904. pGetBootOptRes->BootParams.BootDevSelector = sBootOptions.BootDevSelector;
  905. ResponseLength += sizeof(sBootOptions.BootDevSelector);
  906. break;
  907. }
  908. else
  909. {
  910. pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  911. ResponseLength = 1 ;
  912. break;
  913. }
  914. case SSICB_SLOT_CONFIG_TBL:
  915. if(SSIComputeBladeSupport)
  916. {
  917. _fmemcpy ((_FAR_ INT8U*)&pGetBootOptRes->BootParams.SlotConfigTbl,
  918. (_FAR_ INT8U*)&sBootOptions.SlotConfigTbl,
  919. sizeof(SlotConfigTbl_T));
  920. ResponseLength += sizeof(SlotConfigTbl_T);
  921. break;
  922. }
  923. else
  924. {
  925. pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  926. ResponseLength = 1 ;
  927. break;
  928. }
  929. default :
  930. pGetBootOptRes->CompletionCode = CC_PARAM_NOT_SUPPORTED ;
  931. ResponseLength = 1 ;
  932. }
  933. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  934. return ResponseLength;
  935. }
  936. /*-------------------------------------
  937. * SetFPButtonEnables
  938. *-------------------------------------*/
  939. int
  940. SetFPButtonEnables (_NEAR_ INT8U* pReq, INT8U ReqLen, _NEAR_ INT8U* pRes,int BMCInst)
  941. {
  942. #if 0 //FQLI
  943. _FAR_ PMConfig_T* pPMConfig;
  944. bool bRet;
  945. SetFPBtnEnablesRes_T* pFPBtnEnablesRes = (SetFPBtnEnablesRes_T*)pRes;
  946. SetFPBtnEnablesReq_T* pFPBtnEnablesReq = (SetFPBtnEnablesReq_T*)pReq;
  947. IPMI_DBG_PRINT ("PwrCtrl - SetFrontPanelEnables\n");
  948. pFPBtnEnablesRes->CompletionCode = CC_INV_CMD;
  949. if (pReq)
  950. {
  951. pFPBtnEnablesRes->CompletionCode = CC_NORMAL;
  952. // retrieve chassis status from the NVStore
  953. pPMConfig = (_FAR_ PMConfig_T*)GetNVRAddr(NVRH_PMCONFIG);
  954. // store the front panel enables to the NVStore
  955. pPMConfig->ChassisConfig.ChassisPowerState.FPBtnEnables = pFPBtnEnablesReq->ButtonEnables;
  956. // enable / disable front panel buttons. do the set before store the value in case the
  957. // action fails. if failed to set the passthrough buttons, the current reading will be
  958. // used to be the current settings.
  959. bRet = PDK_SetFPEnable(&pFPBtnEnablesReq->ButtonEnables);
  960. if (bRet != TRUE)
  961. {
  962. pFPBtnEnablesRes->CompletionCode = CC_UNSPECIFIED_ERR;
  963. }
  964. FlushPMC(&pPMConfig->ChassisConfig.ChassisPowerState.sFrontPanelButton, sizeof(ChassisPowerState_T));
  965. }
  966. return sizeof (SetFPBtnEnablesRes_T);
  967. #else //AMI
  968. _NEAR_ SetFPBtnEnablesReq_T* pFPBtnEnablesReq = (_NEAR_ SetFPBtnEnablesReq_T*)pReq;
  969. _NEAR_ SetFPBtnEnablesRes_T* pFPBtnEnablesRes = (_NEAR_ SetFPBtnEnablesRes_T*)pRes;
  970. BMCInfo_t *pBMCInfo = &g_BMCInfo[BMCInst];
  971. IPMI_DBG_PRINT ("Set FP Button Enables\n");
  972. /* Check for the reserved bytes should b zero */
  973. if ( 0 != (pFPBtnEnablesReq->ButtonEnables & RESERVED_BITS_SETFPBUTTONENABLES ) )
  974. {
  975. pFPBtnEnablesRes->CompletionCode = CC_INV_DATA_FIELD;
  976. return sizeof(INT8U);
  977. }
  978. OS_THREAD_MUTEX_ACQUIRE(&pBMCInfo->ChassisMutex, WAIT_INFINITE);
  979. pBMCInfo->ChassisConfig.ChassisPowerState.FPBtnEnables = pFPBtnEnablesReq->ButtonEnables;
  980. if(g_PDKHandle[PDK_FPENABLE] != NULL)
  981. {
  982. ((int(*)(INT8U,int))g_PDKHandle[PDK_FPENABLE]) (pFPBtnEnablesReq->ButtonEnables,BMCInst);
  983. }
  984. /* Save in NVR */
  985. FlushIPMI((INT8U*)&pBMCInfo->ChassisConfig,(INT8U*)&pBMCInfo->ChassisConfig,pBMCInfo->IPMIConfLoc.ChassisConfigAddr,sizeof(ChassisConfig_T),BMCInst);
  986. pFPBtnEnablesRes->CompletionCode = 0x00;
  987. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  988. return sizeof (SetFPBtnEnablesRes_T);
  989. #endif //FQLI
  990. }
  991. /*-------------------------------------
  992. * SetPowerCycleInterval
  993. *-------------------------------------*/
  994. int
  995. SetPowerCycleInterval (_NEAR_ INT8U* pReq, INT8U ReqLen, _NEAR_ INT8U* pRes,int BMCInst)
  996. {
  997. _NEAR_ SetPowerCycleIntervalReq_T* pSetPowerCycleInterval =
  998. (_NEAR_ SetPowerCycleIntervalReq_T*) pReq;
  999. _NEAR_ SetPowerCycleIntervalRes_T* pSetPowerCycleIntervalRes =
  1000. (_NEAR_ SetPowerCycleIntervalRes_T*) pRes;
  1001. BMCInfo_t *pBMCInfo = &g_BMCInfo[BMCInst];
  1002. OS_THREAD_MUTEX_ACQUIRE(&pBMCInfo->ChassisMutex, WAIT_INFINITE);
  1003. pBMCInfo->ChassisConfig.PowerCycleInterval = pSetPowerCycleInterval->PowerCycleInterval;
  1004. pSetPowerCycleIntervalRes->CompletionCode = CC_NORMAL;
  1005. FlushIPMI((INT8U*)&pBMCInfo->ChassisConfig,(INT8U*)&pBMCInfo->ChassisConfig,pBMCInfo->IPMIConfLoc.ChassisConfigAddr,sizeof(ChassisConfig_T),BMCInst);
  1006. OS_THREAD_MUTEX_RELEASE(&pBMCInfo->ChassisMutex);
  1007. return sizeof(SetPowerCycleIntervalRes_T);
  1008. }
  1009. #endif /* CHASSIS_DEVICE */