liboemipmb.h 21 KB

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  1. #ifndef LIB_OEM_IPMB_H
  2. #define LIB_OEM_IPMB_H
  3. #include "Types.h"
  4. #include "Debug.h"
  5. //#include "OSPort.h"
  6. #include "PendTask.h"
  7. #include "PEF.h"
  8. #include "SensorAPI.h"
  9. #include "featuredef.h"
  10. #include "BMCInfo.h"
  11. #include "IPMIConf.h"
  12. #include "AMIDevice.h"
  13. #include "ChassisCtrl.h"
  14. #include "NVRAccess.h"
  15. #include "Platform.h"
  16. #include "GUID.h"
  17. #include "SDR.h"
  18. #include "SEL.h"
  19. #include "FRU.h"
  20. #include "Sensor.h"
  21. #ifndef BOOL
  22. #define BOOL unsigned char
  23. #define BOOL_FALSE 0x00
  24. #define BOOL_TRUE 0x01
  25. #endif
  26. #ifndef UCHAR
  27. #define UCHAR unsigned char
  28. #endif
  29. #ifndef USHORT
  30. #define USHORT unsigned char
  31. #endif
  32. #ifndef IN
  33. #define IN
  34. #endif
  35. #ifndef OUT
  36. #define OUT
  37. #endif
  38. #ifndef INOUT
  39. #define INOUT
  40. #endif
  41. #ifndef PACKED
  42. #define PACKED __attribute__((packed))
  43. #endif
  44. #ifndef ERROR_CODE
  45. #define ERROR_SUCCESS 0x0
  46. #define ERROR_FAILED 0xFF
  47. #define ERROR_NOSUPPORT 0x1
  48. #endif
  49. #define BIT0_OEM 0x01
  50. #define BIT1_OEM 0x02
  51. #define BIT2_OEM 0x04
  52. #define BIT3_OEM 0x08
  53. #define NO_SUPPORT 0x0
  54. #define CPU_SUPPORT BIT0_OEM
  55. #define SWITC1g_SUPPORT BIT1_OEM
  56. #define SWITC10g_SUPPORT BIT2_OEM
  57. #define PW_SUPPORT BIT3_OEM
  58. #define XX_MAX_BOARD_NUM (MAX_BOARD_NUM_PLUS - 1)
  59. #define OEM_IPMB_I2C_BUSNUM 2
  60. #define OEM_IPMB_DEVICE "/dev/i2c2"
  61. #define OEM_IPMB_SECOND_DEVICE "/dev/i2c3"
  62. #define OEM_IPMB_PWRCTL_FIFO "/var/i2c_task_pwr_ctl_fifo"
  63. #define OEM_IPMB_SENSOR_DIR "/var/OEMIPMB/"
  64. #define OEM_IPMB_SENSOR_FILENAME_SIZE 32
  65. #define OEM_IPMB_SENSOR_FILE(file,type) (snprintf(file,OEM_IPMB_SENSOR_FILENAME_SIZE,"%s%d",OEM_IPMB_SENSOR_DIR,type))
  66. #define OEM_IPMB_MASTER_ADDR 0x0B
  67. #define OEM_IPMB_SENSOR_NAME_SIZE 255
  68. #define OEM_IPMB_MSG_START 0xA6
  69. #define OEM_IPMB_MSG_END 0x6A
  70. #define OEM_IPMB_MSG_MAXSIZE 255
  71. #define OEM_IPMB_DBG_BUFSIZE 512
  72. #define BOARD_ALIVE 0x1
  73. typedef enum en_BOARD_TYPE
  74. {
  75. en_BD_UNKNOWN = 0,
  76. en_BD_CPU_BOARD = 1,
  77. en_BD_1GSW_BOARD,
  78. en_BD_10GSW_BOARD,
  79. en_BD_PWR_BOARD,
  80. }EN_BOARD_TYPE;
  81. typedef enum en_OEM_IPMB_CMDTYPE
  82. {
  83. en_OEMIPMB_GET_ALIVE = 0x1,
  84. en_OEMIPMB_GET_CPU_SENSORDATA,
  85. en_OEMIPMB_GET_SW_SENSORDATA,
  86. en_OEMIPMB_GET_PW_SENSORDATA,
  87. en_OEMIPMB_SET_POWERON,
  88. en_OEMIPMB_SET_POWEROFF,
  89. en_OEMIPMB_SET_POWERESET,
  90. en_OEMIPMB_SET_DESTORY,
  91. MAX_OEM_IPMB_CMDNUM,
  92. }EN_OEM_IPMB_CMDTYPE;
  93. // 枚举 定义命令所支持的单板类型 计算mask
  94. typedef enum en_I2C_SEND_CMD_SUPPORT
  95. {
  96. en_OEMIPMB_GET_ALIVE_SUPPORT = CPU_SUPPORT | SWITC1g_SUPPORT | SWITC10g_SUPPORT | PW_SUPPORT,
  97. en_OEMIPMB_GET_CPU_SENSORDATA_SUPPORT = CPU_SUPPORT,
  98. en_OEMIPMB_GET_SW_SENSORDATA_SUPPORT = SWITC1g_SUPPORT | SWITC10g_SUPPORT ,
  99. en_OEMIPMB_GET_PW_SENSORDATA_SUPPORT = PW_SUPPORT,
  100. en_OEMIPMB_SET_POWERON_SUPPORT = CPU_SUPPORT | SWITC1g_SUPPORT | SWITC10g_SUPPORT ,
  101. en_OEMIPMB_SET_POWEROFF_SUPPORT = CPU_SUPPORT | SWITC1g_SUPPORT | SWITC10g_SUPPORT ,
  102. en_OEMIPMB_SET_POWERESET_SUPPORT = CPU_SUPPORT | SWITC1g_SUPPORT | SWITC10g_SUPPORT,
  103. en_OEMIPMB_SET_DESTORY_SUPPORT = CPU_SUPPORT ,
  104. }EN_I2C_SEND_CMD_SUPPORT;
  105. //BOARD SLOT ID
  106. /*
  107. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000111101
  108. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000111011
  109. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000111000
  110. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000110111
  111. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000110100
  112. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000110010
  113. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000110001
  114. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000101111
  115. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000101100
  116. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000101010
  117. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000101001
  118. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000100110
  119. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000100101
  120. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000100011
  121. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000100000
  122. JA[2:0],RA[3:0],GA[4:0]#,GAP# = 0000000011111
  123. */
  124. //GA equal to i2c addr
  125. typedef enum en_BOARD_SLOT_GA_TYPE
  126. {
  127. en_PW_BOARD_1 = 0x3d,
  128. en_10GSW_BOARD_1 =0x3b,
  129. en_10GSW_BOARD_2 = 0x38 ,
  130. en_STR_BOARD_1 =0x0,
  131. en_STR_BOARD_2 =0x0,
  132. en_STR_BOARD_3 =0x0,
  133. en_STR_BOARD_4 =0x0,
  134. en_STRMON_BOARD_1 =0x0,
  135. en_1GSW_BOARD_1 = 0x2c,
  136. en_CPU_BOARD_1 = 0x2a,
  137. en_CPU_BOARD_2 = 0x29,
  138. en_CPU_BOARD_3 =0x26,
  139. en_CPU_BOARD_4 = 0x25,
  140. en_EXT_BOARD_1 =0x0,
  141. en_EXT_BOARD_2 =0x0,
  142. en_PW_BOARD_2 = 0x1f,
  143. MAX_BOARD_NUM_PLUS=17,
  144. }EN_BOARD_SLOT_GA_TYPE;
  145. /*
  146. #define MAX_CARD_NUM (int)14
  147. const UCHAR g_ucGA_def[] =
  148. {
  149. 0x3e, //s1, pwr
  150. 0x3d, //s2, pwr
  151. 0x1c, //s3
  152. 0x3b, //s4
  153. 0x1a, //s5
  154. 0x19, //s6
  155. 0x38, //s7
  156. 0x37, //s8 10g switcher
  157. 0x16, //s9 1g switcher
  158. 0x15, //s10
  159. 0x34, //s11
  160. 0x13, //s12
  161. 0x32, //s13
  162. 0x31 //s14
  163. };
  164. */
  165. //结构体 将单板槽位GA和类型对应起来
  166. typedef struct st_SLOTNUM_CORRESPOND_BOARDTYPE
  167. {
  168. int num;
  169. EN_BOARD_SLOT_GA_TYPE enSlotGA;
  170. EN_BOARD_TYPE enBoardtype;
  171. EN_I2C_SEND_CMD_SUPPORT enBoardSupport;
  172. }ST_SLOTNUM_CORRESPOND_BOARDTYPE;
  173. /* public msg structs */
  174. /*
  175. typedef struct st_OEM_IPMB_MSG_HEAD
  176. {
  177. UCHAR msg_start;
  178. UCHAR msg_source;
  179. UCHAR msg_target;
  180. UCHAR msg_cmd;
  181. UCHAR msg_errcode;
  182. }PACKED ST_OEM_IPMB_MSG_HEAD;
  183. */
  184. #define MAX_IPMI_PKG_SIZE 23 ///the maximum size command is GetStorageStatus(0xF2)
  185. #define MAX_RES_DATA_SIZE 16
  186. #define MAX_REQ_DATA_SIZE 1
  187. ///ipmi command list
  188. typedef enum {
  189. GetBaseInfo = 0xF0, ///to all module, scan and get module base status information
  190. GetCPUStatus = 0xF1, ///to cpu module, get CPU module working status.
  191. GetStorageStatus = 0xF2, ///to storage module, get storage module storing status.
  192. GetCANStatus = 0xF3, ///to BUS module, get CAN port communicating status in BUS module.
  193. GetFlexRayStatus = 0xF4, ///to BUS module, get FlexRay port communicating status in BUS module.
  194. SetRapidIOStatus = 0xF5, ///to all module, set RapidIO port status.
  195. GetRapidIOStatus = 0xF6, ///to switch module, get RapidIO port status.
  196. GetNetStatus = 0xF7, ///to switch module, get internet port status in switch module.
  197. Poweron12V1 = 0xF8, ///to all module, turn on 12V1 power, except power module.
  198. Poweroff12V1 = 0xF9, ///to all module, turn off 12V1 power, except power module.
  199. GetTemperatue = 0xFA, ///to all module, get temperature of module.
  200. GetVoltage12V1 = 0xFB, ///to all module, get 12V1 voltage of module.
  201. GetCurrent12V1 = 0xFC, ///to all module, get 12V1 current of module.
  202. GetVoltage28V = 0xFD, ///to power module, turn on 12V2 power.
  203. GetCurrent28V = 0xFE, ///to power module, turn off 12V2 power.
  204. GetVoltage12V2 = 0xFF ///to power module, get 12V2 voltage of module.
  205. } COMMAND_T;
  206. typedef enum{
  207. IPMI_SUCCESS = 0x00,
  208. IPMI_FAIL = 0xFF
  209. } IPMI_STATUS_T;
  210. ///ipmi request struct
  211. typedef struct{
  212. uint8_t rsAddr;
  213. uint8_t netFn; ///even
  214. uint8_t checksum1;
  215. uint8_t rqAddr;
  216. uint8_t rqSeq;
  217. COMMAND_T cmd;
  218. uint8_t data[MAX_REQ_DATA_SIZE];
  219. uint8_t checksum2;
  220. }IPMI_REQUEST_T;
  221. ///ipmi response struct
  222. typedef struct{
  223. uint8_t rqAddr;
  224. uint8_t netFn; ///odd
  225. uint8_t checksum1;
  226. uint8_t rsAddr;
  227. uint8_t rqSeq;
  228. COMMAND_T cmd;
  229. IPMI_STATUS_T completion_code;
  230. uint8_t data[MAX_RES_DATA_SIZE]; ///response data
  231. uint8_t checksum2;
  232. }IPMI_RESPONSE_T;
  233. typedef struct st_OEM_IPMB_MSG_HEAD
  234. {
  235. UCHAR rsAddr;
  236. UCHAR netFn;
  237. UCHAR checksum1;
  238. UCHAR rqAddr;
  239. UCHAR rqSeq ;
  240. UCHAR cmd;
  241. UCHAR checksum2;
  242. }PACKED ST_OEM_IPMB_MSG_HEAD;
  243. typedef struct st_OEM_IPMB_MSG_TAIL
  244. {
  245. UCHAR msg_chk;
  246. UCHAR msg_end;
  247. }PACKED ST_OEM_IPMB_MSG_TAIL;
  248. #define OEM_IPMB_REQ_DATASIZE 16
  249. typedef struct st_OEM_IPMB_REQ
  250. {
  251. ST_OEM_IPMB_MSG_HEAD req_head;
  252. ST_OEM_IPMB_MSG_TAIL req_tail;
  253. }PACKED ST_OEM_IPMB_REQ;
  254. /* end public msg structs */
  255. typedef enum en_OEM_IPMB_CMDAUOTOORMAN
  256. {
  257. en_OEM_IPMB_CMD_AUOTO = 0x0,
  258. en_OEM_IPMB_CMD_MAN,
  259. }EN_OEM_IPMB_CMDAUOTOORMAN;
  260. typedef struct st_OEM_IPMB_CMDHANDLER
  261. {
  262. EN_OEM_IPMB_CMDTYPE enCmdType;
  263. EN_OEM_IPMB_CMDAUOTOORMAN enAutoorman;
  264. EN_I2C_SEND_CMD_SUPPORT enBoardTypeMask;
  265. UCHAR msgsize;
  266. UCHAR (*RequestParg) (char *i2cdev, UCHAR slaveaddr, UCHAR cmdtype);
  267. UCHAR (*ResponseParg) (char *i2cdev, UCHAR ResponseMsgLen, ST_OEM_IPMB_REQ stReq);
  268. }PACKED ST_OEM_IPMB_CMDHANDLER;
  269. /* start define functions */
  270. #define SIZE_ST(x) (sizeof(x))
  271. #define SIZE_STAR(ar,st) (sizeof(ar)/sizeof(st))
  272. #define OEM_IPMB_REQUEST_FUNCTION_START(func) \
  273. UCHAR func (char *i2cdev, UCHAR slaveaddr, UCHAR cmdtype) \
  274. { \
  275. UCHAR iRet = ERROR_SUCCESS; \
  276. #define OEM_IPMB_REQUEST_FUNCTION_END \
  277. return iRet; \
  278. } \
  279. #define OEM_IPMB_REQUEST_FUNCTION_DEC(func) UCHAR func (char *i2cdev, UCHAR slaveaddr, UCHAR cmdtype);
  280. #define OEM_IPMB_RESPONSE_FUNCTION_START(func,stname) \
  281. UCHAR func(char *i2cdev, UCHAR ResponseMsgLen, ST_OEM_IPMB_REQ stReq) \
  282. { \
  283. stname stRes; \
  284. memset(&stRes, 0, sizeof(stRes)); \
  285. UCHAR iRet = ERROR_SUCCESS; \
  286. if(ResponseMsgLen != sizeof(stRes)) \
  287. { \
  288. return ERROR_FAILED; \
  289. } \
  290. stRes.msg_head.rsAddr = stReq.req_head.rqAddr; \
  291. stRes.msg_head.netFn = stReq.req_head.netFn; \
  292. stRes.msg_head.checksum1 = (0- (stRes.msg_head.rsAddr+stReq.req_head.netFn)) & 0xff; \
  293. stRes.msg_head.rqAddr = i2c_get_host_address(OEM_IPMB_DEVICE); \
  294. stRes.msg_head.rqSeq = stReq.req_head.rqSeq; \
  295. stRes.msg_head.cmd = stReq.req_head.cmd; \
  296. stRes.msg_head.checksum2 = (0-(stRes.msg_head.rqSeq+stReq.req_head.cmd)) & 0xff; \
  297. /* start main logic */
  298. #define OEM_IPMB_RESPONSE_FUNCTION_END \
  299. /* end main logic */ \
  300. stRes.msg_tail.msg_chk = 0; \
  301. stRes.msg_tail.msg_end = OEM_IPMB_MSG_END; \
  302. return iRet; \
  303. } \
  304. #define OEM_IPMB_RESPONSE_FUNCTION_DEC(func) UCHAR func(char *i2cdev, UCHAR ResponseMsgLen, ST_OEM_IPMB_REQ stReq);
  305. /* end define functions */
  306. /* if need, add those */
  307. /* response msg struct, judged by cmdtype */
  308. /* response for alive */
  309. typedef struct st_OEM_IPMB_MSG_ALIVE
  310. {
  311. ST_OEM_IPMB_MSG_HEAD msg_head;
  312. UCHAR alive;
  313. UCHAR GA;
  314. ST_OEM_IPMB_MSG_TAIL msg_tail;
  315. }PACKED ST_OEM_IPMB_MSG_ALIVE;
  316. /* end */
  317. //cpu board sensor
  318. typedef struct en_OEMSERIAL_CPUBD_BMCI2C_SENSORDATA_FORMAT
  319. {
  320. // UCHAR oem_i2c_start[2]; //2 BYTE
  321. UCHAR board_type; //1 BYTE
  322. UCHAR chassis_id; //1 BYTE
  323. UCHAR slot_id; //1 BYTE
  324. UCHAR Manufacture[10]; //10BYTE
  325. UCHAR serial_id; //1BYTE
  326. UCHAR proc_date[2]; //2BYTE
  327. UCHAR hw_version[3]; //3 BYTE
  328. UCHAR bios_version[3]; //3 BYTE
  329. UCHAR sys_version[3]; //3 BYTE
  330. UCHAR cpu_occupy[2]; //2BYTE
  331. UCHAR ram[4]; //4 byte
  332. UCHAR flash[4]; //4 byte
  333. UCHAR net1; //1 byte
  334. UCHAR net2; //1 byte
  335. UCHAR net3; //1 byte
  336. UCHAR net4; //1 byte
  337. UCHAR status; //1 byte
  338. INT16U oem_sensor_data[12]; //24 byte
  339. // UCHAR oem_i2c_end[2]; //2 byte
  340. }PACKED EN_OEMSERIAL_CPUBD_BMCI2C_SENSORDATA_FORMAT;
  341. typedef struct st_OEM_IPMB_CPU_MSG_SENSOR
  342. {
  343. ST_OEM_IPMB_MSG_HEAD msg_head;
  344. EN_OEMSERIAL_CPUBD_BMCI2C_SENSORDATA_FORMAT msg_sensor;
  345. ST_OEM_IPMB_MSG_TAIL msg_tail;
  346. }PACKED ST_OEM_IPMB_CPU_MSG_SENSOR;
  347. //switch board sensor
  348. typedef struct en_OEMSERIAL_SWBD_BMCI2C_SENSORDATA_FORMAT
  349. {
  350. // UCHAR oem_i2c_start[2]; //2 BYTE
  351. UCHAR board_type; //1 BYTE
  352. UCHAR chassis_id; //1 BYTE
  353. UCHAR slot_id; //1 BYTE
  354. UCHAR Manufacture[10]; //10BYTE
  355. UCHAR serial_id; //1BYTE
  356. UCHAR proc_date[2]; //2BYTE
  357. UCHAR hw_version[3]; //3 BYTE
  358. UCHAR bios_version[3]; //3 BYTE
  359. UCHAR sys_version[3]; //3 BYTE
  360. UCHAR cpu_occupy[2]; //2BYTE
  361. UCHAR ram[4]; //4 byte
  362. UCHAR flash[4]; //4 byte
  363. UCHAR net[51]; //1 byte
  364. UCHAR status; //1 byte
  365. INT16U oem_sensor_data[4]; //8 byte
  366. // UCHAR oem_i2c_end[2]; //2 byte
  367. }PACKED EN_OEMSERIAL_SWBD_BMCI2C_SENSORDATA_FORMAT;
  368. typedef struct st_OEM_IPMB_SW_MSG_SENSOR
  369. {
  370. ST_OEM_IPMB_MSG_HEAD msg_head;
  371. EN_OEMSERIAL_SWBD_BMCI2C_SENSORDATA_FORMAT msg_sensor;
  372. ST_OEM_IPMB_MSG_TAIL msg_tail;
  373. }PACKED ST_OEM_IPMB_SW_MSG_SENSOR;
  374. //power board sensor
  375. typedef struct st_OEM_IPMB_PW_MSG_SENSOR
  376. {
  377. // ST_OEM_IPMB_MSG_HEAD msg_head;
  378. UCHAR board_type; //1 BYTE
  379. UCHAR chassis_id; //1 BYTE
  380. UCHAR slot_id; //1 BYTE
  381. UCHAR Manufacture[10]; //10BYTE
  382. UCHAR serial_id; //1BYTE
  383. UCHAR proc_date[2]; //2BYTE
  384. UCHAR hw_version[3]; //3 BYTE
  385. UCHAR status; //1 byte
  386. INT16U oem_sensor_data[8];
  387. // ST_OEM_IPMB_MSG_TAIL msg_tail;
  388. }PACKED ST_OEM_IPMB_PW_MSG_SENSOR;
  389. /* respoonse for set power on or off */
  390. typedef struct st_OEM_IPMB_MSG_POWERCTL
  391. {
  392. ST_OEM_IPMB_MSG_HEAD msg_head;
  393. UCHAR result;
  394. ST_OEM_IPMB_MSG_TAIL msg_tail;
  395. }PACKED ST_OEM_IPMB_MSG_POWERCTL;
  396. /* end */
  397. /* end response msg struct */
  398. /* funtions */
  399. extern UCHAR OEM_GET_SENSOR(SensorInfo_T *pSensor, UCHAR sensornum);
  400. extern UCHAR OEM_GET_SENSOR_COUNT(void);
  401. void *COLLECT_TASK(void *pArg);
  402. void *OEMIPMB_TASK(void *pArg);
  403. void *OEMIPMB_HANDLER(void *pArg);
  404. void OEMIPMB_START(int BMCInst);
  405. void *OEMIPMB_ETH_TASK(void *pArg);
  406. extern void OEM_SLEEP(int seconds);
  407. extern void OEM_MSLEEP(int msec);
  408. extern UCHAR OEMIPMB_SET_ADDR(char *i2cdev, UCHAR u7addr);
  409. extern UCHAR OEMIPMB_SET_HOSTADDR(void);
  410. extern void PRINT_DATA(UCHAR *acData, UCHAR uclen);
  411. extern UCHAR OEMIPMB_INIT(void);
  412. extern void OEMDEBUG(UCHAR flag, char *fmt,...);
  413. extern UCHAR OEM_IPMB_REQUEST_SEND(IN char *i2cdev, IN UCHAR slaveaddr, IN UCHAR cmdtype, INOUT UCHAR *stRes, IN UCHAR stResLen);
  414. extern UCHAR OEM_IPMB_REQUEST_SENDCMD_TOSLAVE(char *i2cdev, UCHAR slaveaddr, UCHAR cmdtype);
  415. extern void OEM_WRITE_FILE(UCHAR *acData, UCHAR uclen ,UCHAR slaveaddr);
  416. extern UCHAR OEM_READ_FILE(char *name, char *buf ,int *length,int num);
  417. /* add response function dec */
  418. extern OEM_IPMB_RESPONSE_FUNCTION_DEC(ResGetAlive);
  419. extern OEM_IPMB_RESPONSE_FUNCTION_DEC(ResGetCpuSensor);
  420. extern OEM_IPMB_RESPONSE_FUNCTION_DEC(ResPowerOn);
  421. extern OEM_IPMB_RESPONSE_FUNCTION_DEC(ResPowerOff);
  422. extern OEM_IPMB_RESPONSE_FUNCTION_DEC(ResPowerReset);
  423. extern OEM_IPMB_RESPONSE_FUNCTION_DEC(ResDestory);
  424. /* add request function dec */
  425. extern OEM_IPMB_REQUEST_FUNCTION_DEC(ReqGetAlive);
  426. extern OEM_IPMB_REQUEST_FUNCTION_DEC(ReqGetCpuSensor);
  427. extern OEM_IPMB_REQUEST_FUNCTION_DEC(ReqPowerOn);
  428. extern OEM_IPMB_REQUEST_FUNCTION_DEC(ReqPowerOff);
  429. extern OEM_IPMB_REQUEST_FUNCTION_DEC(ReqPowerReset);
  430. extern OEM_IPMB_REQUEST_FUNCTION_DEC(ReqDestory);
  431. /* global */
  432. extern ST_OEM_IPMB_CMDHANDLER gst_OEM_IPMB_CMD[MAX_OEM_IPMB_CMDNUM];
  433. extern int My_Bd_Solt;
  434. extern UCHAR Board_Alive_status[MAX_BOARD_NUM_PLUS-1];
  435. /* debug */
  436. #define OEMDEBUG_TRUE 1
  437. #define OEMDEBUG_FALSE 0
  438. #define OEMDEBUG_FMT "[OEMIPMB] [%s %d]:"
  439. #define OEM_IPMB_DEBUG(n, fmt, args...) OEMDEBUG(n, fmt, ##args)
  440. #define IPMBINFO(fmt, args...) OEM_IPMB_DEBUG(OEMDEBUG_TRUE, OEMDEBUG_FMT fmt, __FUNCTION__, __LINE__, ##args)
  441. #define IPMBDEBG(fmt, args...) OEM_IPMB_DEBUG(OEMDEBUG_FALSE, OEMDEBUG_FMT fmt, __FUNCTION__, __LINE__, ##args)
  442. /* those are added by cj for ft_cpu and bmc data*/
  443. #define SERIAL_START_1 0xa6
  444. #define SERIAL_START_2 0x6a
  445. #define SERIAL_END_1 0x6a
  446. #define SERIAL_END_2 0xa6
  447. #define OEM_SERIAL_PWRCTL_FIFO "/var/oem_pwr_ctl_fifo"
  448. //logic command
  449. typedef enum en_OEMSERIAL_CMD_TYPE
  450. {
  451. en_OEMSERIAL_UNKNOW = 0x0,
  452. en_OEMSERIAL_PWOFF,
  453. en_OEMSERIAL_RESET,
  454. en_OEMSERIAL_SENSOR,
  455. en_OEMSERIAL_PWON,
  456. en_OEMSERIAL_DESTORY,
  457. }EN_OEMSERIAL_CMD_TYPE;
  458. //raw command,just for command polling,because we only have one fifo to read
  459. typedef enum raw_OEMSERIAL_CMD_TYPE
  460. {
  461. raw_OEMSERIAL_SENSOR = 0x0,
  462. raw_OEMSERIAL_PWCTL,
  463. raw_OEMSERIAL_MAX,
  464. }RAW_OEMSERIAL_CMD_TYPE;
  465. typedef struct st_UART_CMD
  466. {
  467. EN_OEMSERIAL_CMD_TYPE cmdtype;
  468. UCHAR (*parg)(int fd, char *rx_buff);
  469. }ST_UART_CMD;
  470. //bmc to cpu command
  471. typedef struct en_OEMSERIAL_BTC_CMD_FORMAT
  472. {
  473. UCHAR oem_btc_serial_start[2];
  474. UCHAR oem_btc_serial_cmd;
  475. UCHAR oem_btc_serial_end[2];
  476. UCHAR oem_btc_serial_checksum;
  477. }PACKED EN_OEMSERIAL_BTC_CMD_FORMAT;
  478. //cpu to bmc command
  479. typedef struct en_OEMSERIAL_CTB_DATA_FORMAT
  480. {
  481. UCHAR oem_ctb_serial_start[2];
  482. UCHAR oem_ctb_serial_resdata;
  483. UCHAR oem_ctb_serial_end[2];
  484. UCHAR oem_ctb_serial_checksum;
  485. }PACKED EN_OEMSERIAL_CTB_CMD_FORMAT;
  486. //cpu to bmc sensor
  487. typedef struct en_OEMSERIAL_CTB_SENSORDATA_FORMAT
  488. {
  489. UCHAR oem_ctb_serial_start[2]; //2 BYTE
  490. UCHAR board_type; //1 BYTE
  491. UCHAR chassis_id; //1 BYTE
  492. UCHAR slot_id; //1 BYTE
  493. UCHAR Manufacture[10]; //10BYTE
  494. UCHAR serial_id; //1BYTE
  495. UCHAR proc_date[2]; //2BYTE
  496. UCHAR hw_version[3]; //3 BYTE
  497. UCHAR bios_version[3]; //3 BYTE
  498. UCHAR sys_version[3]; //3 BYTE
  499. UCHAR cpu_occupy[2]; //2BYTE
  500. UCHAR ram[4]; //4 byte
  501. UCHAR flash[4]; //4 byte
  502. UCHAR net1; //1 byte
  503. UCHAR net2; //1 byte
  504. UCHAR net3; //1 byte
  505. UCHAR net4; //1 byte
  506. UCHAR status; //1 byte
  507. UCHAR oem_ctb_serial_end[2]; //2 byte
  508. UCHAR oem_ctb_serial_checksum; //1 byte
  509. }PACKED EN_OEMSERIAL_CTB_SENSORDATA_FORMAT;
  510. #define max_slot_num (int)14
  511. typedef enum CardType_e_{
  512. unknow_type = 0,
  513. pwr_type ,
  514. ft_cpu,
  515. switch_1g,
  516. switch_10g,
  517. e5_cpu
  518. }CardType_e;
  519. typedef struct {
  520. CardType_e eCardType;
  521. UCHAR ucCardSlot;
  522. UCHAR ucI2cAddr;
  523. UCHAR ucSensorData[128];
  524. }PACKED SENSOR_ST;
  525. UCHAR UartSoftPwrControl(int fd, char *rx_buff);
  526. UCHAR UartGetSensor(int fd, char *rx_buff);
  527. void PRINT_SENSOR_DATA(char *acData);
  528. extern EN_OEMSERIAL_CTB_SENSORDATA_FORMAT cpu_global_serial_data;
  529. extern INT16U cpu_global_sensor_data[12];
  530. extern int OEM_SLOT_GET(void);
  531. extern void OEM_msg_collect(EN_OEMSERIAL_CPUBD_BMCI2C_SENSORDATA_FORMAT *cpu_sensor_data);
  532. extern void PRINT_CPUBD_LOG(char *acData);
  533. //global cpu data
  534. EN_OEMSERIAL_CPUBD_BMCI2C_SENSORDATA_FORMAT cpu_sensor_data;
  535. extern const ST_SLOTNUM_CORRESPOND_BOARDTYPE g_slotnum_correspond_boardtype[MAX_BOARD_NUM_PLUS-1];
  536. extern UCHAR res_powerctl_from_web(char cmd);
  537. /* those are added by cj for bmc i2c data*/
  538. //#define bmc_log
  539. #endif