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- #ifndef __COM_BMC_CFG_H__
- #define __COM_BMC_CFG_H__
- #define FAN_NUMBERS 4
- #define BLADE_NUMBERS 5
- /*
- 0x00 0000 ~ 0x7F FFFF 8MB BMC Firmware
- =============================================
- 0x80 0000 ~ 0x80 0FFF 4KB User info
- 0x80 1000 ~ 0x80 FFFF 60KB Reserve
- ---------------------------------------------
- 0x81 0000 ~ 0x81 0FFF 4KB FRU
- 0x81 1000 ~ 0x81 FFFF 60KB Reserve
- ---------------------------------------------
- 0x82 0000 ~ 0x82 0FFF 4KB SDR
- 0x82 1000 ~ 0x82 1FFF 60KB Reserve
- ---------------------------------------------
- 0x83 0000 ~ 0x83 0FFF 4KB IpmiConfig_0
- 0x83 1000 ~ 0x83 1FFF 4KB IpmiConfig_1
- 0x83 2000 ~ 0x83 2FFF 4KB IpmiConfig_2
- 0x83 3000 ~ 0x83 3FFF 4KB IpmiConfig_3
- ...
- 0x83 F000 ~ 0x83 FFFF 4KB IpmiConfig_n
- ---------------------------------------------
- 0x84 0000 ~ 0x84 FFFF 64KB SEL
- ---------------------------------------------
- 0x85 0000 ~ 0x8F FFFF 704KB Reserve
- =============================================
- 0x90 0000 ~ 0xFF FFFF 7MB Reserve
- */
- #define CONFIG_FLASH_START 0x800000
- #define USERTBL_FLASH_ADDR 0x800000
- #define FRU_FLASH_ADDR 0x810000
- #define SDR_FLASH_ADDR 0x820000
- #define IPMI_CFG_FLASH_ADDR 0x830000
- #define SEL_FLASH_ADDR 0x840000
- #endif /* __COM_BMC_CFG_H__ */
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